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MIPS: Fix machine check exception in kmap_coherent()
On an SMP system with cache aliases, the following sequence of events may happen: 1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a temporary mapping in the fixmap region 2) copy_page() starts on CPU0 3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page() 4) CPU0 takes the interrupt, interrupting copy_page() 5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again 6) The second invocation of kmap_coherent() on CPU0 tries to use the same fixmap virtual address that was being used by copy_user_highpage() 7) CPU0 throws a machine check exception for the TLB address conflict Fixed by creating an extra set of fixmap entries for use in interrupt handlers. This prevents fixmap VA conflicts between copy_user_highpage() running in user context, and local_r4k_flush_cache_page() invoked from an SMP IPI. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -48,9 +48,9 @@ enum fixed_addresses {
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#define FIX_N_COLOURS 8
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FIX_CMAP_BEGIN,
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#ifdef CONFIG_MIPS_MT_SMTC
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FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS),
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FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS * 2),
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#else
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FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
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FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * 2),
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#endif
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#ifdef CONFIG_HIGHMEM
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/* reserved pte's for temporary kernel mappings */
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@ -27,6 +27,7 @@
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#include <linux/swap.h>
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#include <linux/proc_fs.h>
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#include <linux/pfn.h>
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#include <linux/hardirq.h>
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#include <asm/asm-offsets.h>
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#include <asm/bootinfo.h>
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@ -132,7 +133,10 @@ void *kmap_coherent(struct page *page, unsigned long addr)
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inc_preempt_count();
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idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
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#ifdef CONFIG_MIPS_MT_SMTC
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idx += FIX_N_COLOURS * smp_processor_id();
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idx += FIX_N_COLOURS * smp_processor_id() +
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(in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0);
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#else
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idx += in_interrupt() ? FIX_N_COLOURS : 0;
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#endif
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vaddr = __fix_to_virt(FIX_CMAP_END - idx);
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pte = mk_pte(page, PAGE_KERNEL);
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