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spi: Fixes for v5.3
A bunch of small, device specific things here plus a DT bindings fix for the new validatable YAML binding format. The most notable thing is the fix for GPIO chip selects which fixes a corner case in updates of that code to modern APIs, unfortunately due to a historical mess the code around GPIO support is obscure, fragile and an ABI which makes and attempt to improve the situation painful. -----BEGIN PGP SIGNATURE----- iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl1IQZkTHGJyb29uaWVA a2VybmVsLm9yZwAKCRAk1otyXVSH0MR6B/4qcveQtV12fRqlYdd3JJjQY6oG4/bc EMRp3Qfs5g9Wuurg4jbziVmcanymzRuNItNg/pVpFpYrmPeCHT7WyPdAnrAEXv2t +P88pxayrOBXcitqqvQX+E2EXETj6ITsFVIYB9B2jsVAqaZChseT2JUhx+f+LbFW BePekUWper4aBQLLEei9KcyAV7BANDl3NObqBYkqzu5/Em78eHRGmcPonvaToAWP 5DPqFu+w+TxhZyYaCJcNhUn9SaaInHexAdVVcatUuL14MyJ7J/5lPdjI55nof0ep 6wYXc85fV/dbsTjVl6uhEAll3ZsfBmyLztb3W0FMw4KeNKCDi1tOlcGB =JOAs -----END PGP SIGNATURE----- Merge tag 'spi-fix-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A bunch of small, device specific things here plus a DT bindings fix for the new validatable YAML binding format. The most notable thing is the fix for GPIO chip selects which fixes a corner case in updates of that code to modern APIs, unfortunately due to a historical mess the code around GPIO support is obscure, fragile and an ABI which makes and attempt to improve the situation painful" * tag 'spi-fix-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: pxa2xx: Add support for Intel Tiger Lake spi: bcm2835: Fix 3-wire mode if DMA is enabled spi: pxa2xx: Balance runtime PM enable/disable on error spi: gpio: Add SPI_MASTER_GPIO_SS flag spi: spi-fsl-qspi: change i.MX7D RX FIFO size spi: dt-bindings: spi-controller: remove unnecessary 'maxItems: 1' from reg
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@ -73,7 +73,6 @@ patternProperties:
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Compatible of the SPI device.
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reg:
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maxItems: 1
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minimum: 0
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maximum: 256
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description:
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@ -834,7 +834,8 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr,
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bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
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/* handle all the 3-wire mode */
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if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf))
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if (spi->mode & SPI_3WIRE && tfr->rx_buf &&
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tfr->rx_buf != ctlr->dummy_rx)
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cs |= BCM2835_SPI_CS_REN;
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else
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cs &= ~BCM2835_SPI_CS_REN;
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@ -206,7 +206,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = {
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};
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static const struct fsl_qspi_devtype_data imx7d_data = {
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.rxfifo = SZ_512,
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.rxfifo = SZ_128,
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.txfifo = SZ_512,
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.ahb_buf_size = SZ_1K,
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.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK,
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@ -410,6 +410,12 @@ static int spi_gpio_probe(struct platform_device *pdev)
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bb = &spi_gpio->bitbang;
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bb->master = master;
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/*
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* There is some additional business, apart from driving the CS GPIO
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* line, that we need to do on selection. This makes the local
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* callback for chipselect always get called.
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*/
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master->flags |= SPI_MASTER_GPIO_SS;
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bb->chipselect = spi_gpio_chipselect;
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bb->set_line_direction = spi_gpio_set_direction;
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@ -1457,6 +1457,14 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
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{ PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
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/* TGL-LP */
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{ PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP },
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{ PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP },
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{ },
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};
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@ -1831,14 +1839,16 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
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status = devm_spi_register_controller(&pdev->dev, controller);
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if (status != 0) {
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dev_err(&pdev->dev, "problem registering spi controller\n");
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goto out_error_clock_enabled;
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goto out_error_pm_runtime_enabled;
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}
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return status;
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out_error_clock_enabled:
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out_error_pm_runtime_enabled:
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pm_runtime_put_noidle(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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out_error_clock_enabled:
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clk_disable_unprepare(ssp->clk);
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out_error_dma_irq_alloc:
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