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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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r8169: merge with version 8.001.00 of Realtek's r8168 driver
This one includes:
- more tweaks to rtl_hw_start_8168
- a work around for a Rx FiFO overflow issue on the 8168Bb
- rtl8169_{intr_mask/napi_event} are replaced with per-device fields,
namely tp->{intr/napi}_event
- rtl_cfg_info is converted to C99 for readability but the values are
not changed for the 8169/8110 and the 8101
Includes ChipCmd fix from Bernhard Walle <bwalle@suse.de> (2007/02/24).
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
This commit is contained in:
Francois Romieu
Jeff Garzik
parent
6dccd16b7c
commit
0e4851502f
@ -205,16 +205,6 @@ static void rtl_hw_start_8169(struct net_device *);
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static void rtl_hw_start_8168(struct net_device *);
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static void rtl_hw_start_8101(struct net_device *);
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static const struct {
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void (*hw_start)(struct net_device *);
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unsigned int region;
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unsigned int align;
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} rtl_cfg_info[] = {
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[RTL_CFG_0] = { rtl_hw_start_8169, 1, NET_IP_ALIGN },
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[RTL_CFG_1] = { rtl_hw_start_8168, 2, 8 },
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[RTL_CFG_2] = { rtl_hw_start_8101, 2, 8 }
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};
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static struct pci_device_id rtl8169_pci_tbl[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 },
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@ -354,10 +344,15 @@ enum RTL8169_register_content {
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TBINwComplete = 0x01000000,
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/* CPlusCmd p.31 */
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PktCntrDisable = (1 << 7), // 8168
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RxVlan = (1 << 6),
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RxChkSum = (1 << 5),
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PCIDAC = (1 << 4),
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PCIMulRW = (1 << 3),
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INTT_0 = 0x0000, // 8168
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INTT_1 = 0x0001, // 8168
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INTT_2 = 0x0002, // 8168
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INTT_3 = 0x0003, // 8168
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/* rtl8169_PHYstatus */
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TBI_Enable = 0x80,
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@ -457,6 +452,8 @@ struct rtl8169_private {
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unsigned rx_buf_sz;
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struct timer_list timer;
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u16 cp_cmd;
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u16 intr_event;
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u16 napi_event;
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u16 intr_mask;
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int phy_auto_nego_reg;
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int phy_1000_ctrl_reg;
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@ -505,10 +502,6 @@ static void rtl8169_rx_clear(struct rtl8169_private *tp);
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static int rtl8169_poll(struct net_device *dev, int *budget);
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#endif
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static const u16 rtl8169_intr_mask =
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SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
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static const u16 rtl8169_napi_event =
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RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
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static const unsigned int rtl8169_rx_config =
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(RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
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@ -1166,6 +1159,13 @@ static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum
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static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
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{
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/*
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* The driver currently handles the 8168Bf and the 8168Be identically
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* but they can be identified more specifically through the test below
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* if needed:
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*
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* (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
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*/
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const struct {
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u32 mask;
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int mac_version;
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@ -1480,10 +1480,44 @@ static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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return -EOPNOTSUPP;
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}
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static const struct rtl_cfg_info {
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void (*hw_start)(struct net_device *);
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unsigned int region;
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unsigned int align;
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u16 intr_event;
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u16 napi_event;
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} rtl_cfg_infos [] = {
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[RTL_CFG_0] = {
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.hw_start = rtl_hw_start_8169,
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.region = 1,
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.align = NET_IP_ALIGN,
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.intr_event = SYSErr | LinkChg | RxOverflow |
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RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
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.napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow
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},
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[RTL_CFG_1] = {
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.hw_start = rtl_hw_start_8168,
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.region = 2,
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.align = 8,
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.intr_event = SYSErr | LinkChg | RxOverflow |
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TxErr | TxOK | RxOK | RxErr,
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.napi_event = TxErr | TxOK | RxOK | RxOverflow
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},
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[RTL_CFG_2] = {
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.hw_start = rtl_hw_start_8101,
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.region = 2,
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.align = 8,
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.intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout |
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RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
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.napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow
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}
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};
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static int __devinit
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rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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const unsigned int region = rtl_cfg_info[ent->driver_data].region;
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const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
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const unsigned int region = cfg->region;
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struct rtl8169_private *tp;
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struct net_device *dev;
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void __iomem *ioaddr;
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@ -1683,14 +1717,15 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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tp->intr_mask = 0xffff;
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tp->pci_dev = pdev;
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tp->mmio_addr = ioaddr;
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tp->align = rtl_cfg_info[ent->driver_data].align;
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tp->align = cfg->align;
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tp->hw_start = cfg->hw_start;
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tp->intr_event = cfg->intr_event;
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tp->napi_event = cfg->napi_event;
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init_timer(&tp->timer);
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tp->timer.data = (unsigned long) dev;
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tp->timer.function = rtl8169_phy_timer;
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tp->hw_start = rtl_cfg_info[ent->driver_data].hw_start;
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spin_lock_init(&tp->lock);
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rc = register_netdev(dev);
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@ -1966,7 +2001,7 @@ static void rtl_hw_start_8169(struct net_device *dev)
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RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
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/* Enable all known interrupts by setting the interrupt mask. */
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RTL_W16(IntrMask, rtl8169_intr_mask);
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RTL_W16(IntrMask, tp->intr_event);
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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}
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@ -1975,6 +2010,8 @@ static void rtl_hw_start_8168(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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void __iomem *ioaddr = tp->mmio_addr;
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struct pci_dev *pdev = tp->pci_dev;
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u8 ctl;
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RTL_W8(Cfg9346, Cfg9346_Unlock);
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@ -1982,17 +2019,27 @@ static void rtl_hw_start_8168(struct net_device *dev)
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rtl_set_rx_max_size(ioaddr);
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tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
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rtl_set_rx_tx_config_registers(tp);
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tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
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RTL_W16(CPlusCmd, tp->cp_cmd);
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RTL_W16(IntrMitigate, 0x0000);
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/* Tx performance tweak. */
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pci_read_config_byte(pdev, 0x69, &ctl);
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ctl = (ctl & ~0x70) | 0x50;
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pci_write_config_byte(pdev, 0x69, ctl);
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RTL_W16(IntrMitigate, 0x5151);
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/* Work around for RxFIFO overflow. */
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if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
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tp->intr_event |= RxFIFOOver | PCSTimeout;
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tp->intr_event &= ~RxOverflow;
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}
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rtl_set_rx_tx_desc_registers(tp, ioaddr);
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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rtl_set_rx_tx_config_registers(tp);
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RTL_W8(Cfg9346, Cfg9346_Lock);
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RTL_R8(IntrMask);
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@ -2001,9 +2048,11 @@ static void rtl_hw_start_8168(struct net_device *dev)
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rtl_set_rx_mode(dev);
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
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RTL_W16(IntrMask, rtl8169_intr_mask);
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RTL_W16(IntrMask, tp->intr_event);
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}
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static void rtl_hw_start_8101(struct net_device *dev)
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@ -2042,9 +2091,11 @@ static void rtl_hw_start_8101(struct net_device *dev)
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rtl_set_rx_mode(dev);
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
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RTL_W16(IntrMask, rtl8169_intr_mask);
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RTL_W16(IntrMask, tp->intr_event);
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}
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static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
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@ -2761,9 +2812,17 @@ rtl8169_interrupt(int irq, void *dev_instance)
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RTL_W16(IntrStatus,
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(status & RxFIFOOver) ? (status | RxOverflow) : status);
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if (!(status & rtl8169_intr_mask))
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if (!(status & tp->intr_event))
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break;
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/* Work around for rx fifo overflow */
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if (unlikely(status & RxFIFOOver) &&
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(tp->mac_version == RTL_GIGA_MAC_VER_11)) {
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netif_stop_queue(dev);
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rtl8169_tx_timeout(dev);
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break;
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}
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if (unlikely(status & SYSErr)) {
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rtl8169_pcierr_interrupt(dev);
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break;
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@ -2773,8 +2832,8 @@ rtl8169_interrupt(int irq, void *dev_instance)
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rtl8169_check_link_status(dev, tp, ioaddr);
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#ifdef CONFIG_R8169_NAPI
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RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
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tp->intr_mask = ~rtl8169_napi_event;
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RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);
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tp->intr_mask = ~tp->napi_event;
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if (likely(netif_rx_schedule_prep(dev)))
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__netif_rx_schedule(dev);
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@ -2831,7 +2890,7 @@ static int rtl8169_poll(struct net_device *dev, int *budget)
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* write is safe - FR
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*/
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smp_wmb();
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RTL_W16(IntrMask, rtl8169_intr_mask);
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RTL_W16(IntrMask, tp->intr_event);
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}
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return (work_done >= work_to_do);
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