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gpu: ipu-v3: document valid IPUv3 compatibles and extend for i.MX6 QuadPlus

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Document the valid compatible strings for the IPUv3.

On i.MX6 QuadPlus the IPU needs to know which PRG has to be
used for this IPU instance. Add a "fsl,prg" property containing
a phandle pointing to the correct PRG device.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Lucas Stach 2017-03-08 12:13:17 +01:00 committed by Philipp Zabel
parent ea9c260514
commit 0d6c9a4244
1 changed files with 7 additions and 1 deletions
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8
Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
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@ -21,13 +21,19 @@ Freescale i.MX IPUv3
====================
Required properties:
- compatible: Should be "fsl,<chip>-ipu"
- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
- imx51
- imx53
- imx6q
- imx6qp
- reg: should be register base and length as documented in the
datasheet
- interrupts: Should contain sync interrupt and error interrupt,
in this order.
- resets: phandle pointing to the system reset controller and
reset line index, see reset/fsl,imx-src.txt for details
Additional required properties for fsl,imx6qp-ipu:
- fsl,prg: phandle to prg node associated with this IPU instance
Optional properties:
- port@[0-3]: Port nodes with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.