mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 13:30:57 +07:00
Third Round of Renesas ARM Based SoC DT Updates for v4.5
* Use SoC-specific usb-dmac and IPMMU compatibility strings * Add internal delay for i2c IPs * Add missing serial devices to r8a7793 * Enable DMA for r8a7793 serial devices * Add serial port config to chosen/stdout-path * Tidyup #sound-dai-cells settings for r8a7798/bockw * Remove deprecated #gpio-range-cells from r8a7793 * Add EtherAVB support to r8a7791 * Add MSIOF support to sh73a0 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWc2HNAAoJENfPZGlqN0++39sP/0oRTGW5rtS1YqDuB6lhf8UN kEoXXX2LSyNTw28MqWx4k3ow1zOK8Q75NOgs07pgdSXyIE+2nQgXvVZuq7Piosoe jm+tbVkuwXMNjbcJlX7Sx5zsobUZR6pIb46jBaF7gWVi9FVbqm/9xhHxY3mnqlhs bXF5FU7VrLH2VVh2OC1SyMPbXQhGEOVxhyhNZq2u+7x0AJfxnZwc7XVHlqO4netn emg4BfIAcvcFFc/PBmFeJg48BOf1OJqz0mR2m15k1+J3Uzjq7KZDaV1Ur33h60FT cV2rgHj9CdhDev0ri0aqApMPHhkTPeybxjrKqG0B+AtLnP369Nul9Br/HaLXcbDX mwoYYoG3VeZR1Zvn0ShNuhjiAq9RjFFyyIO2dpBUNQ3V++irGKFc6PSA9h/SdmwU 8AJqdXuMdPmdMekWsHpywpVlUD0fksZ1gOivu9YwY5sTvOtOJfFfGKWOX/u6zSsR el7fFnypnPg63DT8flCxhkpJQYP5M0GJKOk0eaa6wEzZAf0xuspXpdVHIvyRDbXP t+NgUMXWq30bP6ihiQuG7qwhzYcLIGnEbTtsUWQgYu/G4h1lPp9OOCsKM7oSD29n ABO5u+xIutjXo6lxw+cehGTeN6V9FFHqs0rafV0lUhVwEmRSZ7g1UhKr64+EPhXW NxX/WLeR2kdIU7WCDtNC =bncx -----END PGP SIGNATURE----- Merge tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Third Round of Renesas ARM Based SoC DT Updates for v4.5 * Use SoC-specific usb-dmac and IPMMU compatibility strings * Add internal delay for i2c IPs * Add missing serial devices to r8a7793 * Enable DMA for r8a7793 serial devices * Add serial port config to chosen/stdout-path * Tidyup #sound-dai-cells settings for r8a7798/bockw * Remove deprecated #gpio-range-cells from r8a7793 * Add EtherAVB support to r8a7791 * Add MSIOF support to sh73a0 * tag 'renesas-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (25 commits) ARM: shmobile: r8a779x: use SoC-specific usb-dmac compatibility strings ARM: shmobile: r8a7794: IPMMU compat string SoC part number update ARM: shmobile: r8a7793: IPMMU compat string SoC part number update ARM: shmobile: r8a7791: IPMMU compat string SoC part number update ARM: shmobile: r8a7790: IPMMU compat string SoC part number update ARM: shmobile: r8a7794: dtsi: add internal delay for i2c IPs ARM: shmobile: r8a7791: dtsi: add internal delay for i2c IPs ARM: shmobile: r8a7790: dtsi: add internal delay for i2c IPs ARM: shmobile: r8a7793: Describe DMA for the serial ports ARM: shmobile: r8a7793: Add missing serial devices to DT ARM: shmobile: lager dts: Add serial port config to chosen/stdout-path ARM: shmobile: porter dts: Add serial port config to chosen/stdout-path ARM: shmobile: silk dts: Add serial port config to chosen/stdout-path ARM: shmobile: gose dts: Add serial port config to chosen/stdout-path ARM: shmobile: bockw dts: Update console parameters ARM: shmobile: ape6evm dts: Add serial port config to chosen/stdout-path ARM: shmobile: alt dts: Add serial port config to chosen/stdout-path ARM: shmobile: koelsch dts: Add serial port config to chosen/stdout-path ARM: shmobile: r8a7778: tidyup #sound-dai-cells settings ARM: shmobile: bockw dts: Override #sound-dai-cells to zero ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
0d639e0a65
@ -23,7 +23,7 @@ aliases {
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chosen {
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bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
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stdout-path = &scifa0;
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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@ -28,8 +28,8 @@ aliases {
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};
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chosen {
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bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
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stdout-path = &scif0;
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bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw";
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stdout-path = "serial0:115200n8";
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};
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memory {
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@ -172,6 +172,11 @@ vin1_pins: vin1 {
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};
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};
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&rcar_sound {
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/* Single DAI */
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#sound-dai-cells = <0>;
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
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pinctrl-names = "default";
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@ -236,7 +236,12 @@ tmu2: timer@ffd82000 {
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};
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rcar_sound: sound@ffd90000 {
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#sound-dai-cells = <1>;
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/*
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* #sound-dai-cells is required
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*
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* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
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* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
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*/
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compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
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reg = <0xffd90000 0x1000>, /* SRU */
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<0xffd91000 0x240>, /* SSI */
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@ -53,7 +53,7 @@ aliases {
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = &scif0;
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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@ -386,7 +386,7 @@ audma1: dma-controller@ec720000 {
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};
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usb_dmac0: dma-controller@e65a0000 {
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compatible = "renesas,usb-dmac";
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compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
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reg = <0 0xe65a0000 0 0x100>;
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interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
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0 109 IRQ_TYPE_LEVEL_HIGH>;
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@ -398,7 +398,7 @@ usb_dmac0: dma-controller@e65a0000 {
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};
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usb_dmac1: dma-controller@e65b0000 {
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compatible = "renesas,usb-dmac";
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compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
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reg = <0 0xe65b0000 0 0x100>;
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
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0 110 IRQ_TYPE_LEVEL_HIGH>;
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@ -417,6 +417,7 @@ i2c0: i2c@e6508000 {
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <110>;
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status = "disabled";
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};
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@ -428,6 +429,7 @@ i2c1: i2c@e6518000 {
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interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -439,6 +441,7 @@ i2c2: i2c@e6530000 {
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interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -450,6 +453,7 @@ i2c3: i2c@e6540000 {
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interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <110>;
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status = "disabled";
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};
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@ -1766,7 +1770,7 @@ ssi9: ssi@9 {
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};
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ipmmu_sy0: mmu@e6280000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
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<0 224 IRQ_TYPE_LEVEL_HIGH>;
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@ -1775,7 +1779,7 @@ ipmmu_sy0: mmu@e6280000 {
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};
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ipmmu_sy1: mmu@e6290000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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@ -1783,7 +1787,7 @@ ipmmu_sy1: mmu@e6290000 {
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};
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ipmmu_ds: mmu@e6740000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
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<0 199 IRQ_TYPE_LEVEL_HIGH>;
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@ -1792,7 +1796,7 @@ ipmmu_ds: mmu@e6740000 {
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};
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ipmmu_mp: mmu@ec680000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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@ -1800,7 +1804,7 @@ ipmmu_mp: mmu@ec680000 {
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};
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ipmmu_mx: mmu@fe951000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
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<0 221 IRQ_TYPE_LEVEL_HIGH>;
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@ -1809,7 +1813,7 @@ ipmmu_mx: mmu@fe951000 {
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};
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ipmmu_rt: mmu@ffc80000 {
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compatible = "renesas,ipmmu-vmsa";
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compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
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reg = <0 0xffc80000 0 0x1000>;
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interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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@ -54,7 +54,7 @@ aliases {
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = &scif0;
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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@ -22,7 +22,7 @@ aliases {
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = &scif0;
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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@ -375,7 +375,7 @@ audma1: dma-controller@ec720000 {
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};
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usb_dmac0: dma-controller@e65a0000 {
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compatible = "renesas,usb-dmac";
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compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
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reg = <0 0xe65a0000 0 0x100>;
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interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
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0 109 IRQ_TYPE_LEVEL_HIGH>;
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@ -387,7 +387,7 @@ usb_dmac0: dma-controller@e65a0000 {
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};
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usb_dmac1: dma-controller@e65b0000 {
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compatible = "renesas,usb-dmac";
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compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
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reg = <0 0xe65b0000 0 0x100>;
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
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0 110 IRQ_TYPE_LEVEL_HIGH>;
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@ -407,6 +407,7 @@ i2c0: i2c@e6508000 {
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -418,6 +419,7 @@ i2c1: i2c@e6518000 {
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interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -429,6 +431,7 @@ i2c2: i2c@e6530000 {
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interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -440,6 +443,7 @@ i2c3: i2c@e6540000 {
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interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -451,6 +455,7 @@ i2c4: i2c@e6520000 {
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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@ -463,6 +468,7 @@ i2c5: i2c@e6528000 {
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interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <110>;
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status = "disabled";
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};
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@ -785,6 +791,18 @@ ether: ethernet@ee700000 {
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status = "disabled";
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};
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avb: ethernet@e6800000 {
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compatible = "renesas,etheravb-r8a7791",
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"renesas,etheravb-rcar-gen2";
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reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
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interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
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power-domains = <&cpg_clocks>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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sata0: sata@ee300000 {
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compatible = "renesas,sata-r8a7791";
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reg = <0 0xee300000 0 0x2000>;
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@ -1329,16 +1347,18 @@ mstp8_clks: mstp8_clks@e6150990 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
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clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
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<&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
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<&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
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<&zs_clk>;
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#clock-cells = <1>;
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clock-indices = <
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R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
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R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
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R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
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R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
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R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
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>;
|
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clock-output-names =
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"ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether",
|
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"sata1", "sata0";
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"ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
|
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"etheravb", "ether", "sata1", "sata0";
|
||||
};
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mstp9_clks: mstp9_clks@e6150994 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
|
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@ -1570,7 +1590,7 @@ pciec: pcie@fe000000 {
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1579,7 +1599,7 @@ ipmmu_sy0: mmu@e6280000 {
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -1587,7 +1607,7 @@ ipmmu_sy1: mmu@e6290000 {
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1596,7 +1616,7 @@ ipmmu_ds: mmu@e6740000 {
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -1604,7 +1624,7 @@ ipmmu_mp: mmu@ec680000 {
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1613,7 +1633,7 @@ ipmmu_mx: mmu@fe951000 {
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -1621,7 +1641,7 @@ ipmmu_rt: mmu@ffc80000 {
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 261 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
@ -24,7 +24,7 @@ aliases {
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
stdout-path = &scif0;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
|
||||
@ -233,7 +233,6 @@ irqc0: interrupt-controller@e61c0000 {
|
||||
pfc: pfc@e6060000 {
|
||||
compatible = "renesas,pfc-r8a7793";
|
||||
reg = <0 0xe6060000 0 0x250>;
|
||||
#gpio-range-cells = <3>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@e6700000 {
|
||||
@ -298,12 +297,122 @@ dmac1: dma-controller@e6720000 {
|
||||
dma-channels = <15>;
|
||||
};
|
||||
|
||||
scifa0: serial@e6c40000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c40000 0 64>;
|
||||
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifa1: serial@e6c50000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c50000 0 64>;
|
||||
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x25>, <&dmac0 0x26>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifa2: serial@e6c60000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c60000 0 64>;
|
||||
interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x27>, <&dmac0 0x28>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifa3: serial@e6c70000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c70000 0 64>;
|
||||
interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifa4: serial@e6c78000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c78000 0 64>;
|
||||
interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifa5: serial@e6c80000 {
|
||||
compatible = "renesas,scifa-r8a7793", "renesas,scifa";
|
||||
reg = <0 0xe6c80000 0 64>;
|
||||
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x23>, <&dmac0 0x24>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifb0: serial@e6c20000 {
|
||||
compatible = "renesas,scifb-r8a7793", "renesas,scifb";
|
||||
reg = <0 0xe6c20000 0 64>;
|
||||
interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifb1: serial@e6c30000 {
|
||||
compatible = "renesas,scifb-r8a7793", "renesas,scifb";
|
||||
reg = <0 0xe6c30000 0 64>;
|
||||
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scifb2: serial@e6ce0000 {
|
||||
compatible = "renesas,scifb-r8a7793", "renesas,scifb";
|
||||
reg = <0 0xe6ce0000 0 64>;
|
||||
interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif0: serial@e6e60000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6e60000 0 64>;
|
||||
interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF0>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -314,6 +423,92 @@ scif1: serial@e6e68000 {
|
||||
interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF1>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif2: serial@e6e58000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6e58000 0 64>;
|
||||
interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF2>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif3: serial@e6ea8000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6ea8000 0 64>;
|
||||
interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF3>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif4: serial@e6ee0000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6ee0000 0 64>;
|
||||
interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF4>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif5: serial@e6ee8000 {
|
||||
compatible = "renesas,scif-r8a7793", "renesas,scif";
|
||||
reg = <0 0xe6ee8000 0 64>;
|
||||
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_SCIF5>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif0: serial@e62c0000 {
|
||||
compatible = "renesas,hscif-r8a7793", "renesas,hscif";
|
||||
reg = <0 0xe62c0000 0 96>;
|
||||
interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif1: serial@e62c8000 {
|
||||
compatible = "renesas,hscif-r8a7793", "renesas,hscif";
|
||||
reg = <0 0xe62c8000 0 96>;
|
||||
interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif2: serial@e62d0000 {
|
||||
compatible = "renesas,hscif-r8a7793", "renesas,hscif";
|
||||
reg = <0 0xe62d0000 0 96>;
|
||||
interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>;
|
||||
clock-names = "sci_ick";
|
||||
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&cpg_clocks>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -530,12 +725,17 @@ R8A7793_CLK_VSP1_S
|
||||
mstp2_clks: mstp2_clks@e6150138 {
|
||||
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
|
||||
clocks = <&zs_clk>, <&zs_clk>;
|
||||
clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
|
||||
<&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
R8A7793_CLK_SCIFA2 R8A7793_CLK_SCIFA1 R8A7793_CLK_SCIFA0
|
||||
R8A7793_CLK_SCIFB0 R8A7793_CLK_SCIFB1 R8A7793_CLK_SCIFB2
|
||||
R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
|
||||
>;
|
||||
clock-output-names = "sys-dmac1", "sys-dmac0";
|
||||
clock-output-names =
|
||||
"scifa2", "scifa1", "scifa0", "scifb0",
|
||||
"scifb1", "scifb2", "sys-dmac1", "sys-dmac0";
|
||||
};
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,r8a7793-mstp-clocks",
|
||||
@ -634,10 +834,20 @@ R8A7793_CLK_QSPI_MOD
|
||||
"gpio3", "gpio2", "gpio1", "gpio0",
|
||||
"qspi_mod";
|
||||
};
|
||||
mstp11_clks: mstp11_clks@e615099c {
|
||||
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
|
||||
clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
R8A7793_CLK_SCIFA3 R8A7793_CLK_SCIFA4 R8A7793_CLK_SCIFA5
|
||||
>;
|
||||
clock-output-names = "scifa3", "scifa4", "scifa5";
|
||||
};
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -646,7 +856,7 @@ ipmmu_sy0: mmu@e6280000 {
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -654,7 +864,7 @@ ipmmu_sy1: mmu@e6290000 {
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -663,7 +873,7 @@ ipmmu_ds: mmu@e6740000 {
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -671,7 +881,7 @@ ipmmu_mp: mmu@ec680000 {
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -680,7 +890,7 @@ ipmmu_mx: mmu@fe951000 {
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -688,7 +898,7 @@ ipmmu_rt: mmu@ffc80000 {
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 261 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
@ -21,7 +21,7 @@ aliases {
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
stdout-path = &scif2;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
|
||||
@ -24,7 +24,7 @@ aliases {
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
stdout-path = &scif2;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
|
||||
@ -518,6 +518,7 @@ i2c0: i2c@e6508000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -529,6 +530,7 @@ i2c1: i2c@e6518000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -540,6 +542,7 @@ i2c2: i2c@e6530000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -551,6 +554,7 @@ i2c3: i2c@e6540000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -562,6 +566,7 @@ i2c4: i2c@e6520000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -573,6 +578,7 @@ i2c5: i2c@e6528000 {
|
||||
power-domains = <&cpg_clocks>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1103,7 +1109,7 @@ R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1112,7 +1118,7 @@ ipmmu_sy0: mmu@e6280000 {
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -1120,7 +1126,7 @@ ipmmu_sy1: mmu@e6290000 {
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1129,7 +1135,7 @@ ipmmu_ds: mmu@e6740000 {
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
@ -1137,7 +1143,7 @@ ipmmu_mp: mmu@ec680000 {
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1146,7 +1152,7 @@ ipmmu_mx: mmu@fe951000 {
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 261 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
@ -273,6 +273,50 @@ mmcif: mmc@e6bd0000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
|
||||
reg = <0xe6e20000 0x0064>;
|
||||
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks SH73A0_CLK_MSIOF0>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof1: spi@e6e10000 {
|
||||
compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
|
||||
reg = <0xe6e10000 0x0064>;
|
||||
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks SH73A0_CLK_MSIOF1>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof2: spi@e6e00000 {
|
||||
compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
|
||||
reg = <0xe6e00000 0x0064>;
|
||||
interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks SH73A0_CLK_MSIOF2>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof3: spi@e6c90000 {
|
||||
compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof";
|
||||
reg = <0xe6c90000 0x0064>;
|
||||
interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks SH73A0_CLK_MSIOF3>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhi0: sd@ee100000 {
|
||||
compatible = "renesas,sdhi-sh73a0";
|
||||
reg = <0xee100000 0x100>;
|
||||
@ -812,13 +856,13 @@ twd_clk: twd_clk {
|
||||
mstp0_clks: mstp0_clks@e6150130 {
|
||||
compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
reg = <0xe6150130 4>, <0xe6150030 4>;
|
||||
clocks = <&cpg_clocks SH73A0_CLK_HP>;
|
||||
clocks = <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
SH73A0_CLK_IIC2
|
||||
SH73A0_CLK_IIC2 SH73A0_CLK_MSIOF0
|
||||
>;
|
||||
clock-output-names =
|
||||
"iic2";
|
||||
"iic2", "msiof0";
|
||||
};
|
||||
mstp1_clks: mstp1_clks@e6150134 {
|
||||
compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
@ -848,20 +892,24 @@ mstp2_clks: mstp2_clks@e6150138 {
|
||||
reg = <0xe6150138 4>, <0xe6150040 4>;
|
||||
clocks = <&sub_clk>, <&cpg_clocks SH73A0_CLK_HP>,
|
||||
<&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>,
|
||||
<&sub_clk>, <&sub_clk>, <&sub_clk>, <&sub_clk>,
|
||||
<&sub_clk>, <&sub_clk>;
|
||||
<&sub_clk>, <&sub_clk>, <&sub_clk>,
|
||||
<&sub_clk>, <&sub_clk>, <&sub_clk>,
|
||||
<&sub_clk>, <&sub_clk>, <&sub_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <
|
||||
SH73A0_CLK_SCIFA7 SH73A0_CLK_SY_DMAC
|
||||
SH73A0_CLK_MP_DMAC SH73A0_CLK_SCIFA5
|
||||
SH73A0_CLK_SCIFB SH73A0_CLK_SCIFA0
|
||||
SH73A0_CLK_SCIFA1 SH73A0_CLK_SCIFA2
|
||||
SH73A0_CLK_SCIFA3 SH73A0_CLK_SCIFA4
|
||||
SH73A0_CLK_MP_DMAC SH73A0_CLK_MSIOF3
|
||||
SH73A0_CLK_MSIOF1 SH73A0_CLK_SCIFA5
|
||||
SH73A0_CLK_SCIFB SH73A0_CLK_MSIOF2
|
||||
SH73A0_CLK_SCIFA0 SH73A0_CLK_SCIFA1
|
||||
SH73A0_CLK_SCIFA2 SH73A0_CLK_SCIFA3
|
||||
SH73A0_CLK_SCIFA4
|
||||
>;
|
||||
clock-output-names =
|
||||
"scifa7", "sy_dmac", "mp_dmac", "scifa5",
|
||||
"scifb", "scifa0", "scifa1", "scifa2",
|
||||
"scifa3", "scifa4";
|
||||
"scifa7", "sy_dmac", "mp_dmac", "msiof3",
|
||||
"msiof1", "scifa5", "scifb", "msiof2",
|
||||
"scifa0", "scifa1", "scifa2", "scifa3",
|
||||
"scifa4";
|
||||
};
|
||||
mstp3_clks: mstp3_clks@e615013c {
|
||||
compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
|
||||
|
||||
@ -102,6 +102,7 @@
|
||||
#define R8A7791_CLK_VIN2 9
|
||||
#define R8A7791_CLK_VIN1 10
|
||||
#define R8A7791_CLK_VIN0 11
|
||||
#define R8A7791_CLK_ETHERAVB 12
|
||||
#define R8A7791_CLK_ETHER 13
|
||||
#define R8A7791_CLK_SATA1 14
|
||||
#define R8A7791_CLK_SATA0 15
|
||||
|
||||
@ -28,7 +28,8 @@
|
||||
#define SH73A0_CLK_HP 14
|
||||
|
||||
/* MSTP0 */
|
||||
#define SH73A0_CLK_IIC2 1
|
||||
#define SH73A0_CLK_IIC2 1
|
||||
#define SH73A0_CLK_MSIOF0 0
|
||||
|
||||
/* MSTP1 */
|
||||
#define SH73A0_CLK_CEU1 29
|
||||
@ -45,8 +46,11 @@
|
||||
#define SH73A0_CLK_SCIFA7 19
|
||||
#define SH73A0_CLK_SY_DMAC 18
|
||||
#define SH73A0_CLK_MP_DMAC 17
|
||||
#define SH73A0_CLK_MSIOF3 15
|
||||
#define SH73A0_CLK_MSIOF1 8
|
||||
#define SH73A0_CLK_SCIFA5 7
|
||||
#define SH73A0_CLK_SCIFB 6
|
||||
#define SH73A0_CLK_MSIOF2 5
|
||||
#define SH73A0_CLK_SCIFA0 4
|
||||
#define SH73A0_CLK_SCIFA1 3
|
||||
#define SH73A0_CLK_SCIFA2 2
|
||||
|
||||
Loading…
Reference in New Issue
Block a user