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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/vc4: plane: Move additional planes creation to driver
So far the plane creation was done when each CRTC was bound, and those planes were only tied to the CRTC that was registering them. This causes two main issues: - The planes in the vc4 hardware are actually not tied to any CRTC, but can be used with every combination - More importantly, so far, we allocate 10 planes per CRTC, with 3 CRTCs. However, the next generation of hardware will have 5 CRTCs, putting us well above the maximum of 32 planes currently allowed by DRM. This patch is the first one in a series of patches that will take down both of these issues so that we can support the next generation of hardware while keeping a good amount of planes. We start by changing the way the planes are registered to first registering the primary planes for each CRTC in the CRTC bind function as we used to, but moving the overlay and cursor creation to the main driver bind function, after all the CRTCs have been bound, and make the planes associated to all CRTCs. This will slightly change the ID order of the planes, since the primary planes of all CRTCs will be first, and then a pattern of 8 overlays, 1 cursor plane for each CRTC. This shouldn't cause any trouble since the ordering between the planes is preserved though. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/0b85a3fdb20bb4ff85fb62cabd082d5a65e2730b.1590594512.git-series.maxime@cerno.tech
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@ -1178,10 +1178,6 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
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*/
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drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
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ret = vc4_plane_create_additional_planes(drm, crtc);
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if (ret)
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goto err_destroy_planes;
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vc4_crtc_get_cob_allocation(vc4_crtc);
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CRTC_WRITE(PV_INTEN, 0);
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@ -288,6 +288,10 @@ static int vc4_drm_bind(struct device *dev)
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if (ret)
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goto gem_destroy;
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ret = vc4_plane_create_additional_planes(drm);
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if (ret)
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goto unbind_all;
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drm_fb_helper_remove_conflicting_framebuffers(NULL, "vc4drmfb", false);
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ret = vc4_kms_load(drm);
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@ -846,8 +846,7 @@ int vc4_kms_load(struct drm_device *dev);
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/* vc4_plane.c */
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struct drm_plane *vc4_plane_init(struct drm_device *dev,
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enum drm_plane_type type);
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int vc4_plane_create_additional_planes(struct drm_device *dev,
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struct drm_crtc *crtc);
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int vc4_plane_create_additional_planes(struct drm_device *dev);
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u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
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u32 vc4_plane_dlist_size(const struct drm_plane_state *state);
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void vc4_plane_async_set_fb(struct drm_plane *plane,
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@ -1268,10 +1268,10 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
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return plane;
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}
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int vc4_plane_create_additional_planes(struct drm_device *drm,
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struct drm_crtc *crtc)
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int vc4_plane_create_additional_planes(struct drm_device *drm)
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{
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struct drm_plane *cursor_plane;
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struct drm_crtc *crtc;
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unsigned int i;
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/* Set up some arbitrary number of planes. We're not limited
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@ -1290,17 +1290,20 @@ int vc4_plane_create_additional_planes(struct drm_device *drm,
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if (IS_ERR(plane))
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continue;
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plane->possible_crtcs = drm_crtc_mask(crtc);
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plane->possible_crtcs =
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GENMASK(drm->mode_config.num_crtc - 1, 0);
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}
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/* Set up the legacy cursor after overlay initialization,
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* since we overlay planes on the CRTC in the order they were
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* initialized.
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*/
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cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
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if (!IS_ERR(cursor_plane)) {
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cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
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crtc->cursor = cursor_plane;
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drm_for_each_crtc(crtc, drm) {
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/* Set up the legacy cursor after overlay initialization,
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* since we overlay planes on the CRTC in the order they were
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* initialized.
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*/
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cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
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if (!IS_ERR(cursor_plane)) {
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cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
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crtc->cursor = cursor_plane;
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}
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}
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return 0;
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