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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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[SCSI] sun3x_esp: convert to esp_scsi
Converted sun3x_esp driver to use esp_scsi.c Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
This commit is contained in:
Thomas Bogendoerfer
James Bottomley
parent
f8d9d654fc
commit
0bb67f1818
@ -1779,6 +1779,7 @@ config SUN3_SCSI
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config SUN3X_ESP
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bool "Sun3x ESP SCSI"
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depends on SUN3X && SCSI=y
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select SCSI_SPI_ATTRS
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help
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The ESP was an on-board SCSI controller used on Sun 3/80
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machines. Say Y here to compile in support for it.
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@ -118,7 +118,7 @@ obj-$(CONFIG_SCSI_3W_9XXX) += 3w-9xxx.o
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obj-$(CONFIG_SCSI_PPA) += ppa.o
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obj-$(CONFIG_SCSI_IMM) += imm.o
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obj-$(CONFIG_JAZZ_ESP) += esp_scsi.o jazz_esp.o
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obj-$(CONFIG_SUN3X_ESP) += NCR53C9x.o sun3x_esp.o
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obj-$(CONFIG_SUN3X_ESP) += esp_scsi.o sun3x_esp.o
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obj-$(CONFIG_SCSI_LASI700) += 53c700.o lasi700.o
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obj-$(CONFIG_SCSI_SNI_53C710) += 53c700.o sni_53c710.o
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obj-$(CONFIG_SCSI_NSP32) += nsp32.o
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@ -1,392 +1,316 @@
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/* sun3x_esp.c: EnhancedScsiProcessor Sun3x SCSI driver code.
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/* sun3x_esp.c: ESP front-end for Sun3x systems.
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*
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* (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*
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* Based on David S. Miller's esp driver
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* Copyright (C) 2007,2008 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/blkdev.h>
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#include <linux/proc_fs.h>
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#include <linux/stat.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "NCR53C9x.h"
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#include <asm/sun3x.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/dvma.h>
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#include <asm/irq.h>
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static void dma_barrier(struct NCR_ESP *esp);
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
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static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_drain(struct NCR_ESP *esp);
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static void dma_invalidate(struct NCR_ESP *esp);
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static void dma_dump_state(struct NCR_ESP *esp);
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static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
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static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
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static void dma_ints_off(struct NCR_ESP *esp);
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static void dma_ints_on(struct NCR_ESP *esp);
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static int dma_irq_p(struct NCR_ESP *esp);
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static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr);
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static int dma_ports_p(struct NCR_ESP *esp);
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static void dma_reset(struct NCR_ESP *esp);
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static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
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static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_advance_sg (Scsi_Cmnd *sp);
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/* DMA controller reg offsets */
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#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
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#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
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#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
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#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
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/* Detecting ESP chips on the machine. This is the simple and easy
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* version.
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#include <scsi/scsi_host.h>
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#include "esp_scsi.h"
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#define DRV_MODULE_NAME "sun3x_esp"
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#define PFX DRV_MODULE_NAME ": "
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#define DRV_VERSION "1.000"
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#define DRV_MODULE_RELDATE "Nov 1, 2007"
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/*
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* m68k always assumes readl/writel operate on little endian
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* mmio space; this is wrong at least for Sun3x, so we
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* need to workaround this until a proper way is found
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*/
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int sun3x_esp_detect(struct scsi_host_template *tpnt)
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#if 0
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#define dma_read32(REG) \
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readl(esp->dma_regs + (REG))
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#define dma_write32(VAL, REG) \
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writel((VAL), esp->dma_regs + (REG))
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#else
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#define dma_read32(REG) \
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*(volatile u32 *)(esp->dma_regs + (REG))
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#define dma_write32(VAL, REG) \
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do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
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#endif
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static void sun3x_esp_write8(struct esp *esp, u8 val, unsigned long reg)
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{
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struct NCR_ESP *esp;
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struct ConfigDev *esp_dev;
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writeb(val, esp->regs + (reg * 4UL));
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}
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esp_dev = 0;
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esp = esp_allocate(tpnt, esp_dev, 0);
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static u8 sun3x_esp_read8(struct esp *esp, unsigned long reg)
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{
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return readb(esp->regs + (reg * 4UL));
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}
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/* Do command transfer with DMA */
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esp->do_pio_cmds = 0;
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static dma_addr_t sun3x_esp_map_single(struct esp *esp, void *buf,
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size_t sz, int dir)
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{
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return dma_map_single(esp->dev, buf, sz, dir);
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}
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/* Required functions */
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esp->dma_bytes_sent = &dma_bytes_sent;
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esp->dma_can_transfer = &dma_can_transfer;
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esp->dma_dump_state = &dma_dump_state;
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esp->dma_init_read = &dma_init_read;
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esp->dma_init_write = &dma_init_write;
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esp->dma_ints_off = &dma_ints_off;
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esp->dma_ints_on = &dma_ints_on;
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esp->dma_irq_p = &dma_irq_p;
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esp->dma_ports_p = &dma_ports_p;
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esp->dma_setup = &dma_setup;
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static int sun3x_esp_map_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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return dma_map_sg(esp->dev, sg, num_sg, dir);
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}
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/* Optional functions */
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esp->dma_barrier = &dma_barrier;
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esp->dma_invalidate = &dma_invalidate;
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esp->dma_drain = &dma_drain;
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esp->dma_irq_entry = 0;
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esp->dma_irq_exit = 0;
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esp->dma_led_on = 0;
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esp->dma_led_off = 0;
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esp->dma_poll = &dma_poll;
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esp->dma_reset = &dma_reset;
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static void sun3x_esp_unmap_single(struct esp *esp, dma_addr_t addr,
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size_t sz, int dir)
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{
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dma_unmap_single(esp->dev, addr, sz, dir);
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}
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/* virtual DMA functions */
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esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
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esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
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esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
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esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
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esp->dma_advance_sg = &dma_advance_sg;
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static void sun3x_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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dma_unmap_sg(esp->dev, sg, num_sg, dir);
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}
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/* SCSI chip speed */
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esp->cfreq = 20000000;
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esp->eregs = (struct ESP_regs *)(SUN3X_ESP_BASE);
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esp->dregs = (void *)SUN3X_ESP_DMA;
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esp->esp_command = (volatile unsigned char *)dvma_malloc(DVMA_PAGE_SIZE);
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esp->esp_command_dvma = dvma_vtob((unsigned long)esp->esp_command);
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esp->irq = 2;
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if (request_irq(esp->irq, esp_intr, IRQF_DISABLED,
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"SUN3X SCSI", esp->ehost)) {
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esp_deallocate(esp);
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static int sun3x_esp_irq_pending(struct esp *esp)
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{
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if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
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return 1;
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return 0;
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}
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esp->scsi_id = 7;
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esp->diff = 0;
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static void sun3x_esp_reset_dma(struct esp *esp)
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{
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u32 val;
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esp_initialize(esp);
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val = dma_read32(DMA_CSR);
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dma_write32(val | DMA_RST_SCSI, DMA_CSR);
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dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
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/* for reasons beyond my knowledge (and which should likely be fixed)
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sync mode doesn't work on a 3/80 at 5mhz. but it does at 4. */
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esp->sync_defp = 0x3f;
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printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
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esps_in_use);
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esps_running = esps_in_use;
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return esps_in_use;
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/* Enable interrupts. */
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val = dma_read32(DMA_CSR);
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dma_write32(val | DMA_INT_ENAB, DMA_CSR);
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}
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static void dma_do_drain(struct NCR_ESP *esp)
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static void sun3x_esp_dma_drain(struct esp *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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u32 csr;
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int lim;
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int count = 500000;
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csr = dma_read32(DMA_CSR);
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if (!(csr & DMA_FIFO_ISDRAIN))
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return;
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while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
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dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
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lim = 1000;
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while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
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if (--lim == 0) {
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printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
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esp->host->unique_id);
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break;
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}
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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}
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dregs->cond_reg |= DMA_FIFO_STDRAIN;
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static void sun3x_esp_dma_invalidate(struct esp *esp)
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{
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u32 val;
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int lim;
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count = 500000;
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while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
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lim = 1000;
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while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
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if (--lim == 0) {
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printk(KERN_ALERT PFX "esp%d: DMA will not "
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"invalidate!\n", esp->host->unique_id);
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break;
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}
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
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val |= DMA_FIFO_INV;
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dma_write32(val, DMA_CSR);
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val &= ~DMA_FIFO_INV;
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dma_write32(val, DMA_CSR);
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}
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static void dma_barrier(struct NCR_ESP *esp)
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static void sun3x_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
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u32 dma_count, int write, u8 cmd)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int count = 500000;
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u32 csr;
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while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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dregs->cond_reg &= ~(DMA_ENABLE);
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}
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/* This uses various DMA csr fields and the fifo flags count value to
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* determine how many bytes were successfully sent/received by the ESP.
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*/
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int rval = dregs->st_addr - esp->esp_command_dvma;
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return rval - fifo_count;
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}
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static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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return sp->SCp.this_residual;
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}
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static void dma_drain(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int count = 500000;
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if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
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dregs->cond_reg |= DMA_FIFO_STDRAIN;
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while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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}
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}
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static void dma_invalidate(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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__u32 tmp;
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int count = 500000;
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while(((tmp = dregs->cond_reg) & DMA_PEND_READ) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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dregs->cond_reg = tmp | DMA_FIFO_INV;
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dregs->cond_reg &= ~DMA_FIFO_INV;
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}
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static void dma_dump_state(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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ESPLOG(("esp%d: dma -- cond_reg<%08lx> addr<%08lx>\n",
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esp->esp_id, dregs->cond_reg, dregs->st_addr));
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}
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static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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dregs->st_addr = vaddress;
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dregs->cond_reg |= (DMA_ST_WRITE | DMA_ENABLE);
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}
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static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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/* Set up the DMA counters */
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dregs->st_addr = vaddress;
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dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) | DMA_ENABLE);
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}
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static void dma_ints_off(struct NCR_ESP *esp)
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{
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DMA_INTSOFF((struct sparc_dma_registers *) esp->dregs);
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}
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static void dma_ints_on(struct NCR_ESP *esp)
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{
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DMA_INTSON((struct sparc_dma_registers *) esp->dregs);
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}
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static int dma_irq_p(struct NCR_ESP *esp)
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{
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return DMA_IRQ_P((struct sparc_dma_registers *) esp->dregs);
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}
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static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr)
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{
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int count = 50;
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dma_do_drain(esp);
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/* Wait till the first bits settle. */
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while((*(volatile unsigned char *)vaddr == 0xff) && (--count > 0))
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udelay(1);
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if(!count) {
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// printk("%s:%d timeout expire (data %02x)\n", __FILE__, __LINE__,
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// esp_read(esp->eregs->esp_fdata));
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//mach_halt();
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vaddr[0] = esp_read(esp->eregs->esp_fdata);
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vaddr[1] = esp_read(esp->eregs->esp_fdata);
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}
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}
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static int dma_ports_p(struct NCR_ESP *esp)
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{
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return (((struct sparc_dma_registers *) esp->dregs)->cond_reg
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& DMA_INT_ENAB);
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}
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||||
/* Resetting various pieces of the ESP scsi driver chipset/buses. */
|
||||
static void dma_reset(struct NCR_ESP *esp)
|
||||
{
|
||||
struct sparc_dma_registers *dregs =
|
||||
(struct sparc_dma_registers *)esp->dregs;
|
||||
|
||||
/* Punt the DVMA into a known state. */
|
||||
dregs->cond_reg |= DMA_RST_SCSI;
|
||||
dregs->cond_reg &= ~(DMA_RST_SCSI);
|
||||
DMA_INTSON(dregs);
|
||||
}
|
||||
|
||||
static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
|
||||
{
|
||||
struct sparc_dma_registers *dregs =
|
||||
(struct sparc_dma_registers *) esp->dregs;
|
||||
unsigned long nreg = dregs->cond_reg;
|
||||
|
||||
// printk("dma_setup %c addr %08x cnt %08x\n",
|
||||
// write ? 'W' : 'R', addr, count);
|
||||
|
||||
dma_do_drain(esp);
|
||||
BUG_ON(!(cmd & ESP_CMD_DMA));
|
||||
|
||||
sun3x_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
|
||||
sun3x_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
|
||||
csr = dma_read32(DMA_CSR);
|
||||
csr |= DMA_ENABLE;
|
||||
if (write)
|
||||
nreg |= DMA_ST_WRITE;
|
||||
else {
|
||||
nreg &= ~(DMA_ST_WRITE);
|
||||
csr |= DMA_ST_WRITE;
|
||||
else
|
||||
csr &= ~DMA_ST_WRITE;
|
||||
dma_write32(csr, DMA_CSR);
|
||||
dma_write32(addr, DMA_ADDR);
|
||||
|
||||
scsi_esp_cmd(esp, cmd);
|
||||
}
|
||||
|
||||
nreg |= DMA_ENABLE;
|
||||
dregs->cond_reg = nreg;
|
||||
dregs->st_addr = addr;
|
||||
}
|
||||
|
||||
static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
|
||||
static int sun3x_esp_dma_error(struct esp *esp)
|
||||
{
|
||||
sp->SCp.have_data_in = dvma_map((unsigned long)sp->SCp.buffer,
|
||||
sp->SCp.this_residual);
|
||||
sp->SCp.ptr = (char *)((unsigned long)sp->SCp.have_data_in);
|
||||
}
|
||||
u32 csr = dma_read32(DMA_CSR);
|
||||
|
||||
static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
|
||||
{
|
||||
int sz = sp->SCp.buffers_residual;
|
||||
struct scatterlist *sg = sp->SCp.buffer;
|
||||
|
||||
while (sz >= 0) {
|
||||
sg[sz].dma_address = dvma_map((unsigned long)sg_virt(&sg[sz]),
|
||||
sg[sz].length);
|
||||
sz--;
|
||||
}
|
||||
sp->SCp.ptr=(char *)((unsigned long)sp->SCp.buffer->dma_address);
|
||||
}
|
||||
|
||||
static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
|
||||
{
|
||||
dvma_unmap((char *)sp->SCp.have_data_in);
|
||||
}
|
||||
|
||||
static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
|
||||
{
|
||||
int sz = sp->use_sg - 1;
|
||||
struct scatterlist *sg = (struct scatterlist *)sp->request_buffer;
|
||||
|
||||
while(sz >= 0) {
|
||||
dvma_unmap((char *)sg[sz].dma_address);
|
||||
sz--;
|
||||
}
|
||||
}
|
||||
|
||||
static void dma_advance_sg (Scsi_Cmnd *sp)
|
||||
{
|
||||
sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dma_address);
|
||||
}
|
||||
|
||||
static int sun3x_esp_release(struct Scsi_Host *instance)
|
||||
{
|
||||
/* this code does not support being compiled as a module */
|
||||
if (csr & DMA_HNDL_ERROR)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct scsi_host_template driver_template = {
|
||||
.proc_name = "sun3x_esp",
|
||||
.proc_info = &esp_proc_info,
|
||||
.name = "Sun ESP 100/100a/200",
|
||||
.detect = sun3x_esp_detect,
|
||||
.release = sun3x_esp_release,
|
||||
.slave_alloc = esp_slave_alloc,
|
||||
.slave_destroy = esp_slave_destroy,
|
||||
.info = esp_info,
|
||||
.queuecommand = esp_queue,
|
||||
.eh_abort_handler = esp_abort,
|
||||
.eh_bus_reset_handler = esp_reset,
|
||||
.can_queue = 7,
|
||||
.this_id = 7,
|
||||
.sg_tablesize = SG_ALL,
|
||||
.cmd_per_lun = 1,
|
||||
.use_clustering = DISABLE_CLUSTERING,
|
||||
static const struct esp_driver_ops sun3x_esp_ops = {
|
||||
.esp_write8 = sun3x_esp_write8,
|
||||
.esp_read8 = sun3x_esp_read8,
|
||||
.map_single = sun3x_esp_map_single,
|
||||
.map_sg = sun3x_esp_map_sg,
|
||||
.unmap_single = sun3x_esp_unmap_single,
|
||||
.unmap_sg = sun3x_esp_unmap_sg,
|
||||
.irq_pending = sun3x_esp_irq_pending,
|
||||
.reset_dma = sun3x_esp_reset_dma,
|
||||
.dma_drain = sun3x_esp_dma_drain,
|
||||
.dma_invalidate = sun3x_esp_dma_invalidate,
|
||||
.send_dma_cmd = sun3x_esp_send_dma_cmd,
|
||||
.dma_error = sun3x_esp_dma_error,
|
||||
};
|
||||
|
||||
static int __devinit esp_sun3x_probe(struct platform_device *dev)
|
||||
{
|
||||
struct scsi_host_template *tpnt = &scsi_esp_template;
|
||||
struct Scsi_Host *host;
|
||||
struct esp *esp;
|
||||
struct resource *res;
|
||||
int err = -ENOMEM;
|
||||
|
||||
#include "scsi_module.c"
|
||||
host = scsi_host_alloc(tpnt, sizeof(struct esp));
|
||||
if (!host)
|
||||
goto fail;
|
||||
|
||||
host->max_id = 8;
|
||||
esp = shost_priv(host);
|
||||
|
||||
esp->host = host;
|
||||
esp->dev = dev;
|
||||
esp->ops = &sun3x_esp_ops;
|
||||
|
||||
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
||||
if (!res && !res->start)
|
||||
goto fail_unlink;
|
||||
|
||||
esp->regs = ioremap_nocache(res->start, 0x20);
|
||||
if (!esp->regs)
|
||||
goto fail_unmap_regs;
|
||||
|
||||
res = platform_get_resource(dev, IORESOURCE_MEM, 1);
|
||||
if (!res && !res->start)
|
||||
goto fail_unmap_regs;
|
||||
|
||||
esp->dma_regs = ioremap_nocache(res->start, 0x10);
|
||||
|
||||
esp->command_block = dma_alloc_coherent(esp->dev, 16,
|
||||
&esp->command_block_dma,
|
||||
GFP_KERNEL);
|
||||
if (!esp->command_block)
|
||||
goto fail_unmap_regs_dma;
|
||||
|
||||
host->irq = platform_get_irq(dev, 0);
|
||||
err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED,
|
||||
"SUN3X ESP", esp);
|
||||
if (err < 0)
|
||||
goto fail_unmap_command_block;
|
||||
|
||||
esp->scsi_id = 7;
|
||||
esp->host->this_id = esp->scsi_id;
|
||||
esp->scsi_id_mask = (1 << esp->scsi_id);
|
||||
esp->cfreq = 20000000;
|
||||
|
||||
dev_set_drvdata(&dev->dev, esp);
|
||||
|
||||
err = scsi_esp_register(esp, &dev->dev);
|
||||
if (err)
|
||||
goto fail_free_irq;
|
||||
|
||||
return 0;
|
||||
|
||||
fail_free_irq:
|
||||
free_irq(host->irq, esp);
|
||||
fail_unmap_command_block:
|
||||
dma_free_coherent(esp->dev, 16,
|
||||
esp->command_block,
|
||||
esp->command_block_dma);
|
||||
fail_unmap_regs_dma:
|
||||
iounmap(esp->dma_regs);
|
||||
fail_unmap_regs:
|
||||
iounmap(esp->regs);
|
||||
fail_unlink:
|
||||
scsi_host_put(host);
|
||||
fail:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __devexit esp_sun3x_remove(struct platform_device *dev)
|
||||
{
|
||||
struct esp *esp = dev_get_drvdata(&dev->dev);
|
||||
unsigned int irq = esp->host->irq;
|
||||
u32 val;
|
||||
|
||||
scsi_esp_unregister(esp);
|
||||
|
||||
/* Disable interrupts. */
|
||||
val = dma_read32(DMA_CSR);
|
||||
dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
|
||||
|
||||
free_irq(irq, esp);
|
||||
dma_free_coherent(esp->dev, 16,
|
||||
esp->command_block,
|
||||
esp->command_block_dma);
|
||||
|
||||
scsi_host_put(esp->host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver esp_sun3x_driver = {
|
||||
.probe = esp_sun3x_probe,
|
||||
.remove = __devexit_p(esp_sun3x_remove),
|
||||
.driver = {
|
||||
.name = "sun3x_esp",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init sun3x_esp_init(void)
|
||||
{
|
||||
return platform_driver_register(&esp_sun3x_driver);
|
||||
}
|
||||
|
||||
static void __exit sun3x_esp_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&esp_sun3x_driver);
|
||||
}
|
||||
|
||||
MODULE_DESCRIPTION("Sun3x ESP SCSI driver");
|
||||
MODULE_AUTHOR("Thomas Bogendoerfer (tsbogend@alpha.franken.de)");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
|
||||
module_init(sun3x_esp_init);
|
||||
module_exit(sun3x_esp_exit);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user