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net: phy: mscc: fix header defines and descriptions

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Cosmetic commit fixing the MSCC PHY header defines and descriptions,
which were referring the to MSCC Ocelot MAC driver (see
drivers/net/ethernet/mscc/).

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Antoine Tenart 2020-03-13 10:48:02 +01:00 committed by David S. Miller
parent fa164e40c5
commit 0b92f89712
3 changed files with 12 additions and 12 deletions
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8
drivers/net/phy/mscc/mscc_fc_buffer.h
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@ -1,12 +1,12 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Microsemi Ocelot Switch driver
* Driver for Microsemi VSC85xx PHYs
*
* Copyright (C) 2019 Microsemi Corporation
*/
#ifndef _MSCC_OCELOT_FC_BUFFER_H_
#define _MSCC_OCELOT_FC_BUFFER_H_
#ifndef _MSCC_PHY_FC_BUFFER_H_
#define _MSCC_PHY_FC_BUFFER_H_
#define MSCC_FCBUF_ENA_CFG 0x00
#define MSCC_FCBUF_MODE_CFG 0x01
@ -61,4 +61,4 @@
#define MSCC_FCBUF_FC_READ_THRESH_CFG_RX_THRESH(x) ((x) << 16)
#define MSCC_FCBUF_FC_READ_THRESH_CFG_RX_THRESH_M GENMASK(31, 16)
#endif
#endif /* _MSCC_PHY_FC_BUFFER_H_ */

8
drivers/net/phy/mscc/mscc_mac.h
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@ -1,12 +1,12 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Microsemi Ocelot Switch driver
* Driver for Microsemi VSC85xx PHYs
*
* Copyright (c) 2017 Microsemi Corporation
*/
#ifndef _MSCC_OCELOT_LINE_MAC_H_
#define _MSCC_OCELOT_LINE_MAC_H_
#ifndef _MSCC_PHY_LINE_MAC_H_
#define _MSCC_PHY_LINE_MAC_H_
#define MSCC_MAC_CFG_ENA_CFG 0x00
#define MSCC_MAC_CFG_MODE_CFG 0x01
@ -156,4 +156,4 @@
#define MSCC_PROC_0_IP_1588_TOP_CFG_STAT_MODE_CTL_PROTOCOL_MODE(x) (x)
#define MSCC_PROC_0_IP_1588_TOP_CFG_STAT_MODE_CTL_PROTOCOL_MODE_M GENMASK(2, 0)
#endif /* _MSCC_OCELOT_LINE_MAC_H_ */
#endif /* _MSCC_PHY_LINE_MAC_H_ */

8
drivers/net/phy/mscc/mscc_macsec.h
View File

@ -1,12 +1,12 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Microsemi Ocelot Switch driver
* Driver for Microsemi VSC85xx PHYs
*
* Copyright (c) 2018 Microsemi Corporation
*/
#ifndef _MSCC_OCELOT_MACSEC_H_
#define _MSCC_OCELOT_MACSEC_H_
#ifndef _MSCC_PHY_MACSEC_H_
#define _MSCC_PHY_MACSEC_H_
#include <net/macsec.h>
@ -321,4 +321,4 @@ struct macsec_flow {
#define MSCC_MS_INTR_CTRL_STATUS_INTR_ENABLE_M GENMASK(31, 16)
#define MACSEC_INTR_CTRL_STATUS_ROLLOVER BIT(5)
#endif
#endif /* _MSCC_PHY_MACSEC_H_ */