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drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/
v2: Deal with _CURABASE too Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2909,7 +2909,7 @@ static bool cursor_active(struct drm_device *dev, int pipe)
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u32 state;
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if (IS_845G(dev) || IS_I865G(dev))
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state = I915_READ(_CURACNTR) & CURSOR_ENABLE;
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state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
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else
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state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
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@ -1295,7 +1295,7 @@ static void assert_cursor(struct drm_i915_private *dev_priv,
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bool cur_state;
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if (IS_845G(dev) || IS_I865G(dev))
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cur_state = I915_READ(_CURACNTR) & CURSOR_ENABLE;
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cur_state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
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else
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cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
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@ -9890,13 +9890,13 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
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/* On these chipsets we can only modify the base/size/stride
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* whilst the cursor is disabled.
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*/
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I915_WRITE(_CURACNTR, 0);
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POSTING_READ(_CURACNTR);
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I915_WRITE(CURCNTR(PIPE_A), 0);
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POSTING_READ(CURCNTR(PIPE_A));
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intel_crtc->cursor_cntl = 0;
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}
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if (intel_crtc->cursor_base != base) {
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I915_WRITE(_CURABASE, base);
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I915_WRITE(CURBASE(PIPE_A), base);
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intel_crtc->cursor_base = base;
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}
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@ -9906,8 +9906,8 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
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}
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if (intel_crtc->cursor_cntl != cntl) {
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I915_WRITE(_CURACNTR, cntl);
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POSTING_READ(_CURACNTR);
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I915_WRITE(CURCNTR(PIPE_A), cntl);
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POSTING_READ(CURCNTR(PIPE_A));
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intel_crtc->cursor_cntl = cntl;
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}
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}
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