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drm/amdgpu/vcn2: don't access register when power gated
It will cause bus hang to access register UVD_STATUS when VCN is in the state of power gated. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -277,7 +277,8 @@ static int vcn_v2_0_hw_fini(void *handle)
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struct amdgpu_ring *ring = &adev->vcn.ring_dec;
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int i;
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if (RREG32_SOC15(VCN, 0, mmUVD_STATUS))
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if (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
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RREG32_SOC15(VCN, 0, mmUVD_STATUS))
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vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE);
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ring->sched.ready = false;
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