drm/amdgpu/vcn2: don't access register when power gated

It will cause bus hang to access register UVD_STATUS
when VCN is in the state of power gated.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jack Xiao 2019-04-18 17:37:14 +08:00 committed by Alex Deucher
parent a8179d62fb
commit 0b8794e252

View File

@ -277,7 +277,8 @@ static int vcn_v2_0_hw_fini(void *handle)
struct amdgpu_ring *ring = &adev->vcn.ring_dec;
int i;
if (RREG32_SOC15(VCN, 0, mmUVD_STATUS))
if (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(VCN, 0, mmUVD_STATUS))
vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE);
ring->sched.ready = false;