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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 09:25:45 +07:00
Merge branch 'atlantic-fixes'
Igor Russkikh says: ==================== Marvell atlantic 2020/02 updates Hi David, here is another set of bugfixes on AQC family found on last integration phase. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
0b634c0e73
@ -722,6 +722,11 @@ static int aq_ethtool_set_priv_flags(struct net_device *ndev, u32 flags)
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if (flags & ~AQ_PRIV_FLAGS_MASK)
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return -EOPNOTSUPP;
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if (hweight32((flags | priv_flags) & AQ_HW_LOOPBACK_MASK) > 1) {
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netdev_info(ndev, "Can't enable more than one loopback simultaneously\n");
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return -EINVAL;
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}
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cfg->priv_flags = flags;
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if ((priv_flags ^ flags) & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
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@ -163,7 +163,7 @@ aq_check_approve_fvlan(struct aq_nic_s *aq_nic,
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}
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if ((aq_nic->ndev->features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
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(!test_bit(be16_to_cpu(fsp->h_ext.vlan_tci),
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(!test_bit(be16_to_cpu(fsp->h_ext.vlan_tci) & VLAN_VID_MASK,
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aq_nic->active_vlans))) {
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netdev_err(aq_nic->ndev,
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"ethtool: unknown vlan-id specified");
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@ -337,6 +337,8 @@ struct aq_fw_ops {
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void (*enable_ptp)(struct aq_hw_s *self, int enable);
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void (*adjust_ptp)(struct aq_hw_s *self, uint64_t adj);
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int (*set_eee_rate)(struct aq_hw_s *self, u32 speed);
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int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate,
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@ -533,8 +533,10 @@ unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
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dx_buff->len,
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DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(aq_nic_get_dev(self), dx_buff->pa)))
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if (unlikely(dma_mapping_error(aq_nic_get_dev(self), dx_buff->pa))) {
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ret = 0;
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goto exit;
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}
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first = dx_buff;
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dx_buff->len_pkt = skb->len;
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@ -655,10 +657,6 @@ int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
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if (likely(frags)) {
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err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
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ring, frags);
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if (err >= 0) {
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++ring->stats.tx.packets;
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ring->stats.tx.bytes += skb->len;
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}
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} else {
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err = NETDEV_TX_BUSY;
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}
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@ -359,7 +359,8 @@ static int aq_suspend_common(struct device *dev, bool deep)
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netif_device_detach(nic->ndev);
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netif_tx_stop_all_queues(nic->ndev);
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aq_nic_stop(nic);
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if (netif_running(nic->ndev))
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aq_nic_stop(nic);
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if (deep) {
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aq_nic_deinit(nic, !nic->aq_hw->aq_nic_cfg->wol);
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@ -375,7 +376,7 @@ static int atl_resume_common(struct device *dev, bool deep)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct aq_nic_s *nic;
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int ret;
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int ret = 0;
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nic = pci_get_drvdata(pdev);
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@ -390,9 +391,11 @@ static int atl_resume_common(struct device *dev, bool deep)
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goto err_exit;
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}
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ret = aq_nic_start(nic);
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if (ret)
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goto err_exit;
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if (netif_running(nic->ndev)) {
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ret = aq_nic_start(nic);
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if (ret)
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goto err_exit;
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}
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netif_device_attach(nic->ndev);
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netif_tx_start_all_queues(nic->ndev);
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@ -272,9 +272,12 @@ bool aq_ring_tx_clean(struct aq_ring_s *self)
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}
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}
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if (unlikely(buff->is_eop))
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dev_kfree_skb_any(buff->skb);
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if (unlikely(buff->is_eop)) {
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++self->stats.rx.packets;
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self->stats.tx.bytes += buff->skb->len;
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dev_kfree_skb_any(buff->skb);
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}
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buff->pa = 0U;
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buff->eop_index = 0xffffU;
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self->sw_head = aq_ring_next_dx(self, self->sw_head);
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@ -351,7 +354,8 @@ int aq_ring_rx_clean(struct aq_ring_s *self,
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err = 0;
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goto err_exit;
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}
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if (buff->is_error || buff->is_cso_err) {
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if (buff->is_error ||
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(buff->is_lro && buff->is_cso_err)) {
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buff_ = buff;
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do {
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next_ = buff_->next,
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@ -78,7 +78,8 @@ struct __packed aq_ring_buff_s {
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u32 is_cleaned:1;
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u32 is_error:1;
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u32 is_vlan:1;
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u32 rsvd3:4;
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u32 is_lro:1;
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u32 rsvd3:3;
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u16 eop_index;
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u16 rsvd4;
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};
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@ -823,6 +823,8 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self,
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}
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}
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buff->is_lro = !!(HW_ATL_B0_RXD_WB_STAT2_RSCCNT &
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rxd_wb->status);
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if (HW_ATL_B0_RXD_WB_STAT2_EOP & rxd_wb->status) {
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buff->len = rxd_wb->pkt_len %
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AQ_CFG_RX_FRAME_MAX;
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@ -835,8 +837,7 @@ static int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self,
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rxd_wb->pkt_len > AQ_CFG_RX_FRAME_MAX ?
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AQ_CFG_RX_FRAME_MAX : rxd_wb->pkt_len;
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if (HW_ATL_B0_RXD_WB_STAT2_RSCCNT &
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rxd_wb->status) {
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if (buff->is_lro) {
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/* LRO */
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buff->next = rxd_wb->next_desc_ptr;
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++ring->stats.rx.lro_packets;
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@ -884,13 +885,16 @@ static int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self,
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{
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struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
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unsigned int i = 0U;
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u32 vlan_promisc;
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u32 l2_promisc;
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hw_atl_rpfl2promiscuous_mode_en_set(self,
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IS_FILTER_ENABLED(IFF_PROMISC));
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l2_promisc = IS_FILTER_ENABLED(IFF_PROMISC) ||
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!!(cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET));
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vlan_promisc = l2_promisc || cfg->is_vlan_force_promisc;
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hw_atl_rpf_vlan_prom_mode_en_set(self,
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IS_FILTER_ENABLED(IFF_PROMISC) ||
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cfg->is_vlan_force_promisc);
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hw_atl_rpfl2promiscuous_mode_en_set(self, l2_promisc);
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hw_atl_rpf_vlan_prom_mode_en_set(self, vlan_promisc);
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hw_atl_rpfl2multicast_flr_en_set(self,
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IS_FILTER_ENABLED(IFF_ALLMULTI) &&
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@ -1161,6 +1165,8 @@ static int hw_atl_b0_adj_sys_clock(struct aq_hw_s *self, s64 delta)
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{
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self->ptp_clk_offset += delta;
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self->aq_fw_ops->adjust_ptp(self, self->ptp_clk_offset);
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return 0;
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}
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@ -1211,7 +1217,7 @@ static int hw_atl_b0_gpio_pulse(struct aq_hw_s *self, u32 index,
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fwreq.ptp_gpio_ctrl.index = index;
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fwreq.ptp_gpio_ctrl.period = period;
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/* Apply time offset */
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fwreq.ptp_gpio_ctrl.start = start - self->ptp_clk_offset;
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fwreq.ptp_gpio_ctrl.start = start;
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size = sizeof(fwreq.msg_id) + sizeof(fwreq.ptp_gpio_ctrl);
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return self->aq_fw_ops->send_fw_request(self, &fwreq, size);
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@ -22,6 +22,7 @@
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#define HW_ATL_MIF_ADDR 0x0208U
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#define HW_ATL_MIF_VAL 0x020CU
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#define HW_ATL_MPI_RPC_ADDR 0x0334U
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#define HW_ATL_RPC_CONTROL_ADR 0x0338U
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#define HW_ATL_RPC_STATE_ADR 0x033CU
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@ -53,15 +54,14 @@ enum mcp_area {
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};
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static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual);
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static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,
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enum hal_atl_utils_fw_state_e state);
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static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self);
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static u32 hw_atl_utils_mpi_get_state(struct aq_hw_s *self);
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static u32 hw_atl_utils_mif_cmd_get(struct aq_hw_s *self);
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static u32 hw_atl_utils_mif_addr_get(struct aq_hw_s *self);
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static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self);
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static u32 aq_fw1x_rpc_get(struct aq_hw_s *self);
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int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)
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{
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@ -476,6 +476,10 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self,
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self, self->mbox_addr,
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self->mbox_addr != 0U,
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1000U, 10000U);
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err = readx_poll_timeout_atomic(aq_fw1x_rpc_get, self,
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self->rpc_addr,
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self->rpc_addr != 0U,
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1000U, 100000U);
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return err;
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}
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@ -531,6 +535,12 @@ int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
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self, fw.val,
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sw.tid == fw.tid,
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1000U, 100000U);
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if (err < 0)
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goto err_exit;
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err = aq_hw_err_from_flags(self);
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if (err < 0)
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goto err_exit;
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if (fw.len == 0xFFFFU) {
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err = hw_atl_utils_fw_rpc_call(self, sw.len);
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@ -1025,6 +1035,11 @@ static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self)
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return aq_hw_read_reg(self, HW_ATL_RPC_STATE_ADR);
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}
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static u32 aq_fw1x_rpc_get(struct aq_hw_s *self)
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{
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return aq_hw_read_reg(self, HW_ATL_MPI_RPC_ADDR);
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}
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const struct aq_fw_ops aq_fw_1x_ops = {
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.init = hw_atl_utils_mpi_create,
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.deinit = hw_atl_fw1x_deinit,
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@ -30,6 +30,9 @@
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#define HW_ATL_FW3X_EXT_CONTROL_ADDR 0x378
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#define HW_ATL_FW3X_EXT_STATE_ADDR 0x37c
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#define HW_ATL_FW3X_PTP_ADJ_LSW_ADDR 0x50a0
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#define HW_ATL_FW3X_PTP_ADJ_MSW_ADDR 0x50a4
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#define HW_ATL_FW2X_CAP_PAUSE BIT(CAPS_HI_PAUSE)
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#define HW_ATL_FW2X_CAP_ASYM_PAUSE BIT(CAPS_HI_ASYMMETRIC_PAUSE)
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#define HW_ATL_FW2X_CAP_SLEEP_PROXY BIT(CAPS_HI_SLEEP_PROXY)
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@ -475,6 +478,14 @@ static void aq_fw3x_enable_ptp(struct aq_hw_s *self, int enable)
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aq_hw_write_reg(self, HW_ATL_FW3X_EXT_CONTROL_ADDR, ptp_opts);
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}
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static void aq_fw3x_adjust_ptp(struct aq_hw_s *self, uint64_t adj)
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{
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aq_hw_write_reg(self, HW_ATL_FW3X_PTP_ADJ_LSW_ADDR,
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(adj >> 0) & 0xffffffff);
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aq_hw_write_reg(self, HW_ATL_FW3X_PTP_ADJ_MSW_ADDR,
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(adj >> 32) & 0xffffffff);
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}
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static int aq_fw2x_led_control(struct aq_hw_s *self, u32 mode)
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{
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if (self->fw_ver_actual < HW_ATL_FW_VER_LED)
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@ -633,4 +644,5 @@ const struct aq_fw_ops aq_fw_2x_ops = {
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.enable_ptp = aq_fw3x_enable_ptp,
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.led_control = aq_fw2x_led_control,
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.set_phyloopback = aq_fw2x_set_phyloopback,
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.adjust_ptp = aq_fw3x_adjust_ptp,
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};
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