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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 13:46:47 +07:00
DMAENGINE: COH 901 318 remove irq counting
This removes the pointless irq counting for the COH 901 318, as it turns out the hardware will only ever fire one IRQ for a linked list anyway. In the process also a missing spinlock was introduced. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Linus Walleij
Dan Williams
parent
b87108a772
commit
0b58828c92
@ -39,7 +39,6 @@ struct coh901318_desc {
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unsigned int sg_len;
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struct coh901318_lli *data;
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enum dma_data_direction dir;
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int pending_irqs;
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unsigned long flags;
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};
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@ -72,7 +71,6 @@ struct coh901318_chan {
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unsigned long nbr_active_done;
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unsigned long busy;
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int pending_irqs;
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struct coh901318_base *base;
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};
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@ -368,10 +366,6 @@ static void
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coh901318_desc_submit(struct coh901318_chan *cohc, struct coh901318_desc *desc)
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{
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list_add_tail(&desc->node, &cohc->active);
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BUG_ON(cohc->pending_irqs != 0);
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cohc->pending_irqs = desc->pending_irqs;
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}
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static struct coh901318_desc *
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@ -617,36 +611,30 @@ static void dma_tasklet(unsigned long data)
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/* get first active descriptor entry from list */
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cohd_fin = coh901318_first_active_get(cohc);
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BUG_ON(cohd_fin->pending_irqs == 0);
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if (cohd_fin == NULL)
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goto err;
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cohd_fin->pending_irqs--;
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cohc->completed = cohd_fin->desc.cookie;
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if (cohc->nbr_active_done == 0)
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return;
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if (!cohd_fin->pending_irqs) {
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/* release the lli allocation*/
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coh901318_lli_free(&cohc->base->pool, &cohd_fin->data);
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}
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dev_vdbg(COHC_2_DEV(cohc), "[%s] chan_id %d pending_irqs %d"
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" nbr_active_done %ld\n", __func__,
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cohc->id, cohc->pending_irqs, cohc->nbr_active_done);
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/* callback to client */
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/* locate callback to client */
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callback = cohd_fin->desc.callback;
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callback_param = cohd_fin->desc.callback_param;
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if (!cohd_fin->pending_irqs) {
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coh901318_desc_remove(cohd_fin);
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/* sign this job as completed on the channel */
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cohc->completed = cohd_fin->desc.cookie;
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/* return desc to free-list */
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coh901318_desc_free(cohc, cohd_fin);
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}
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/* release the lli allocation and remove the descriptor */
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coh901318_lli_free(&cohc->base->pool, &cohd_fin->data);
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/* return desc to free-list */
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coh901318_desc_remove(cohd_fin);
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coh901318_desc_free(cohc, cohd_fin);
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spin_unlock_irqrestore(&cohc->lock, flags);
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/* Call the callback when we're done */
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if (callback)
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callback(callback_param);
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spin_lock_irqsave(&cohc->lock, flags);
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/*
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* If another interrupt fired while the tasklet was scheduling,
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@ -655,9 +643,7 @@ static void dma_tasklet(unsigned long data)
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* be handled for this channel. If there happen to be more than
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* one IRQ to be ack:ed, we simply schedule this tasklet again.
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*/
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if (cohc->nbr_active_done)
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cohc->nbr_active_done--;
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cohc->nbr_active_done--;
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if (cohc->nbr_active_done) {
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dev_dbg(COHC_2_DEV(cohc), "scheduling tasklet again, new IRQs "
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"came in while we were scheduling this tasklet\n");
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@ -666,10 +652,8 @@ static void dma_tasklet(unsigned long data)
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else
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tasklet_schedule(&cohc->tasklet);
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}
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spin_unlock_irqrestore(&cohc->lock, flags);
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if (callback)
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callback(callback_param);
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spin_unlock_irqrestore(&cohc->lock, flags);
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return;
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@ -688,16 +672,17 @@ static void dma_tc_handle(struct coh901318_chan *cohc)
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if (!cohc->allocated)
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return;
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BUG_ON(cohc->pending_irqs == 0);
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spin_lock(&cohc->lock);
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cohc->pending_irqs--;
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cohc->nbr_active_done++;
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if (cohc->pending_irqs == 0 && coh901318_queue_start(cohc) == NULL)
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if (coh901318_queue_start(cohc) == NULL)
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cohc->busy = 0;
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BUG_ON(list_empty(&cohc->active));
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spin_unlock(&cohc->lock);
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if (cohc_chan_conf(cohc)->priority_high)
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tasklet_hi_schedule(&cohc->tasklet);
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else
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@ -951,6 +936,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
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u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
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unsigned long flg;
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int ret;
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if (!sgl)
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goto out;
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@ -1010,13 +996,14 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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goto err_dma_alloc;
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/* initiate allocated data list */
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cohd->pending_irqs =
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coh901318_lli_fill_sg(&cohc->base->pool, data, sgl, sg_len,
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cohc_dev_addr(cohc),
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ctrl_chained,
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ctrl,
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ctrl_last,
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direction, COH901318_CX_CTRL_TC_IRQ_ENABLE);
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ret = coh901318_lli_fill_sg(&cohc->base->pool, data, sgl, sg_len,
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cohc_dev_addr(cohc),
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ctrl_chained,
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ctrl,
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ctrl_last,
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direction, COH901318_CX_CTRL_TC_IRQ_ENABLE);
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if (ret)
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goto err_lli_fill;
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COH_DBG(coh901318_list_print(cohc, data));
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@ -1030,6 +1017,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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spin_unlock_irqrestore(&cohc->lock, flg);
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return &cohd->desc;
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err_lli_fill:
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err_dma_alloc:
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err_direction:
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spin_unlock_irqrestore(&cohc->lock, flg);
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@ -1121,7 +1109,6 @@ coh901318_terminate_all(struct dma_chan *chan)
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cohc->nbr_active_done = 0;
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cohc->busy = 0;
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cohc->pending_irqs = 0;
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spin_unlock_irqrestore(&cohc->lock, flags);
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}
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@ -1148,7 +1135,6 @@ void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
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spin_lock_init(&cohc->lock);
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cohc->pending_irqs = 0;
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cohc->nbr_active_done = 0;
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cohc->busy = 0;
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INIT_LIST_HEAD(&cohc->free);
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@ -166,8 +166,7 @@ coh901318_lli_fill_memcpy(struct coh901318_pool *pool,
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lli->src_addr = src;
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lli->dst_addr = dst;
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/* One irq per single transfer */
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return 1;
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return 0;
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}
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int
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@ -223,8 +222,7 @@ coh901318_lli_fill_single(struct coh901318_pool *pool,
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lli->src_addr = src;
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lli->dst_addr = dst;
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/* One irq per single transfer */
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return 1;
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return 0;
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}
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int
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@ -240,7 +238,6 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,
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u32 ctrl_sg;
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dma_addr_t src = 0;
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dma_addr_t dst = 0;
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int nbr_of_irq = 0;
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u32 bytes_to_transfer;
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u32 elem_size;
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@ -269,9 +266,6 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,
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ctrl_sg = ctrl ? ctrl : ctrl_last;
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if ((ctrl_sg & ctrl_irq_mask))
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nbr_of_irq++;
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if (dir == DMA_TO_DEVICE)
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/* increment source address */
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src = sg_dma_address(sg);
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@ -310,8 +304,7 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,
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}
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spin_unlock(&pool->lock);
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/* There can be many IRQs per sg transfer */
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return nbr_of_irq;
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return 0;
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err:
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spin_unlock(&pool->lock);
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return -EINVAL;
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