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ARM: mm: Add support for flushing HugeTLB pages.
On ARM we use the __flush_dcache_page function to flush the dcache of pages when needed; usually when the PG_dcache_clean bit is unset and we are setting a PTE. A HugeTLB page is represented as a compound page consisting of an array of pages. Thus to flush the dcache of a HugeTLB page, one must flush more than a single page. This patch modifies __flush_dcache_page such that all constituent pages of a HugeTLB page are flushed. Signed-off-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Will Deacon <will.deacon@arm.com>
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@ -17,6 +17,7 @@
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#include <asm/highmem.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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#include <linux/hugetlb.h>
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#include "mm.h"
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@ -168,19 +169,23 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page)
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* coherent with the kernels mapping.
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*/
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if (!PageHighMem(page)) {
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__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
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size_t page_size = PAGE_SIZE << compound_order(page);
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__cpuc_flush_dcache_area(page_address(page), page_size);
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} else {
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void *addr;
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unsigned long i;
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if (cache_is_vipt_nonaliasing()) {
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addr = kmap_atomic(page);
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__cpuc_flush_dcache_area(addr, PAGE_SIZE);
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kunmap_atomic(addr);
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} else {
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addr = kmap_high_get(page);
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if (addr) {
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for (i = 0; i < (1 << compound_order(page)); i++) {
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void *addr = kmap_atomic(page);
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__cpuc_flush_dcache_area(addr, PAGE_SIZE);
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kunmap_high(page);
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kunmap_atomic(addr);
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}
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} else {
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for (i = 0; i < (1 << compound_order(page)); i++) {
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void *addr = kmap_high_get(page);
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if (addr) {
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__cpuc_flush_dcache_area(addr, PAGE_SIZE);
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kunmap_high(page);
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}
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}
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}
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}
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