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ath9k_hw: make both analog channel change routines return int

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This allows us to later define a callback for both.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez 2009-10-19 02:33:40 -04:00 committed by John W. Linville
parent dc51dd5039
commit 0a3b7bac67
3 changed files with 22 additions and 23 deletions
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24
drivers/net/wireless/ath/ath9k/hw.c
View File

@ -1868,6 +1868,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
struct ath_common *common = ath9k_hw_common(ah);
struct ieee80211_channel *channel = chan->chan;
u32 synthDelay, qnum;
int r;
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
if (ath9k_hw_numtxpending(ah, qnum)) {
@ -1888,14 +1889,14 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
ath9k_hw_set_regs(ah, chan);
if (AR_SREV_9280_10_OR_LATER(ah)) {
ath9k_hw_ar9280_set_channel(ah, chan);
} else {
if (!(ath9k_hw_set_channel(ah, chan))) {
ath_print(common, ATH_DBG_FATAL,
"Failed to set channel\n");
return false;
}
if (AR_SREV_9280_10_OR_LATER(ah))
r = ath9k_hw_ar9280_set_channel(ah, chan);
else
r = ath9k_hw_set_channel(ah, chan);
if (r) {
ath_print(common, ATH_DBG_FATAL,
"Failed to set channel\n");
return false;
}
ah->eep_ops->set_txpower(ah, chan,
@ -2534,10 +2535,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
if (AR_SREV_9280_10_OR_LATER(ah))
ath9k_hw_ar9280_set_channel(ah, chan);
r = ath9k_hw_ar9280_set_channel(ah, chan);
else
if (!(ath9k_hw_set_channel(ah, chan)))
return -EIO;
r = ath9k_hw_set_channel(ah, chan);
if (r)
return r;
for (i = 0; i < AR_NUM_DCU; i++)
REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);

14
drivers/net/wireless/ath/ath9k/phy.c
View File

@ -68,8 +68,7 @@ ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex,
* the channel value. Assumes writes enabled to analog bus and bank6 register
* cache in ah->analogBank6Data.
*/
bool
ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
{
struct ath_common *common = ath9k_hw_common(ah);
u32 channelSel = 0;
@ -94,7 +93,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
} else {
ath_print(common, ATH_DBG_FATAL,
"Invalid channel %u MHz\n", freq);
return false;
return -EINVAL;
}
channelSel = (channelSel << 2) & 0xff;
@ -127,7 +126,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
} else {
ath_print(common, ATH_DBG_FATAL,
"Invalid channel %u MHz\n", freq);
return false;
return -EINVAL;
}
reg32 =
@ -139,7 +138,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
ah->curchan = chan;
ah->curchan_rad_index = -1;
return true;
return 0;
}
/**
@ -163,8 +162,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
* Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
* (freq_ref = 40MHz/(24>>amodeRefSel))
*/
void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
struct ath9k_channel *chan)
int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
{
u16 bMode, fracMode, aModeRefSel = 0;
u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@ -252,6 +250,8 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
ah->curchan = chan;
ah->curchan_rad_index = -1;
return 0;
}
/**

7
drivers/net/wireless/ath/ath9k/phy.h
View File

@ -17,11 +17,8 @@
#ifndef PHY_H
#define PHY_H
void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
struct ath9k_channel
*chan);
bool ath9k_hw_set_channel(struct ath_hw *ah,
struct ath9k_channel *chan);
int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
void ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex,
u32 freqIndex, int regWrites);
bool ath9k_hw_set_rf_regs(struct ath_hw *ah,