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mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the maximum clock rate if it is set. This enables artificial limitation of the bus speed via max-frequency in the devicetree for e.g. the AST2600 evaluation board where I was seeing errors at 200MHz. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -52,16 +52,24 @@ static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc,
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static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
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{
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struct sdhci_pltfm_host *pltfm_host;
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unsigned long parent;
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int div;
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u16 clk;
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pltfm_host = sdhci_priv(host);
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parent = clk_get_rate(pltfm_host->clk);
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sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
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if (clock == 0)
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return;
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if (WARN_ON(clock > host->max_clk))
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clock = host->max_clk;
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for (div = 1; div < 256; div *= 2) {
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if ((host->max_clk / div) <= clock)
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if ((parent / div) <= clock)
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break;
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}
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div >>= 1;
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@ -71,6 +79,14 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
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sdhci_enable_clk(host, clk);
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}
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static unsigned int aspeed_sdhci_get_max_clock(struct sdhci_host *host)
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{
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if (host->mmc->f_max)
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return host->mmc->f_max;
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return sdhci_pltfm_clk_get_max_clock(host);
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}
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static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
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{
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struct sdhci_pltfm_host *pltfm_priv;
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@ -97,7 +113,7 @@ static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
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static const struct sdhci_ops aspeed_sdhci_ops = {
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.set_clock = aspeed_sdhci_set_clock,
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.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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.get_max_clock = aspeed_sdhci_get_max_clock,
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.set_bus_width = aspeed_sdhci_set_bus_width,
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.get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
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.reset = sdhci_reset,
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