PCI: vmd: Add bus 224-255 restriction decode

VMD bus restrictions are required when IO fabric is multiplexed such
that VMD cannot use the entire bus range. This patch adds another bus
restriction decode bit that can be set by firmware to restrict the VMD
bus range to between 224-255.

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
This commit is contained in:
Jon Derrick 2019-11-12 05:47:52 -07:00 committed by Lorenzo Pieralisi
parent 54ecb8f702
commit 08bcdd22ec

View File

@ -602,16 +602,30 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
/*
* Certain VMD devices may have a root port configuration option which
* limits the bus range to between 0-127 or 128-255
* limits the bus range to between 0-127, 128-255, or 224-255
*/
if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
u32 vmcap, vmconfig;
u16 reg16;
pci_read_config_dword(vmd->dev, PCI_REG_VMCAP, &vmcap);
pci_read_config_dword(vmd->dev, PCI_REG_VMCONFIG, &vmconfig);
if (BUS_RESTRICT_CAP(vmcap) &&
(BUS_RESTRICT_CFG(vmconfig) == 0x1))
vmd->busn_start = 128;
pci_read_config_word(vmd->dev, PCI_REG_VMCAP, &reg16);
if (BUS_RESTRICT_CAP(reg16)) {
pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG,
&reg16);
switch (BUS_RESTRICT_CFG(reg16)) {
case 1:
vmd->busn_start = 128;
break;
case 2:
vmd->busn_start = 224;
break;
case 3:
pci_err(vmd->dev, "Unknown Bus Offset Setting\n");
return -ENODEV;
default:
break;
}
}
}
res = &vmd->dev->resource[VMD_CFGBAR];