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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 00:51:02 +07:00
IXP42x: Use __fls() in QMgr interrupt handlers.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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d4c9e9fc97
commit
0771c69394
@ -52,14 +52,15 @@ void qmgr_set_irq(unsigned int queue, int src,
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static irqreturn_t qmgr_irq1_a0(int irq, void *pdev)
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{
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int i, ret = 0;
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u32 en_bitmap, src, stat;
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/* ACK - it may clear any bits so don't rely on it */
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__raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]);
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for (i = 0; i < HALF_QUEUES; i++) {
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u32 src, stat;
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if (!(qmgr_regs->irqen[0] & BIT(i)))
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continue;
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en_bitmap = qmgr_regs->irqen[0];
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while (en_bitmap) {
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i = __fls(en_bitmap); /* number of the last "low" queue */
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en_bitmap &= ~BIT(i);
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src = qmgr_regs->irqsrc[i >> 3];
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stat = qmgr_regs->stat1[i >> 3];
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if (src & 4) /* the IRQ condition is inverted */
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@ -82,9 +83,9 @@ static irqreturn_t qmgr_irq2_a0(int irq, void *pdev)
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__raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]);
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req_bitmap = qmgr_regs->irqen[1] & qmgr_regs->statne_h;
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for (i = 0; i < HALF_QUEUES; i++) {
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if (!(req_bitmap & BIT(i)))
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continue;
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while (req_bitmap) {
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i = __fls(req_bitmap); /* number of the last "high" queue */
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req_bitmap &= ~BIT(i);
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irq_handlers[HALF_QUEUES + i](irq_pdevs[HALF_QUEUES + i]);
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ret = IRQ_HANDLED;
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}
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@ -95,15 +96,19 @@ static irqreturn_t qmgr_irq2_a0(int irq, void *pdev)
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static irqreturn_t qmgr_irq(int irq, void *pdev)
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{
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int i, half = (irq == IRQ_IXP4XX_QM1 ? 0 : 1);
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u32 val = __raw_readl(&qmgr_regs->irqstat[half]);
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__raw_writel(val, &qmgr_regs->irqstat[half]); /* ACK */
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u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]);
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for (i = 0; i < HALF_QUEUES; i++)
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if (val & (1 << i)) {
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int irq = half * HALF_QUEUES + i;
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irq_handlers[irq](irq_pdevs[irq]);
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}
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return val ? IRQ_HANDLED : 0;
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if (!req_bitmap)
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return 0;
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__raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */
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while (req_bitmap) {
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i = __fls(req_bitmap); /* number of the last queue */
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req_bitmap &= ~BIT(i);
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i += half * HALF_QUEUES;
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irq_handlers[i](irq_pdevs[i]);
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}
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return IRQ_HANDLED;
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}
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