dt-bindings: display: rockchip-vop: add additional properties

In the old txt situation we add/describe only properties that are used
by the driver/hardware itself. With yaml it also filters things in a
node that are used by other drivers like 'assigned-clocks' and
'assigned-clock-rates' for rk3399 and 'power-domains' for most
Rockchip Socs in 'vop' nodes, so add them to 'rockchip-vop.yaml'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-2-jbx6244@gmail.com
This commit is contained in:
Johan Jonker 2020-04-03 16:22:35 +02:00 committed by Sam Ravnborg
parent 4e78ba2787
commit 0706cd0f94

View File

@ -75,9 +75,18 @@ properties:
A port node with endpoint definitions as defined in A port node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. Documentation/devicetree/bindings/media/video-interfaces.txt.
assigned-clocks:
maxItems: 2
assigned-clock-rates:
maxItems: 2
iommus: iommus:
maxItems: 1 maxItems: 1
power-domains:
maxItems: 1
required: required:
- compatible - compatible
- reg - reg
@ -94,6 +103,7 @@ examples:
- | - |
#include <dt-bindings/clock/rk3288-cru.h> #include <dt-bindings/clock/rk3288-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/rk3288-power.h>
vopb: vopb@ff930000 { vopb: vopb@ff930000 {
compatible = "rockchip,rk3288-vop"; compatible = "rockchip,rk3288-vop";
reg = <0x0 0xff930000 0x0 0x19c>, reg = <0x0 0xff930000 0x0 0x19c>,
@ -103,6 +113,7 @@ examples:
<&cru DCLK_VOP0>, <&cru DCLK_VOP0>,
<&cru HCLK_VOP0>; <&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK3288_PD_VIO>;
resets = <&cru SRST_LCDC1_AXI>, resets = <&cru SRST_LCDC1_AXI>,
<&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_AHB>,
<&cru SRST_LCDC1_DCLK>; <&cru SRST_LCDC1_DCLK>;