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blackfin/time-ts: Migrate to new 'set-state' interface

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Migrate blackfin driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in ->set_mode(RESUME) and so tick_resume()
isn't implemented.

Cc: Steven Miao <realmz6@gmail.com>
Cc: adi-buildroot-devel@lists.sourceforge.net
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Viresh Kumar 2015-07-16 16:56:16 +05:30 committed by Daniel Lezcano
parent 6ec8193298
commit 067f96218c
1 changed files with 70 additions and 66 deletions
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136
arch/blackfin/kernel/time-ts.c
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@ -136,44 +136,44 @@ static int bfin_gptmr0_set_next_event(unsigned long cycles,
return 0;
}
static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
static int bfin_gptmr0_set_periodic(struct clock_event_device *evt)
{
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: {
#ifndef CONFIG_BF60x
set_gptimer_config(TIMER0_id, \
TIMER_OUT_DIS | TIMER_IRQ_ENA | \
TIMER_PERIOD_CNT | TIMER_MODE_PWM);
set_gptimer_config(TIMER0_id,
TIMER_OUT_DIS | TIMER_IRQ_ENA |
TIMER_PERIOD_CNT | TIMER_MODE_PWM);
#else
set_gptimer_config(TIMER0_id, TIMER_OUT_DIS
| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);
set_gptimer_config(TIMER0_id,
TIMER_OUT_DIS | TIMER_MODE_PWM_CONT |
TIMER_PULSE_HI | TIMER_IRQ_PER);
#endif
set_gptimer_period(TIMER0_id, get_sclk() / HZ);
set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
enable_gptimers(TIMER0bit);
break;
}
case CLOCK_EVT_MODE_ONESHOT:
disable_gptimers(TIMER0bit);
set_gptimer_period(TIMER0_id, get_sclk() / HZ);
set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
enable_gptimers(TIMER0bit);
return 0;
}
static int bfin_gptmr0_set_oneshot(struct clock_event_device *evt)
{
disable_gptimers(TIMER0bit);
#ifndef CONFIG_BF60x
set_gptimer_config(TIMER0_id, \
TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
set_gptimer_config(TIMER0_id,
TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
#else
set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM
| TIMER_PULSE_HI | TIMER_IRQ_WID_DLY);
set_gptimer_config(TIMER0_id,
TIMER_OUT_DIS | TIMER_MODE_PWM | TIMER_PULSE_HI |
TIMER_IRQ_WID_DLY);
#endif
set_gptimer_period(TIMER0_id, 0);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
disable_gptimers(TIMER0bit);
break;
case CLOCK_EVT_MODE_RESUME:
break;
}
set_gptimer_period(TIMER0_id, 0);
return 0;
}
static int bfin_gptmr0_shutdown(struct clock_event_device *evt)
{
disable_gptimers(TIMER0bit);
return 0;
}
static void bfin_gptmr0_ack(void)
@ -211,13 +211,16 @@ static struct irqaction gptmr0_irq = {
};
static struct clock_event_device clockevent_gptmr0 = {
.name = "bfin_gptimer0",
.rating = 300,
.irq = IRQ_TIMER0,
.shift = 32,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_next_event = bfin_gptmr0_set_next_event,
.set_mode = bfin_gptmr0_set_mode,
.name = "bfin_gptimer0",
.rating = 300,
.irq = IRQ_TIMER0,
.shift = 32,
.features = CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_ONESHOT,
.set_next_event = bfin_gptmr0_set_next_event,
.set_state_shutdown = bfin_gptmr0_shutdown,
.set_state_periodic = bfin_gptmr0_set_periodic,
.set_state_oneshot = bfin_gptmr0_set_oneshot,
};
static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt)
@ -250,36 +253,35 @@ static int bfin_coretmr_set_next_event(unsigned long cycles,
return 0;
}
static void bfin_coretmr_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
static int bfin_coretmr_set_periodic(struct clock_event_device *evt)
{
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: {
unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
bfin_write_TCNTL(TMPWR);
CSYNC();
bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TPERIOD(tcount);
bfin_write_TCOUNT(tcount);
CSYNC();
bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
break;
}
case CLOCK_EVT_MODE_ONESHOT:
bfin_write_TCNTL(TMPWR);
CSYNC();
bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TPERIOD(0);
bfin_write_TCOUNT(0);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
bfin_write_TCNTL(0);
CSYNC();
break;
case CLOCK_EVT_MODE_RESUME:
break;
}
unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
bfin_write_TCNTL(TMPWR);
CSYNC();
bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TPERIOD(tcount);
bfin_write_TCOUNT(tcount);
CSYNC();
bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
return 0;
}
static int bfin_coretmr_set_oneshot(struct clock_event_device *evt)
{
bfin_write_TCNTL(TMPWR);
CSYNC();
bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TPERIOD(0);
bfin_write_TCOUNT(0);
return 0;
}
static int bfin_coretmr_shutdown(struct clock_event_device *evt)
{
bfin_write_TCNTL(0);
CSYNC();
return 0;
}
void bfin_coretmr_init(void)
@ -335,7 +337,9 @@ void bfin_coretmr_clockevent_init(void)
evt->shift = 32;
evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
evt->set_next_event = bfin_coretmr_set_next_event;
evt->set_mode = bfin_coretmr_set_mode;
evt->set_state_shutdown = bfin_coretmr_shutdown;
evt->set_state_periodic = bfin_coretmr_set_periodic;
evt->set_state_oneshot = bfin_coretmr_set_oneshot;
clock_tick = get_cclk() / TIME_SCALE;
evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);