mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-05 01:45:29 +07:00
mwifiex: store SDIO chip specific information in separate structure
Register addresses, firmware name and some macros are specific to a chip. They are stored in a new structure. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Amitkumar Karwar
John W. Linville
parent
5ac253d50b
commit
05889f8253
@ -77,6 +77,15 @@ mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
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func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
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if (id->driver_data) {
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struct mwifiex_sdio_device *data = (void *)id->driver_data;
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card->firmware = data->firmware;
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card->reg = data->reg;
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card->max_ports = data->max_ports;
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card->mp_agg_pkt_limit = data->mp_agg_pkt_limit;
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}
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sdio_claim_host(func);
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ret = sdio_enable_func(func);
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sdio_release_host(func);
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@ -254,9 +263,12 @@ static int mwifiex_sdio_resume(struct device *dev)
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/* WLAN IDs */
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static const struct sdio_device_id mwifiex_ids[] = {
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797)},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786),
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.driver_data = (unsigned long) &mwifiex_sdio_sd8786},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787),
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.driver_data = (unsigned long) &mwifiex_sdio_sd8787},
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{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797),
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.driver_data = (unsigned long) &mwifiex_sdio_sd8797},
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{},
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};
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@ -410,6 +422,7 @@ static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
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static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
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{
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u32 reg;
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struct sdio_mmc_card *card = adapter->card;
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adapter->ioport = 0;
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@ -434,13 +447,13 @@ static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
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/* Set Host interrupt reset to read to clear */
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if (!mwifiex_read_reg(adapter, HOST_INT_RSR_REG, ®))
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mwifiex_write_reg(adapter, HOST_INT_RSR_REG,
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reg | SDIO_INT_MASK);
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reg | card->reg->sdio_int_mask);
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else
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return -1;
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/* Dnld/Upld ready set to auto reset */
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if (!mwifiex_read_reg(adapter, CARD_MISC_CFG_REG, ®))
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mwifiex_write_reg(adapter, CARD_MISC_CFG_REG,
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if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®))
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mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
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reg | AUTO_RE_ENABLE_INT);
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else
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return -1;
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@ -486,11 +499,12 @@ static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter,
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static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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u32 rd_bitmap = card->mp_rd_bitmap;
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dev_dbg(adapter->dev, "data: mp_rd_bitmap=0x%08x\n", rd_bitmap);
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if (!(rd_bitmap & (CTRL_PORT_MASK | DATA_PORT_MASK)))
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if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
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return -1;
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if (card->mp_rd_bitmap & CTRL_PORT_MASK) {
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@ -504,8 +518,8 @@ static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
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(~(1 << card->curr_rd_port));
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*port = card->curr_rd_port;
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if (++card->curr_rd_port == MAX_PORT)
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card->curr_rd_port = 1;
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if (++card->curr_rd_port == card->max_ports)
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card->curr_rd_port = reg->start_rd_port;
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} else {
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return -1;
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}
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@ -538,7 +552,7 @@ static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u8 *port)
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card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
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*port = card->curr_wr_port;
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if (++card->curr_wr_port == card->mp_end_port)
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card->curr_wr_port = 1;
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card->curr_wr_port = card->reg->start_wr_port;
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} else {
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adapter->data_sent = true;
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return -EBUSY;
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@ -564,11 +578,12 @@ static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u8 *port)
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static int
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mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
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{
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struct sdio_mmc_card *card = adapter->card;
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u32 tries;
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u32 cs;
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for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
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if (mwifiex_read_reg(adapter, CARD_STATUS_REG, &cs))
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if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
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break;
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else if ((cs & bits) == bits)
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return 0;
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@ -587,12 +602,14 @@ mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
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static int
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mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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u32 fws0, fws1;
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if (mwifiex_read_reg(adapter, CARD_FW_STATUS0_REG, &fws0))
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if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
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return -1;
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if (mwifiex_read_reg(adapter, CARD_FW_STATUS1_REG, &fws1))
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if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
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return -1;
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*dat = (u16) ((fws1 << 8) | fws0);
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@ -633,8 +650,11 @@ static int mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
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*/
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static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
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{
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struct sdio_mmc_card *card = adapter->card;
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/* Simply write the mask to the register */
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if (mwifiex_write_reg(adapter, HOST_INT_MASK_REG, HOST_INT_ENABLE)) {
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if (mwifiex_write_reg(adapter, HOST_INT_MASK_REG,
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card->reg->host_int_enable)) {
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dev_err(adapter->dev, "enable host interrupt failed\n");
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return -1;
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}
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@ -686,6 +706,8 @@ static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter,
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static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
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struct mwifiex_fw_image *fw)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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int ret;
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u8 *firmware = fw->fw_buf;
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u32 firmware_len = fw->fw_len;
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@ -727,7 +749,7 @@ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
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break;
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for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
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ret = mwifiex_read_reg(adapter, HOST_F1_RD_BASE_0,
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ret = mwifiex_read_reg(adapter, reg->base_0_reg,
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&base0);
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if (ret) {
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dev_err(adapter->dev,
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@ -736,7 +758,7 @@ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
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base0, base0);
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goto done;
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}
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ret = mwifiex_read_reg(adapter, HOST_F1_RD_BASE_1,
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ret = mwifiex_read_reg(adapter, reg->base_1_reg,
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&base1);
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if (ret) {
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dev_err(adapter->dev,
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@ -828,6 +850,7 @@ static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
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static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
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u32 poll_num)
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{
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struct sdio_mmc_card *card = adapter->card;
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int ret = 0;
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u16 firmware_stat;
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u32 tries;
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@ -849,7 +872,7 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
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if (ret) {
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if (mwifiex_read_reg
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(adapter, CARD_FW_STATUS0_REG, &winner_status))
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(adapter, card->reg->status_reg_0, &winner_status))
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winner_status = 0;
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if (winner_status)
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@ -869,9 +892,9 @@ static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
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u32 sdio_ireg;
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unsigned long flags;
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if (mwifiex_read_data_sync(adapter, card->mp_regs, MAX_MP_REGS,
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REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK,
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0)) {
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if (mwifiex_read_data_sync(adapter, card->mp_regs,
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card->reg->max_mp_regs,
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REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) {
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dev_err(adapter->dev, "read mp_regs failed\n");
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return;
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}
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@ -1167,6 +1190,7 @@ static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
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static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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int ret = 0;
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u8 sdio_ireg;
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struct sk_buff *skb;
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@ -1185,8 +1209,10 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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return ret;
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if (sdio_ireg & DN_LD_HOST_INT_STATUS) {
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card->mp_wr_bitmap = ((u32) card->mp_regs[WR_BITMAP_U]) << 8;
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card->mp_wr_bitmap |= (u32) card->mp_regs[WR_BITMAP_L];
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card->mp_wr_bitmap =
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((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
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card->mp_wr_bitmap |=
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(u32) card->mp_regs[reg->wr_bitmap_l];
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dev_dbg(adapter->dev, "int: DNLD: wr_bitmap=0x%08x\n",
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card->mp_wr_bitmap);
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if (adapter->data_sent &&
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@ -1204,7 +1230,7 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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/* Check if firmware has attach buffer at command port and
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update just that in wr_bit_map. */
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card->mp_wr_bitmap |=
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(u32) card->mp_regs[WR_BITMAP_L] & CTRL_PORT_MASK;
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(u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
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if (card->mp_wr_bitmap & CTRL_PORT_MASK)
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adapter->cmd_sent = false;
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}
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@ -1212,8 +1238,9 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
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adapter->cmd_sent, adapter->data_sent);
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if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
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card->mp_rd_bitmap = ((u32) card->mp_regs[RD_BITMAP_U]) << 8;
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card->mp_rd_bitmap |= (u32) card->mp_regs[RD_BITMAP_L];
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card->mp_rd_bitmap =
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((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
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card->mp_rd_bitmap |= (u32) card->mp_regs[reg->rd_bitmap_l];
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dev_dbg(adapter->dev, "int: UPLD: rd_bitmap=0x%08x\n",
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card->mp_rd_bitmap);
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@ -1224,8 +1251,8 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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"info: no more rd_port available\n");
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break;
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}
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len_reg_l = RD_LEN_P0_L + (port << 1);
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len_reg_u = RD_LEN_P0_U + (port << 1);
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len_reg_l = reg->rd_len_p0_l + (port << 1);
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len_reg_u = reg->rd_len_p0_u + (port << 1);
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rx_len = ((u16) card->mp_regs[len_reg_u]) << 8;
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rx_len |= (u16) card->mp_regs[len_reg_l];
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dev_dbg(adapter->dev, "info: RX: port=%d rx_len=%u\n",
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@ -1586,18 +1613,7 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
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adapter->dev = &func->dev;
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switch (func->device) {
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case SDIO_DEVICE_ID_MARVELL_8786:
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strcpy(adapter->fw_name, SD8786_DEFAULT_FW_NAME);
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break;
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case SDIO_DEVICE_ID_MARVELL_8797:
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strcpy(adapter->fw_name, SD8797_DEFAULT_FW_NAME);
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break;
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case SDIO_DEVICE_ID_MARVELL_8787:
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default:
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strcpy(adapter->fw_name, SD8787_DEFAULT_FW_NAME);
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break;
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}
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strcpy(adapter->fw_name, card->firmware);
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return 0;
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@ -1626,6 +1642,7 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
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static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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int ret;
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u32 sdio_ireg;
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@ -1645,27 +1662,27 @@ static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
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/* Initialize SDIO variables in card */
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card->mp_rd_bitmap = 0;
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card->mp_wr_bitmap = 0;
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card->curr_rd_port = 1;
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card->curr_wr_port = 1;
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card->curr_rd_port = reg->start_rd_port;
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card->curr_wr_port = reg->start_wr_port;
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card->mp_data_port_mask = DATA_PORT_MASK;
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card->mp_data_port_mask = reg->data_port_mask;
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card->mpa_tx.buf_len = 0;
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card->mpa_tx.pkt_cnt = 0;
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card->mpa_tx.start_port = 0;
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card->mpa_tx.enabled = 1;
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card->mpa_tx.pkt_aggr_limit = SDIO_MP_AGGR_DEF_PKT_LIMIT;
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card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit;
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card->mpa_rx.buf_len = 0;
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card->mpa_rx.pkt_cnt = 0;
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card->mpa_rx.start_port = 0;
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card->mpa_rx.enabled = 1;
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card->mpa_rx.pkt_aggr_limit = SDIO_MP_AGGR_DEF_PKT_LIMIT;
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card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit;
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/* Allocate buffers for SDIO MP-A */
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card->mp_regs = kzalloc(MAX_MP_REGS, GFP_KERNEL);
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card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
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if (!card->mp_regs)
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return -ENOMEM;
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@ -1716,16 +1733,17 @@ static void
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mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
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{
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struct sdio_mmc_card *card = adapter->card;
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const struct mwifiex_sdio_card_reg *reg = card->reg;
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int i;
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card->mp_end_port = port;
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card->mp_data_port_mask = DATA_PORT_MASK;
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card->mp_data_port_mask = reg->data_port_mask;
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for (i = 1; i <= MAX_PORT - card->mp_end_port; i++)
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card->mp_data_port_mask &= ~(1 << (MAX_PORT - i));
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for (i = 1; i <= card->max_ports - card->mp_end_port; i++)
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card->mp_data_port_mask &= ~(1 << (card->max_ports - i));
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card->curr_wr_port = 1;
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card->curr_wr_port = reg->start_wr_port;
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dev_dbg(adapter->dev, "cmd: mp_end_port %d, data port mask 0x%x\n",
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port, card->mp_data_port_mask);
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@ -37,12 +37,6 @@
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#define BYTE_MODE 0
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#define REG_PORT 0
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#define RD_BITMAP_L 0x04
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#define RD_BITMAP_U 0x05
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#define WR_BITMAP_L 0x06
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#define WR_BITMAP_U 0x07
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#define RD_LEN_P0_L 0x08
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#define RD_LEN_P0_U 0x09
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#define MWIFIEX_SDIO_IO_PORT_MASK 0xfffff
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@ -50,10 +44,6 @@
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#define CTRL_PORT 0
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#define CTRL_PORT_MASK 0x0001
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#define DATA_PORT_MASK 0xfffe
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#define MAX_MP_REGS 64
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#define MAX_PORT 16
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#define SDIO_MP_AGGR_DEF_PKT_LIMIT 8
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@ -90,8 +80,6 @@
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#define UP_LD_HOST_INT_MASK (0x1U)
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/* Host Control Registers : Download host interrupt mask */
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#define DN_LD_HOST_INT_MASK (0x2U)
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/* Enable Host interrupt mask */
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#define HOST_INT_ENABLE (UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK)
|
||||
/* Disable Host interrupt mask */
|
||||
#define HOST_INT_DISABLE 0xff
|
||||
|
||||
@ -106,7 +94,6 @@
|
||||
#define HOST_INT_RSR_REG 0x01
|
||||
/* Host Control Registers : Upload host interrupt RSR */
|
||||
#define UP_LD_HOST_INT_RSR (0x1U)
|
||||
#define SDIO_INT_MASK 0x3F
|
||||
|
||||
/* Host Control Registers : Host interrupt status */
|
||||
#define HOST_INT_STATUS_REG 0x28
|
||||
@ -117,8 +104,6 @@
|
||||
/* Host Control Registers : Download restart */
|
||||
#define DN_LD_RESTART (0x1U << 0)
|
||||
|
||||
/* Card Control Registers : Card status register */
|
||||
#define CARD_STATUS_REG 0x30
|
||||
/* Card Control Registers : Card I/O ready */
|
||||
#define CARD_IO_READY (0x1U << 3)
|
||||
/* Card Control Registers : CIS card ready */
|
||||
@ -153,20 +138,9 @@
|
||||
/* Card Control Registers : Power down RSR */
|
||||
#define POWER_DOWN_RSR (0x1U << 3)
|
||||
|
||||
/* Card Control Registers : Miscellaneous Configuration Register */
|
||||
#define CARD_MISC_CFG_REG 0x6C
|
||||
|
||||
/* Host F1 read base 0 */
|
||||
#define HOST_F1_RD_BASE_0 0x0040
|
||||
/* Host F1 read base 1 */
|
||||
#define HOST_F1_RD_BASE_1 0x0041
|
||||
/* Host F1 card ready */
|
||||
#define HOST_F1_CARD_RDY 0x0020
|
||||
|
||||
/* Firmware status 0 register */
|
||||
#define CARD_FW_STATUS0_REG 0x60
|
||||
/* Firmware status 1 register */
|
||||
#define CARD_FW_STATUS1_REG 0x61
|
||||
/* Rx length register */
|
||||
#define CARD_RX_LEN_REG 0x62
|
||||
/* Rx unit register */
|
||||
@ -192,7 +166,8 @@
|
||||
if (a->mpa_tx.start_port <= port) \
|
||||
a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt)); \
|
||||
else \
|
||||
a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+(MAX_PORT - \
|
||||
a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+ \
|
||||
(a->max_ports - \
|
||||
a->mp_end_port))); \
|
||||
a->mpa_tx.pkt_cnt++; \
|
||||
} while (0)
|
||||
@ -203,9 +178,9 @@
|
||||
|
||||
/* SDIO Tx aggregation port limit ? */
|
||||
#define MP_TX_AGGR_PORT_LIMIT_REACHED(a) ((a->curr_wr_port < \
|
||||
a->mpa_tx.start_port) && (((MAX_PORT - \
|
||||
a->mpa_tx.start_port) && (((a->max_ports -\
|
||||
a->mpa_tx.start_port) + a->curr_wr_port) >= \
|
||||
SDIO_MP_AGGR_DEF_PKT_LIMIT))
|
||||
a->mp_agg_pkt_limit))
|
||||
|
||||
/* Reset SDIO Tx aggregation buffer parameters */
|
||||
#define MP_TX_AGGR_BUF_RESET(a) do { \
|
||||
@ -221,9 +196,9 @@
|
||||
|
||||
/* SDIO Tx aggregation port limit ? */
|
||||
#define MP_RX_AGGR_PORT_LIMIT_REACHED(a) ((a->curr_rd_port < \
|
||||
a->mpa_rx.start_port) && (((MAX_PORT - \
|
||||
a->mpa_rx.start_port) && (((a->max_ports -\
|
||||
a->mpa_rx.start_port) + a->curr_rd_port) >= \
|
||||
SDIO_MP_AGGR_DEF_PKT_LIMIT))
|
||||
a->mp_agg_pkt_limit))
|
||||
|
||||
/* SDIO Rx aggregation in progress ? */
|
||||
#define MP_RX_AGGR_IN_PROGRESS(a) (a->mpa_rx.pkt_cnt > 0)
|
||||
@ -286,10 +261,36 @@ struct mwifiex_sdio_mpa_rx {
|
||||
int mwifiex_bus_register(void);
|
||||
void mwifiex_bus_unregister(void);
|
||||
|
||||
struct mwifiex_sdio_card_reg {
|
||||
u8 start_rd_port;
|
||||
u8 start_wr_port;
|
||||
u8 base_0_reg;
|
||||
u8 base_1_reg;
|
||||
u8 poll_reg;
|
||||
u8 host_int_enable;
|
||||
u8 status_reg_0;
|
||||
u8 status_reg_1;
|
||||
u8 sdio_int_mask;
|
||||
u32 data_port_mask;
|
||||
u8 max_mp_regs;
|
||||
u8 rd_bitmap_l;
|
||||
u8 rd_bitmap_u;
|
||||
u8 wr_bitmap_l;
|
||||
u8 wr_bitmap_u;
|
||||
u8 rd_len_p0_l;
|
||||
u8 rd_len_p0_u;
|
||||
u8 card_misc_cfg_reg;
|
||||
};
|
||||
|
||||
struct sdio_mmc_card {
|
||||
struct sdio_func *func;
|
||||
struct mwifiex_adapter *adapter;
|
||||
|
||||
const char *firmware;
|
||||
const struct mwifiex_sdio_card_reg *reg;
|
||||
u8 max_ports;
|
||||
u8 mp_agg_pkt_limit;
|
||||
|
||||
u32 mp_rd_bitmap;
|
||||
u32 mp_wr_bitmap;
|
||||
|
||||
@ -305,6 +306,55 @@ struct sdio_mmc_card {
|
||||
struct mwifiex_sdio_mpa_rx mpa_rx;
|
||||
};
|
||||
|
||||
struct mwifiex_sdio_device {
|
||||
const char *firmware;
|
||||
const struct mwifiex_sdio_card_reg *reg;
|
||||
u8 max_ports;
|
||||
u8 mp_agg_pkt_limit;
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
|
||||
.start_rd_port = 1,
|
||||
.start_wr_port = 1,
|
||||
.base_0_reg = 0x0040,
|
||||
.base_1_reg = 0x0041,
|
||||
.poll_reg = 0x30,
|
||||
.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
|
||||
.status_reg_0 = 0x60,
|
||||
.status_reg_1 = 0x61,
|
||||
.sdio_int_mask = 0x3f,
|
||||
.data_port_mask = 0x0000fffe,
|
||||
.max_mp_regs = 64,
|
||||
.rd_bitmap_l = 0x04,
|
||||
.rd_bitmap_u = 0x05,
|
||||
.wr_bitmap_l = 0x06,
|
||||
.wr_bitmap_u = 0x07,
|
||||
.rd_len_p0_l = 0x08,
|
||||
.rd_len_p0_u = 0x09,
|
||||
.card_misc_cfg_reg = 0x6c,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
|
||||
.firmware = SD8786_DEFAULT_FW_NAME,
|
||||
.reg = &mwifiex_reg_sd87xx,
|
||||
.max_ports = 16,
|
||||
.mp_agg_pkt_limit = 8,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
|
||||
.firmware = SD8787_DEFAULT_FW_NAME,
|
||||
.reg = &mwifiex_reg_sd87xx,
|
||||
.max_ports = 16,
|
||||
.mp_agg_pkt_limit = 8,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
|
||||
.firmware = SD8797_DEFAULT_FW_NAME,
|
||||
.reg = &mwifiex_reg_sd87xx,
|
||||
.max_ports = 16,
|
||||
.mp_agg_pkt_limit = 8,
|
||||
};
|
||||
|
||||
/*
|
||||
* .cmdrsp_complete handler
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user