Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6

This commit is contained in:
Steve French 2007-11-25 09:53:27 +00:00
commit 058250a0d5
305 changed files with 5069 additions and 4521 deletions

View File

@ -25,6 +25,7 @@
#include <linux/genetlink.h>
#include <linux/taskstats.h>
#include <linux/cgroupstats.h>
/*
* Generic macros for dealing with netlink sockets. Might be duplicated
@ -78,6 +79,7 @@ static void usage(void)
fprintf(stderr, " -i: print IO accounting (works only with -p)\n");
fprintf(stderr, " -l: listen forever\n");
fprintf(stderr, " -v: debug on\n");
fprintf(stderr, " -C: container path\n");
}
/*
@ -212,6 +214,14 @@ void task_context_switch_counts(struct taskstats *t)
t->nvcsw, t->nivcsw);
}
void print_cgroupstats(struct cgroupstats *c)
{
printf("sleeping %llu, blocked %llu, running %llu, stopped %llu, "
"uninterruptible %llu\n", c->nr_sleeping, c->nr_io_wait,
c->nr_running, c->nr_stopped, c->nr_uninterruptible);
}
void print_ioacct(struct taskstats *t)
{
printf("%s: read=%llu, write=%llu, cancelled_write=%llu\n",
@ -239,11 +249,14 @@ int main(int argc, char *argv[])
int maskset = 0;
char *logfile = NULL;
int loop = 0;
int containerset = 0;
char containerpath[1024];
int cfd = 0;
struct msgtemplate msg;
while (1) {
c = getopt(argc, argv, "qdiw:r:m:t:p:vl");
c = getopt(argc, argv, "qdiw:r:m:t:p:vlC:");
if (c < 0)
break;
@ -260,6 +273,10 @@ int main(int argc, char *argv[])
printf("printing task/process context switch rates\n");
print_task_context_switch_counts = 1;
break;
case 'C':
containerset = 1;
strncpy(containerpath, optarg, strlen(optarg) + 1);
break;
case 'w':
logfile = strdup(optarg);
printf("write to file %s\n", logfile);
@ -334,6 +351,11 @@ int main(int argc, char *argv[])
}
}
if (tid && containerset) {
fprintf(stderr, "Select either -t or -C, not both\n");
goto err;
}
if (tid) {
rc = send_cmd(nl_sd, id, mypid, TASKSTATS_CMD_GET,
cmd_type, &tid, sizeof(__u32));
@ -344,6 +366,20 @@ int main(int argc, char *argv[])
}
}
if (containerset) {
cfd = open(containerpath, O_RDONLY);
if (cfd < 0) {
perror("error opening container file");
goto err;
}
rc = send_cmd(nl_sd, id, mypid, CGROUPSTATS_CMD_GET,
CGROUPSTATS_CMD_ATTR_FD, &cfd, sizeof(__u32));
if (rc < 0) {
perror("error sending cgroupstats command");
goto err;
}
}
do {
int i;
@ -422,6 +458,9 @@ int main(int argc, char *argv[])
}
break;
case CGROUPSTATS_TYPE_CGROUP_STATS:
print_cgroupstats(NLA_DATA(na));
break;
default:
fprintf(stderr, "Unknown nla_type %d\n",
na->nla_type);
@ -443,5 +482,7 @@ int main(int argc, char *argv[])
close(nl_sd);
if (fd)
close(fd);
if (cfd)
close(cfd);
return 0;
}

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@ -181,15 +181,6 @@ Who: Nick Piggin <npiggin@suse.de>
---------------------------
What: Interrupt only SA_* flags
When: September 2007
Why: The interrupt related SA_* flags are replaced by IRQF_* to move them
out of the signal namespace.
Who: Thomas Gleixner <tglx@linutronix.de>
---------------------------
What: PHYSDEVPATH, PHYSDEVBUS, PHYSDEVDRIVER in the uevent environment
When: October 2008
Why: The stacking of class devices makes these values misleading and

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@ -35,12 +35,14 @@ In order to use the macro trace_mark, you should include linux/marker.h.
And,
trace_mark(subsystem_event, "%d %s", someint, somestring);
trace_mark(subsystem_event, "myint %d mystring %s", someint, somestring);
Where :
- subsystem_event is an identifier unique to your event
- subsystem is the name of your subsystem.
- event is the name of the event to mark.
- "%d %s" is the formatted string for the serializer.
- "myint %d mystring %s" is the formatted string for the serializer. "myint" and
"mystring" are repectively the field names associated with the first and
second parameter.
- someint is an integer.
- somestring is a char pointer.

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@ -180,9 +180,10 @@ driver returns ENOIOCTLCMD. Some common examples:
* RTC_IRQP_SET, RTC_IRQP_READ: the irq_set_freq function will be called
to set the frequency while the framework will handle the read for you
since the frequency is stored in the irq_freq member of the rtc_device
structure. Also make sure you set the max_user_freq member in your
initialization routines so the framework can sanity check the user
input for you.
structure. Your driver needs to initialize the irq_freq member during
init. Make sure you check the requested frequency is in range of your
hardware in the irq_set_freq function. If you cannot actually change
the frequency, just return -ENOTTY.
If all else fails, check out the rtc-test.c driver!

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@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 24
EXTRAVERSION = -rc2
EXTRAVERSION = -rc3
NAME = Arr Matey! A Hairy Bilge Rat!
# *DOCUMENTATION*
@ -197,8 +197,13 @@ CROSS_COMPILE ?=
UTS_MACHINE := $(ARCH)
SRCARCH := $(ARCH)
# for i386 and x86_64 we use SRCARCH equal to x86
SRCARCH := $(if $(filter x86_64 i386,$(SRCARCH)),x86,$(SRCARCH))
# Additional ARCH settings for x86
ifeq ($(ARCH),i386)
SRCARCH := x86
endif
ifeq ($(ARCH),x86_64)
SRCARCH := x86
endif
KCONFIG_CONFIG ?= .config
@ -1327,12 +1332,7 @@ else
ALLINCLUDE_ARCHS := $(ALLSOURCE_ARCHS)
endif
# Take care of arch/x86
ifeq ($(ARCH), $(SRCARCH))
ALLSOURCE_ARCHS := $(ARCH)
else
ALLSOURCE_ARCHS := $(ARCH) $(SRCARCH)
endif
ALLSOURCE_ARCHS := $(SRCARCH)
define find-sources
( for arch in $(ALLSOURCE_ARCHS) ; do \

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@ -150,22 +150,45 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
local_irq_enable();
}
static const struct clkops clk_pxa3xx_cken_ops = {
.enable = clk_pxa3xx_cken_enable,
.disable = clk_pxa3xx_cken_disable,
};
static const struct clkops clk_pxa3xx_hsio_ops = {
.enable = clk_pxa3xx_cken_enable,
.disable = clk_pxa3xx_cken_disable,
.getrate = clk_pxa3xx_hsio_getrate,
};
#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
{ \
.name = _name, \
.dev = _dev, \
.ops = &clk_pxa3xx_cken_ops, \
.rate = _rate, \
.cken = CKEN_##_cken, \
.delay = _delay, \
}
#define PXA3xx_CK(_name, _cken, _ops, _dev) \
{ \
.name = _name, \
.dev = _dev, \
.ops = _ops, \
.cken = CKEN_##_cken, \
}
static struct clk pxa3xx_clks[] = {
INIT_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
INIT_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
INIT_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev),
PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev),
};
void __init pxa3xx_init_irq(void)

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@ -322,7 +322,6 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
if (off < kern_size &&
user_size <= (kern_size - off)) {
vma->vm_flags |= VM_RESERVED;
ret = remap_pfn_range(vma, vma->vm_start,
page_to_pfn(c->vm_pages) + off,
user_size << PAGE_SHIFT,

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@ -19,9 +19,6 @@ config AVR32
There is an AVR32 Linux project with a web page at
http://avr32linux.org/.
config UID16
bool
config GENERIC_GPIO
bool
default y

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@ -474,7 +474,7 @@ static struct resource at32ap700x_rtc0_resource[] = {
static struct resource at32_wdt0_resource[] = {
{
.start = 0xfff000b0,
.end = 0xfff000bf,
.end = 0xfff000cf,
.flags = IORESOURCE_MEM,
},
};
@ -690,7 +690,7 @@ static struct resource atmel_usart0_resource[] = {
IRQ(6),
};
DEFINE_DEV_DATA(atmel_usart, 0);
DEV_CLK(usart, atmel_usart0, pba, 4);
DEV_CLK(usart, atmel_usart0, pba, 3);
static struct atmel_uart_data atmel_usart1_data = {
.use_dma_tx = 1,

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@ -7,7 +7,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define DEBUG
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/init.h>

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@ -13,6 +13,7 @@
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <asm/intc.h>
#include <asm/io.h>
#include "intc.h"
@ -136,7 +137,8 @@ void __init init_IRQ(void)
panic("Interrupt controller initialization failed!\n");
}
unsigned long intc_get_pending(int group)
unsigned long intc_get_pending(unsigned int group)
{
return intc_readl(&intc0, INTREQ0 + 4 * group);
}
EXPORT_SYMBOL_GPL(intc_get_pending);

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@ -13,6 +13,10 @@ config ZONE_DMA
bool
default y
config NO_DMA
bool
default y
config RWSEM_GENERIC_SPINLOCK
bool
default y
@ -57,6 +61,10 @@ menu "General setup"
source "fs/Kconfig.binfmt"
config GENERIC_HARDIRQS
bool
default y
config ETRAX_CMDLINE
string "Kernel command line"
default "root=/dev/mtdblock3"
@ -149,7 +157,8 @@ source "net/Kconfig"
# bring in ETRAX built-in drivers
menu "Drivers for built-in interfaces"
source arch/cris/arch-v10/drivers/Kconfig
# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
source arch/cris/arch/drivers/Kconfig
endmenu
@ -180,6 +189,10 @@ source "drivers/isdn/Kconfig"
source "drivers/telephony/Kconfig"
source "drivers/i2c/Kconfig"
source "drivers/rtc/Kconfig"
#
# input before char - char/joystick depends on it. As does USB.
#
@ -194,6 +207,10 @@ source "fs/Kconfig"
source "sound/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/usb/Kconfig"
source "kernel/Kconfig.instrumentation"

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@ -99,7 +99,6 @@ CONFIG_MTD=y
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_AMDSTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_ETRAX_I2C=y
@ -145,7 +144,6 @@ CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_AMDSTD=y
# CONFIG_MTD_SHARP is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_NORA is not set

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@ -2,6 +2,7 @@ config ETRAX_ETHERNET
bool "Ethernet support"
depends on ETRAX_ARCH_V10
select NET_ETHERNET
select MII
help
This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
controller.
@ -605,8 +606,6 @@ config ETRAX_AXISFLASHMAP
select MTD
select MTD_CFI
select MTD_CFI_AMDSTD
select MTD_OBSOLETE_CHIPS
select MTD_AMDSTD
select MTD_CHAR
select MTD_BLOCK
select MTD_PARTITIONS

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@ -312,12 +312,12 @@ static struct mtd_info *probe_cs(struct map_info *map_cs)
"%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
map_cs->name, map_cs->size, map_cs->map_priv_1);
#ifdef CONFIG_MTD_AMDSTD
mtd_cs = do_map_probe("amd_flash", map_cs);
#endif
#ifdef CONFIG_MTD_CFI
mtd_cs = do_map_probe("cfi_probe", map_cs);
#endif
#ifdef CONFIG_MTD_JEDECPROBE
if (!mtd_cs) {
mtd_cs = do_map_probe("cfi_probe", map_cs);
mtd_cs = do_map_probe("jedec_probe", map_cs);
}
#endif

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@ -297,8 +297,10 @@ gpio_poll(struct file *file,
data = *R_PORT_PB_DATA;
else if (priv->minor == GPIO_MINOR_G)
data = *R_PORT_G_DATA;
else
else {
spin_unlock(&gpio_lock);
return 0;
}
if ((data & priv->highalarm) ||
(~data & priv->lowalarm)) {
@ -381,18 +383,21 @@ static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
ssize_t retval = count;
if (priv->minor !=GPIO_MINOR_A && priv->minor != GPIO_MINOR_B) {
return -EFAULT;
retval = -EFAULT;
goto out;
}
if (!access_ok(VERIFY_READ, buf, count)) {
return -EFAULT;
retval = -EFAULT;
goto out;
}
clk_mask = priv->clk_mask;
data_mask = priv->data_mask;
/* It must have been configured using the IO_CFG_WRITE_MODE */
/* Perhaps a better error code? */
if (clk_mask == 0 || data_mask == 0) {
return -EPERM;
retval = -EPERM;
goto out;
}
write_msb = priv->write_msb;
D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb));
@ -425,6 +430,7 @@ static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
}
}
}
out:
spin_unlock(&gpio_lock);
return retval;
}
@ -506,6 +512,7 @@ gpio_release(struct inode *inode, struct file *filp)
while (p) {
if (p->highalarm | p->lowalarm) {
gpio_some_alarms = 1;
spin_unlock(&gpio_lock);
return 0;
}
p = p->next;

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@ -500,9 +500,8 @@ _work_notifysig:
;; deal with pending signals and notify-resume requests
move.d $r9, $r10 ; do_notify_resume syscall/irq param
moveq 0, $r11 ; oldset param - 0 in this case
move.d $sp, $r12 ; the regs param
move.d $r1, $r13 ; the thread_info_flags parameter
move.d $sp, $r11 ; the regs param
move.d $r1, $r12 ; the thread_info_flags parameter
jsr do_notify_resume
ba _Rexit
@ -678,13 +677,19 @@ IRQ1_interrupt:
push $r10 ; push orig_r10
clear.d [$sp=$sp-4] ; frametype == 0, normal frame
;; If there is a glitch on the NMI pin shorter than ~100ns
;; (i.e. non-active by the time we get here) then the nmi_pin bit
;; in R_IRQ_MASK0_RD will already be cleared. The watchdog_nmi bit
;; is cleared by us however (when feeding the watchdog), which is why
;; we use that bit to determine what brought us here.
move.d [R_IRQ_MASK0_RD], $r1 ; External NMI or watchdog?
and.d 0x80000000, $r1
beq wdog
and.d (1<<30), $r1
bne wdog
move.d $sp, $r10
jsr handle_nmi
setf m ; Enable NMI again
retb ; Return from NMI
ba _Rexit ; Return the standard way
nop
wdog:
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
@ -775,22 +780,9 @@ multiple_interrupt:
push $r10 ; push orig_r10
clear.d [$sp=$sp-4] ; frametype == 0, normal frame
moveq 2, $r2 ; first bit we care about is the timer0 irq
move.d [R_VECT_MASK_RD], $r0; read the irq bits that triggered the multiple irq
move.d $r0, [R_VECT_MASK_CLR] ; Block all active IRQs
1:
btst $r2, $r0 ; check for the irq given by bit r2
bpl 2f
move.d $r2, $r10 ; First argument to do_IRQ
move.d $sp, $r11 ; second argument to do_IRQ
jsr do_IRQ
2:
addq 1, $r2 ; next vector bit
cmp.b 32, $r2
bne 1b ; process all irq's up to and including number 31
moveq 0, $r9 ; make ret_from_intr realise we came from an ir
move.d $sp, $r10
jsr do_multiple_IRQ
move.d $r0, [R_VECT_MASK_SET] ; Unblock all the IRQs
jump ret_from_intr
do_sigtrap:
@ -837,6 +829,13 @@ _ugdb_handle_breakpoint:
ba do_sigtrap ; SIGTRAP the offending process.
pop $dccr ; Restore dccr in delay slot.
.global kernel_execve
kernel_execve:
move.d __NR_execve, $r9
break 13
ret
nop
.data
hw_bp_trigs:
@ -1135,6 +1134,42 @@ sys_call_table:
.long sys_add_key
.long sys_request_key
.long sys_keyctl
.long sys_ioprio_set
.long sys_ioprio_get /* 290 */
.long sys_inotify_init
.long sys_inotify_add_watch
.long sys_inotify_rm_watch
.long sys_migrate_pages
.long sys_openat /* 295 */
.long sys_mkdirat
.long sys_mknodat
.long sys_fchownat
.long sys_futimesat
.long sys_fstatat64 /* 300 */
.long sys_unlinkat
.long sys_renameat
.long sys_linkat
.long sys_symlinkat
.long sys_readlinkat /* 305 */
.long sys_fchmodat
.long sys_faccessat
.long sys_pselect6
.long sys_ppoll
.long sys_unshare /* 310 */
.long sys_set_robust_list
.long sys_get_robust_list
.long sys_splice
.long sys_sync_file_range
.long sys_tee /* 315 */
.long sys_vmsplice
.long sys_move_pages
.long sys_getcpu
.long sys_epoll_pwait
.long sys_utimensat /* 320 */
.long sys_signalfd
.long sys_timerfd
.long sys_eventfd
.long sys_fallocate
/*
* NOTE!! This doesn't have to be exact - we just have

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@ -1,97 +1,9 @@
/* $Id: fasttimer.c,v 1.9 2005/03/04 08:16:16 starvik Exp $
/*
* linux/arch/cris/kernel/fasttimer.c
*
* Fast timers for ETRAX100/ETRAX100LX
* This may be useful in other OS than Linux so use 2 space indentation...
*
* $Log: fasttimer.c,v $
* Revision 1.9 2005/03/04 08:16:16 starvik
* Merge of Linux 2.6.11.
*
* Revision 1.8 2005/01/05 06:09:29 starvik
* cli()/sti() will be obsolete in 2.6.11.
*
* Revision 1.7 2005/01/03 13:35:46 starvik
* Removed obsolete stuff.
* Mark fast timer IRQ as not shared.
*
* Revision 1.6 2004/05/14 10:18:39 starvik
* Export fast_timer_list
*
* Revision 1.5 2004/05/14 07:58:01 starvik
* Merge of changes from 2.4
*
* Revision 1.4 2003/07/04 08:27:41 starvik
* Merge of Linux 2.5.74
*
* Revision 1.3 2002/12/12 08:26:32 starvik
* Don't use C-comments inside CVS comments
*
* Revision 1.2 2002/12/11 15:42:02 starvik
* Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
*
* Revision 1.1 2002/11/18 07:58:06 starvik
* Fast timers (from Linux 2.4)
*
* Revision 1.5 2002/10/15 06:21:39 starvik
* Added call to init_waitqueue_head
*
* Revision 1.4 2002/05/28 17:47:59 johana
* Added del_fast_timer()
*
* Revision 1.3 2002/05/28 16:16:07 johana
* Handle empty fast_timer_list
*
* Revision 1.2 2002/05/27 15:38:42 johana
* Made it compile without warnings on Linux 2.4.
* (includes, wait_queue, PROC_FS and snprintf)
*
* Revision 1.1 2002/05/27 15:32:25 johana
* arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
*
* Revision 1.8 2001/11/27 13:50:40 pkj
* Disable interrupts while stopping the timer and while modifying the
* list of active timers in timer1_handler() as it may be interrupted
* by other interrupts (e.g., the serial interrupt) which may add fast
* timers.
*
* Revision 1.7 2001/11/22 11:50:32 pkj
* * Only store information about the last 16 timers.
* * proc_fasttimer_read() now uses an allocated buffer, since it
* requires more space than just a page even for only writing the
* last 16 timers. The buffer is only allocated on request, so
* unless /proc/fasttimer is read, it is never allocated.
* * Renamed fast_timer_started to fast_timers_started to match
* fast_timers_added and fast_timers_expired.
* * Some clean-up.
*
* Revision 1.6 2000/12/13 14:02:08 johana
* Removed volatile for fast_timer_list
*
* Revision 1.5 2000/12/13 13:55:35 johana
* Added DEBUG_LOG, added som cli() and cleanup
*
* Revision 1.4 2000/12/05 13:48:50 johana
* Added range check when writing proc file, modified timer int handling
*
* Revision 1.3 2000/11/23 10:10:20 johana
* More debug/logging possibilities.
* Moved GET_JIFFIES_USEC() to timex.h and time.c
*
* Revision 1.2 2000/11/01 13:41:04 johana
* Clean up and bugfixes.
* Created new do_gettimeofday_fast() that gets a timeval struct
* with time based on jiffies and *R_TIMER0_DATA, uses a table
* for fast conversion of timer value to microseconds.
* (Much faster the standard do_gettimeofday() and we don't really
* want to use the true time - we want the "uptime" so timers don't screw up
* when we change the time.
* TODO: Add efficient support for continuous timers as well.
*
* Revision 1.1 2000/10/26 15:49:16 johana
* Added fasttimer, highresolution timers.
*
* Copyright (C) 2000,2001 2002 Axis Communications AB, Lund, Sweden
* Copyright (C) 2000-2007 Axis Communications AB, Lund, Sweden
*/
#include <linux/errno.h>
@ -125,7 +37,7 @@
#ifdef FAST_TIMER_SANITY_CHECKS
#define SANITYCHECK(x) x
static int sanity_failed = 0;
static int sanity_failed;
#else
#define SANITYCHECK(x)
#endif
@ -134,15 +46,13 @@ static int sanity_failed = 0;
#define D2(x)
#define DP(x)
#define __INLINE__ inline
static int fast_timer_running = 0;
static int fast_timers_added = 0;
static int fast_timers_started = 0;
static int fast_timers_expired = 0;
static int fast_timers_deleted = 0;
static int fast_timer_is_init = 0;
static int fast_timer_ints = 0;
static unsigned int fast_timer_running;
static unsigned int fast_timers_added;
static unsigned int fast_timers_started;
static unsigned int fast_timers_expired;
static unsigned int fast_timers_deleted;
static unsigned int fast_timer_is_init;
static unsigned int fast_timer_ints;
struct fast_timer *fast_timer_list = NULL;
@ -150,8 +60,8 @@ struct fast_timer *fast_timer_list = NULL;
#define DEBUG_LOG_MAX 128
static const char * debug_log_string[DEBUG_LOG_MAX];
static unsigned long debug_log_value[DEBUG_LOG_MAX];
static int debug_log_cnt = 0;
static int debug_log_cnt_wrapped = 0;
static unsigned int debug_log_cnt;
static unsigned int debug_log_cnt_wrapped;
#define DEBUG_LOG(string, value) \
{ \
@ -206,45 +116,29 @@ int timer_freq_settings[NUM_TIMER_STATS];
int timer_delay_settings[NUM_TIMER_STATS];
/* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
inline void do_gettimeofday_fast(struct fasttime_t *tv)
{
unsigned long sec = jiffies;
unsigned long usec = GET_JIFFIES_USEC();
usec += (sec % HZ) * (1000000 / HZ);
sec = sec / HZ;
if (usec > 1000000)
{
usec -= 1000000;
sec++;
}
tv->tv_sec = sec;
tv->tv_usec = usec;
tv->tv_jiff = jiffies;
tv->tv_usec = GET_JIFFIES_USEC();
}
int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
inline int fasttime_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
{
if (t0->tv_sec < t1->tv_sec)
{
return -1;
}
else if (t0->tv_sec > t1->tv_sec)
{
return 1;
}
if (t0->tv_usec < t1->tv_usec)
{
return -1;
}
else if (t0->tv_usec > t1->tv_usec)
{
return 1;
}
return 0;
/* Compare jiffies. Takes care of wrapping */
if (time_before(t0->tv_jiff, t1->tv_jiff))
return -1;
else if (time_after(t0->tv_jiff, t1->tv_jiff))
return 1;
/* Compare us */
if (t0->tv_usec < t1->tv_usec)
return -1;
else if (t0->tv_usec > t1->tv_usec)
return 1;
return 0;
}
void __INLINE__ start_timer1(unsigned long delay_us)
inline void start_timer1(unsigned long delay_us)
{
int freq_index = 0; /* This is the lowest resolution */
unsigned long upper_limit = MAX_DELAY_US;
@ -285,7 +179,7 @@ void __INLINE__ start_timer1(unsigned long delay_us)
timer_freq_settings[fast_timers_started % NUM_TIMER_STATS] = freq_index;
timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us;
D1(printk("start_timer1 : %d us freq: %i div: %i\n",
D1(printk(KERN_DEBUG "start_timer1 : %d us freq: %i div: %i\n",
delay_us, freq_index, div));
/* Clear timer1 irq */
*R_IRQ_MASK0_CLR = IO_STATE(R_IRQ_MASK0_CLR, timer1, clr);
@ -340,7 +234,7 @@ void start_one_shot_timer(struct fast_timer *t,
printk(KERN_WARNING
"timer name: %s data: 0x%08lX already in list!\n", name, data);
sanity_failed++;
return;
goto done;
}
else
{
@ -356,11 +250,11 @@ void start_one_shot_timer(struct fast_timer *t,
t->name = name;
t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
if (t->tv_expires.tv_usec > 1000000)
{
t->tv_expires.tv_usec -= 1000000;
t->tv_expires.tv_sec++;
t->tv_expires.tv_jiff += HZ;
}
#ifdef FAST_TIMER_LOG
timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
@ -368,7 +262,7 @@ void start_one_shot_timer(struct fast_timer *t,
fast_timers_added++;
/* Check if this should timeout before anything else */
if (tmp == NULL || timeval_cmp(&t->tv_expires, &tmp->tv_expires) < 0)
if (tmp == NULL || fasttime_cmp(&t->tv_expires, &tmp->tv_expires) < 0)
{
/* Put first in list and modify the timer value */
t->prev = NULL;
@ -384,8 +278,8 @@ void start_one_shot_timer(struct fast_timer *t,
start_timer1(delay_us);
} else {
/* Put in correct place in list */
while (tmp->next &&
timeval_cmp(&t->tv_expires, &tmp->next->tv_expires) > 0)
while (tmp->next && fasttime_cmp(&t->tv_expires,
&tmp->next->tv_expires) > 0)
{
tmp = tmp->next;
}
@ -401,6 +295,7 @@ void start_one_shot_timer(struct fast_timer *t,
D2(printk("start_one_shot_timer: %d us done\n", delay_us));
done:
local_irq_restore(flags);
} /* start_one_shot_timer */
@ -444,11 +339,18 @@ int del_fast_timer(struct fast_timer * t)
/* Timer 1 interrupt handler */
static irqreturn_t
timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
timer1_handler(int irq, void *dev_id)
{
struct fast_timer *t;
unsigned long flags;
/* We keep interrupts disabled not only when we modify the
* fast timer list, but any time we hold a reference to a
* timer in the list, since del_fast_timer may be called
* from (another) interrupt context. Thus, the only time
* when interrupts are enabled is when calling the timer
* callback function.
*/
local_irq_save(flags);
/* Clear timer1 irq */
@ -466,18 +368,19 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
fast_timer_running = 0;
fast_timer_ints++;
local_irq_restore(flags);
t = fast_timer_list;
while (t)
{
struct timeval tv;
struct fasttime_t tv;
fast_timer_function_type *f;
unsigned long d;
/* Has it really expired? */
do_gettimeofday_fast(&tv);
D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
D1(printk(KERN_DEBUG "t: %is %06ius\n",
tv.tv_jiff, tv.tv_usec));
if (timeval_cmp(&t->tv_expires, &tv) <= 0)
if (fasttime_cmp(&t->tv_expires, &tv) <= 0)
{
/* Yes it has expired */
#ifdef FAST_TIMER_LOG
@ -486,7 +389,6 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
fast_timers_expired++;
/* Remove this timer before call, since it may reuse the timer */
local_irq_save(flags);
if (t->prev)
{
t->prev->next = t->next;
@ -501,16 +403,23 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
}
t->prev = NULL;
t->next = NULL;
local_irq_restore(flags);
if (t->function != NULL)
{
t->function(t->data);
}
else
{
/* Save function callback data before enabling
* interrupts, since the timer may be removed and
* we don't know how it was allocated
* (e.g. ->function and ->data may become overwritten
* after deletion if the timer was stack-allocated).
*/
f = t->function;
d = t->data;
if (f != NULL) {
/* Run callback with interrupts enabled. */
local_irq_restore(flags);
f(d);
local_irq_save(flags);
} else
DEBUG_LOG("!timer1 %i function==NULL!\n", fast_timer_ints);
}
}
else
{
@ -518,16 +427,20 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
D1(printk(".\n"));
}
local_irq_save(flags);
if ((t = fast_timer_list) != NULL)
{
/* Start next timer.. */
long us;
struct timeval tv;
long us = 0;
struct fasttime_t tv;
do_gettimeofday_fast(&tv);
us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
t->tv_expires.tv_usec - tv.tv_usec);
/* time_after_eq takes care of wrapping */
if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
us = ((t->tv_expires.tv_jiff - tv.tv_jiff) *
1000000 / HZ + t->tv_expires.tv_usec -
tv.tv_usec);
if (us > 0)
{
if (!fast_timer_running)
@ -537,7 +450,6 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
#endif
start_timer1(us);
}
local_irq_restore(flags);
break;
}
else
@ -548,9 +460,10 @@ timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
D1(printk("e! %d\n", us));
}
}
local_irq_restore(flags);
}
local_irq_restore(flags);
if (!t)
{
D1(printk("t1 stop!\n"));
@ -575,28 +488,17 @@ static void wake_up_func(unsigned long data)
void schedule_usleep(unsigned long us)
{
struct fast_timer t;
#ifdef DECLARE_WAITQUEUE
wait_queue_head_t sleep_wait;
init_waitqueue_head(&sleep_wait);
{
DECLARE_WAITQUEUE(wait, current);
#else
struct wait_queue *sleep_wait = NULL;
struct wait_queue wait = { current, NULL };
#endif
D1(printk("schedule_usleep(%d)\n", us));
add_wait_queue(&sleep_wait, &wait);
set_current_state(TASK_INTERRUPTIBLE);
start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
"usleep");
schedule();
set_current_state(TASK_RUNNING);
remove_wait_queue(&sleep_wait, &wait);
/* Uninterruptible sleep on the fast timer. (The condition is somewhat
* redundant since the timer is what wakes us up.) */
wait_event(sleep_wait, !fast_timer_pending(&t));
D1(printk("done schedule_usleep(%d)\n", us));
#ifdef DECLARE_WAITQUEUE
}
#endif
}
#ifdef CONFIG_PROC_FS
@ -616,7 +518,7 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
unsigned long flags;
int i = 0;
int num_to_show;
struct timeval tv;
struct fasttime_t tv;
struct fast_timer *t, *nextt;
static char *bigbuf = NULL;
static unsigned long used;
@ -624,7 +526,8 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
{
used = 0;
bigbuf[0] = '\0';
if (buf)
buf[0] = '\0';
return 0;
}
@ -646,7 +549,7 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
used += sprintf(bigbuf + used, "Fast timer running: %s\n",
fast_timer_running ? "yes" : "no");
used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
(unsigned long)tv.tv_sec,
(unsigned long)tv.tv_jiff,
(unsigned long)tv.tv_usec);
#ifdef FAST_TIMER_SANITY_CHECKS
used += sprintf(bigbuf + used, "Sanity failed: %i\n",
@ -696,9 +599,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
"d: %6li us data: 0x%08lX"
"\n",
t->name,
(unsigned long)t->tv_set.tv_sec,
(unsigned long)t->tv_set.tv_jiff,
(unsigned long)t->tv_set.tv_usec,
(unsigned long)t->tv_expires.tv_sec,
(unsigned long)t->tv_expires.tv_jiff,
(unsigned long)t->tv_expires.tv_usec,
t->delay_us,
t->data
@ -718,9 +621,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
"d: %6li us data: 0x%08lX"
"\n",
t->name,
(unsigned long)t->tv_set.tv_sec,
(unsigned long)t->tv_set.tv_jiff,
(unsigned long)t->tv_set.tv_usec,
(unsigned long)t->tv_expires.tv_sec,
(unsigned long)t->tv_expires.tv_jiff,
(unsigned long)t->tv_expires.tv_usec,
t->delay_us,
t->data
@ -738,9 +641,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
"d: %6li us data: 0x%08lX"
"\n",
t->name,
(unsigned long)t->tv_set.tv_sec,
(unsigned long)t->tv_set.tv_jiff,
(unsigned long)t->tv_set.tv_usec,
(unsigned long)t->tv_expires.tv_sec,
(unsigned long)t->tv_expires.tv_jiff,
(unsigned long)t->tv_expires.tv_usec,
t->delay_us,
t->data
@ -761,15 +664,15 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
/* " func: 0x%08lX" */
"\n",
t->name,
(unsigned long)t->tv_set.tv_sec,
(unsigned long)t->tv_set.tv_jiff,
(unsigned long)t->tv_set.tv_usec,
(unsigned long)t->tv_expires.tv_sec,
(unsigned long)t->tv_expires.tv_jiff,
(unsigned long)t->tv_expires.tv_usec,
t->delay_us,
t->data
/* , t->function */
);
local_irq_disable();
local_irq_save(flags);
if (t->next != nextt)
{
printk(KERN_WARNING "timer removed!\n");
@ -798,7 +701,7 @@ static volatile int num_test_timeout = 0;
static struct fast_timer tr[10];
static int exp_num[10];
static struct timeval tv_exp[100];
static struct fasttime_t tv_exp[100];
static void test_timeout(unsigned long data)
{
@ -836,7 +739,7 @@ static void fast_timer_test(void)
int prev_num;
int j;
struct timeval tv, tv0, tv1, tv2;
struct fasttime_t tv, tv0, tv1, tv2;
printk("fast_timer_test() start\n");
do_gettimeofday_fast(&tv);
@ -849,7 +752,8 @@ static void fast_timer_test(void)
{
do_gettimeofday_fast(&tv_exp[j]);
}
printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
printk(KERN_DEBUG "fast_timer_test() %is %06i\n",
tv.tv_jiff, tv.tv_usec);
for (j = 0; j < 1000; j++)
{
@ -858,12 +762,12 @@ static void fast_timer_test(void)
}
for (j = 0; j < 100; j++)
{
printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
tv_exp[j].tv_sec,tv_exp[j].tv_usec,
tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
printk(KERN_DEBUG "%i.%i %i.%i %i.%i %i.%i %i.%i\n",
tv_exp[j].tv_jiff, tv_exp[j].tv_usec,
tv_exp[j+1].tv_jiff, tv_exp[j+1].tv_usec,
tv_exp[j+2].tv_jiff, tv_exp[j+2].tv_usec,
tv_exp[j+3].tv_jiff, tv_exp[j+3].tv_usec,
tv_exp[j+4].tv_jiff, tv_exp[j+4].tv_usec);
j += 4;
}
do_gettimeofday_fast(&tv0);
@ -895,9 +799,12 @@ static void fast_timer_test(void)
}
}
do_gettimeofday_fast(&tv2);
printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
printk(KERN_DEBUG "Timers started %is %06i\n",
tv0.tv_jiff, tv0.tv_usec);
printk(KERN_DEBUG "Timers started at %is %06i\n",
tv1.tv_jiff, tv1.tv_usec);
printk(KERN_DEBUG "Timers done %is %06i\n",
tv2.tv_jiff, tv2.tv_usec);
DP(printk("buf0:\n");
printk(buf0);
printk("buf1:\n");
@ -919,9 +826,9 @@ static void fast_timer_test(void)
printk("%-10s set: %6is %06ius exp: %6is %06ius "
"data: 0x%08X func: 0x%08X\n",
t->name,
t->tv_set.tv_sec,
t->tv_set.tv_jiff,
t->tv_set.tv_usec,
t->tv_expires.tv_sec,
t->tv_expires.tv_jiff,
t->tv_expires.tv_usec,
t->data,
t->function
@ -929,10 +836,12 @@ static void fast_timer_test(void)
printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
t->delay_us,
tv_exp[j].tv_sec,
tv_exp[j].tv_jiff,
tv_exp[j].tv_usec,
exp_num[j],
(tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
(tv_exp[j].tv_jiff - t->tv_expires.tv_jiff) *
1000000 + tv_exp[j].tv_usec -
t->tv_expires.tv_usec);
}
proc_fasttimer_read(buf5, NULL, 0, 0, 0);
printk("buf5 after all done:\n");
@ -942,7 +851,7 @@ static void fast_timer_test(void)
#endif
void fast_timer_init(void)
int fast_timer_init(void)
{
/* For some reason, request_irq() hangs when called froom time_init() */
if (!fast_timer_is_init)
@ -975,4 +884,6 @@ void fast_timer_init(void)
fast_timer_test();
#endif
}
return 0;
}
__initcall(fast_timer_init);

View File

@ -304,7 +304,7 @@ static unsigned char clear_group_from_set(const unsigned char groups, struct if_
static struct if_group *get_group(const unsigned char groups)
{
int i;
for (i = 0; i < sizeof(if_groups)/sizeof(struct if_group); i++) {
for (i = 0; i < ARRAY_SIZE(if_groups); i++) {
if (groups & if_groups[i].group) {
return &if_groups[i];
}

View File

@ -12,10 +12,16 @@
*/
#include <asm/irq.h>
#include <asm/current.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/init.h>
/* From kgdb.c. */
extern void kgdb_init(void);
extern void breakpoint(void);
#define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
#define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
@ -75,8 +81,8 @@ BUILD_IRQ(12, 0x1000)
BUILD_IRQ(13, 0x2000)
void mmu_bus_fault(void); /* IRQ 14 is the bus fault interrupt */
void multiple_interrupt(void); /* IRQ 15 is the multiple IRQ interrupt */
BUILD_IRQ(16, 0x10000)
BUILD_IRQ(17, 0x20000)
BUILD_IRQ(16, 0x10000 | 0x20000) /* ethernet tx interrupt needs to block rx */
BUILD_IRQ(17, 0x20000 | 0x10000) /* ...and vice versa */
BUILD_IRQ(18, 0x40000)
BUILD_IRQ(19, 0x80000)
BUILD_IRQ(20, 0x100000)
@ -147,6 +153,55 @@ void system_call(void); /* from entry.S */
void do_sigtrap(void); /* from entry.S */
void gdb_handle_breakpoint(void); /* from entry.S */
extern void do_IRQ(int irq, struct pt_regs * regs);
/* Handle multiple IRQs */
void do_multiple_IRQ(struct pt_regs* regs)
{
int bit;
unsigned masked;
unsigned mask;
unsigned ethmask = 0;
/* Get interrupts to mask and handle */
mask = masked = *R_VECT_MASK_RD;
/* Never mask timer IRQ */
mask &= ~(IO_MASK(R_VECT_MASK_RD, timer0));
/*
* If either ethernet interrupt (rx or tx) is active then block
* the other one too. Unblock afterwards also.
*/
if (mask &
(IO_STATE(R_VECT_MASK_RD, dma0, active) |
IO_STATE(R_VECT_MASK_RD, dma1, active))) {
ethmask = (IO_MASK(R_VECT_MASK_RD, dma0) |
IO_MASK(R_VECT_MASK_RD, dma1));
}
/* Block them */
*R_VECT_MASK_CLR = (mask | ethmask);
/* An extra irq_enter here to prevent softIRQs to run after
* each do_IRQ. This will decrease the interrupt latency.
*/
irq_enter();
/* Handle all IRQs */
for (bit = 2; bit < 32; bit++) {
if (masked & (1 << bit)) {
do_IRQ(bit, regs);
}
}
/* This irq_exit() will trigger the soft IRQs. */
irq_exit();
/* Unblock the IRQs again */
*R_VECT_MASK_SET = (masked | ethmask);
}
/* init_IRQ() is called by start_kernel and is responsible for fixing IRQ masks and
setting the irq vector table.
*/

View File

@ -13,6 +13,7 @@
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
#include <linux/delay.h>
#include <linux/param.h>
#ifdef CONFIG_PROC_FS
#define HAS_FPU 0x0001
@ -56,8 +57,8 @@ int show_cpuinfo(struct seq_file *m, void *v)
revision = rdvr();
if (revision >= sizeof cpu_info/sizeof *cpu_info)
info = &cpu_info[sizeof cpu_info/sizeof *cpu_info - 1];
if (revision >= ARRAY_SIZE(cpu_info))
info = &cpu_info[ARRAY_SIZE(cpu_info) - 1];
else
info = &cpu_info[revision];

View File

@ -1,5 +1,4 @@
/* $Id: time.c,v 1.5 2004/09/29 06:12:46 starvik Exp $
*
/*
* linux/arch/cris/arch-v10/kernel/time.c
*
* Copyright (C) 1991, 1992, 1995 Linus Torvalds
@ -20,6 +19,7 @@
#include <asm/io.h>
#include <asm/delay.h>
#include <asm/rtc.h>
#include <asm/irq_regs.h>
/* define this if you need to use print_timestamp */
/* it will make jiffies at 96 hz instead of 100 hz though */
@ -201,8 +201,9 @@ static long last_rtc_update = 0;
extern void cris_do_profile(struct pt_regs *regs);
static inline irqreturn_t
timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
timer_interrupt(int irq, void *dev_id)
{
struct pt_regs *regs = get_irq_regs();
/* acknowledge the timer irq */
#ifdef USE_CASCADE_TIMERS
@ -221,9 +222,11 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
#endif
/* reset watchdog otherwise it resets us! */
reset_watchdog();
/* Update statistics. */
update_process_times(user_mode(regs));
/* call the real timer interrupt handler */
do_timer(1);

View File

@ -66,7 +66,7 @@ void *memset(void *pdst,
{
register char *dst __asm__ ("r13") = pdst;
/* This is NONPORTABLE, but since this whole routine is */
/* grossly nonportable that doesn't matter. */
@ -110,52 +110,52 @@ void *memset(void *pdst,
If you want to check that the allocation was right; then
check the equalities in the first comment. It should say
"r13=r13, r12=r12, r11=r11" */
__asm__ volatile ("
;; Check that the following is true (same register names on
;; both sides of equal sign, as in r8=r8):
;; %0=r13, %1=r12, %4=r11
;;
;; Save the registers we'll clobber in the movem process
;; on the stack. Don't mention them to gcc, it will only be
;; upset.
subq 11*4,$sp
movem $r10,[$sp]
move.d $r11,$r0
move.d $r11,$r1
move.d $r11,$r2
move.d $r11,$r3
move.d $r11,$r4
move.d $r11,$r5
move.d $r11,$r6
move.d $r11,$r7
move.d $r11,$r8
move.d $r11,$r9
move.d $r11,$r10
;; Now we've got this:
;; r13 - dst
;; r12 - n
;; Update n for the first loop
subq 12*4,$r12
0:
subq 12*4,$r12
bge 0b
movem $r11,[$r13+]
addq 12*4,$r12 ;; compensate for last loop underflowing n
;; Restore registers from stack
movem [$sp+],$r10"
__asm__ volatile ("\n\
;; Check that the following is true (same register names on \n\
;; both sides of equal sign, as in r8=r8): \n\
;; %0=r13, %1=r12, %4=r11 \n\
;; \n\
;; Save the registers we'll clobber in the movem process \n\
;; on the stack. Don't mention them to gcc, it will only be \n\
;; upset. \n\
subq 11*4,$sp \n\
movem $r10,[$sp] \n\
\n\
move.d $r11,$r0 \n\
move.d $r11,$r1 \n\
move.d $r11,$r2 \n\
move.d $r11,$r3 \n\
move.d $r11,$r4 \n\
move.d $r11,$r5 \n\
move.d $r11,$r6 \n\
move.d $r11,$r7 \n\
move.d $r11,$r8 \n\
move.d $r11,$r9 \n\
move.d $r11,$r10 \n\
\n\
;; Now we've got this: \n\
;; r13 - dst \n\
;; r12 - n \n\
\n\
;; Update n for the first loop \n\
subq 12*4,$r12 \n\
0: \n\
subq 12*4,$r12 \n\
bge 0b \n\
movem $r11,[$r13+] \n\
\n\
addq 12*4,$r12 ;; compensate for last loop underflowing n \n\
\n\
;; Restore registers from stack \n\
movem [$sp+],$r10"
/* Outputs */ : "=r" (dst), "=r" (n)
/* Inputs */ : "0" (dst), "1" (n), "r" (lc));
}
/* Either we directly starts copying, using dword copying
in a loop, or we copy as much as possible with 'movem'
in a loop, or we copy as much as possible with 'movem'
and then the last block (<44 bytes) is copied here.
This will work since 'movem' will have updated src,dst,n. */

View File

@ -95,33 +95,33 @@ void *memcpy(void *pdst,
If you want to check that the allocation was right; then
check the equalities in the first comment. It should say
"r13=r13, r11=r11, r12=r12" */
__asm__ volatile ("
;; Check that the following is true (same register names on
;; both sides of equal sign, as in r8=r8):
;; %0=r13, %1=r11, %2=r12
;;
;; Save the registers we'll use in the movem process
;; on the stack.
subq 11*4,$sp
movem $r10,[$sp]
;; Now we've got this:
;; r11 - src
;; r13 - dst
;; r12 - n
;; Update n for the first loop
subq 44,$r12
0:
movem [$r11+],$r10
subq 44,$r12
bge 0b
movem $r10,[$r13+]
addq 44,$r12 ;; compensate for last loop underflowing n
;; Restore registers from stack
movem [$sp+],$r10"
__asm__ volatile ("\n\
;; Check that the following is true (same register names on \n\
;; both sides of equal sign, as in r8=r8): \n\
;; %0=r13, %1=r11, %2=r12 \n\
;; \n\
;; Save the registers we'll use in the movem process \n\
;; on the stack. \n\
subq 11*4,$sp \n\
movem $r10,[$sp] \n\
\n\
;; Now we've got this: \n\
;; r11 - src \n\
;; r13 - dst \n\
;; r12 - n \n\
\n\
;; Update n for the first loop \n\
subq 44,$r12 \n\
0: \n\
movem [$r11+],$r10 \n\
subq 44,$r12 \n\
bge 0b \n\
movem $r10,[$r13+] \n\
\n\
addq 44,$r12 ;; compensate for last loop underflowing n \n\
\n\
;; Restore registers from stack \n\
movem [$sp+],$r10"
/* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
/* Inputs */ : "0" (dst), "1" (src), "2" (n));

View File

@ -92,58 +92,58 @@ __copy_user (void __user *pdst, const void *psrc, unsigned long pn)
.ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
.err \n\
.endif \n\
;; Save the registers we'll use in the movem process
;; on the stack.
subq 11*4,$sp
movem $r10,[$sp]
;; Now we've got this:
;; r11 - src
;; r13 - dst
;; r12 - n
;; Update n for the first loop
subq 44,$r12
; Since the noted PC of a faulting instruction in a delay-slot of a taken
; branch, is that of the branch target, we actually point at the from-movem
; for this case. There is no ambiguity here; if there was a fault in that
; instruction (meaning a kernel oops), the faulted PC would be the address
; after *that* movem.
0:
movem [$r11+],$r10
subq 44,$r12
bge 0b
movem $r10,[$r13+]
1:
addq 44,$r12 ;; compensate for last loop underflowing n
;; Restore registers from stack
movem [$sp+],$r10
2:
.section .fixup,\"ax\"
; To provide a correct count in r10 of bytes that failed to be copied,
; we jump back into the loop if the loop-branch was taken. There is no
; performance penalty for sany use; the program will segfault soon enough.
3:
move.d [$sp],$r10
addq 44,$r10
move.d $r10,[$sp]
jump 0b
4:
movem [$sp+],$r10
addq 44,$r10
addq 44,$r12
jump 2b
.previous
.section __ex_table,\"a\"
.dword 0b,3b
.dword 1b,4b
\n\
;; Save the registers we'll use in the movem process \n\
;; on the stack. \n\
subq 11*4,$sp \n\
movem $r10,[$sp] \n\
\n\
;; Now we've got this: \n\
;; r11 - src \n\
;; r13 - dst \n\
;; r12 - n \n\
\n\
;; Update n for the first loop \n\
subq 44,$r12 \n\
\n\
; Since the noted PC of a faulting instruction in a delay-slot of a taken \n\
; branch, is that of the branch target, we actually point at the from-movem \n\
; for this case. There is no ambiguity here; if there was a fault in that \n\
; instruction (meaning a kernel oops), the faulted PC would be the address \n\
; after *that* movem. \n\
\n\
0: \n\
movem [$r11+],$r10 \n\
subq 44,$r12 \n\
bge 0b \n\
movem $r10,[$r13+] \n\
1: \n\
addq 44,$r12 ;; compensate for last loop underflowing n \n\
\n\
;; Restore registers from stack \n\
movem [$sp+],$r10 \n\
2: \n\
.section .fixup,\"ax\" \n\
\n\
; To provide a correct count in r10 of bytes that failed to be copied, \n\
; we jump back into the loop if the loop-branch was taken. There is no \n\
; performance penalty for sany use; the program will segfault soon enough.\n\
\n\
3: \n\
move.d [$sp],$r10 \n\
addq 44,$r10 \n\
move.d $r10,[$sp] \n\
jump 0b \n\
4: \n\
movem [$sp+],$r10 \n\
addq 44,$r10 \n\
addq 44,$r12 \n\
jump 2b \n\
\n\
.previous \n\
.section __ex_table,\"a\" \n\
.dword 0b,3b \n\
.dword 1b,4b \n\
.previous"
/* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
@ -253,59 +253,59 @@ __copy_user_zeroing (void __user *pdst, const void *psrc, unsigned long pn)
If you want to check that the allocation was right; then
check the equalities in the first comment. It should say
"r13=r13, r11=r11, r12=r12" */
__asm__ volatile ("
__asm__ volatile ("\n\
.ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
.err \n\
.endif \n\
;; Save the registers we'll use in the movem process
;; on the stack.
subq 11*4,$sp
movem $r10,[$sp]
;; Now we've got this:
;; r11 - src
;; r13 - dst
;; r12 - n
;; Update n for the first loop
subq 44,$r12
0:
movem [$r11+],$r10
1:
subq 44,$r12
bge 0b
movem $r10,[$r13+]
addq 44,$r12 ;; compensate for last loop underflowing n
;; Restore registers from stack
movem [$sp+],$r10
4:
.section .fixup,\"ax\"
;; Do not jump back into the loop if we fail. For some uses, we get a
;; page fault somewhere on the line. Without checking for page limits,
;; we don't know where, but we need to copy accurately and keep an
;; accurate count; not just clear the whole line. To do that, we fall
;; down in the code below, proceeding with smaller amounts. It should
;; be kept in mind that we have to cater to code like what at one time
;; was in fs/super.c:
;; i = size - copy_from_user((void *)page, data, size);
;; which would cause repeated faults while clearing the remainder of
;; the SIZE bytes at PAGE after the first fault.
;; A caveat here is that we must not fall through from a failing page
;; to a valid page.
3:
movem [$sp+],$r10
addq 44,$r12 ;; Get back count before faulting point.
subq 44,$r11 ;; Get back pointer to faulting movem-line.
jump 4b ;; Fall through, pretending the fault didn't happen.
.previous
.section __ex_table,\"a\"
.dword 1b,3b
\n\
;; Save the registers we'll use in the movem process \n\
;; on the stack. \n\
subq 11*4,$sp \n\
movem $r10,[$sp] \n\
\n\
;; Now we've got this: \n\
;; r11 - src \n\
;; r13 - dst \n\
;; r12 - n \n\
\n\
;; Update n for the first loop \n\
subq 44,$r12 \n\
0: \n\
movem [$r11+],$r10 \n\
1: \n\
subq 44,$r12 \n\
bge 0b \n\
movem $r10,[$r13+] \n\
\n\
addq 44,$r12 ;; compensate for last loop underflowing n \n\
\n\
;; Restore registers from stack \n\
movem [$sp+],$r10 \n\
4: \n\
.section .fixup,\"ax\" \n\
\n\
;; Do not jump back into the loop if we fail. For some uses, we get a \n\
;; page fault somewhere on the line. Without checking for page limits, \n\
;; we don't know where, but we need to copy accurately and keep an \n\
;; accurate count; not just clear the whole line. To do that, we fall \n\
;; down in the code below, proceeding with smaller amounts. It should \n\
;; be kept in mind that we have to cater to code like what at one time \n\
;; was in fs/super.c: \n\
;; i = size - copy_from_user((void *)page, data, size); \n\
;; which would cause repeated faults while clearing the remainder of \n\
;; the SIZE bytes at PAGE after the first fault. \n\
;; A caveat here is that we must not fall through from a failing page \n\
;; to a valid page. \n\
\n\
3: \n\
movem [$sp+],$r10 \n\
addq 44,$r12 ;; Get back count before faulting point. \n\
subq 44,$r11 ;; Get back pointer to faulting movem-line. \n\
jump 4b ;; Fall through, pretending the fault didn't happen.\n\
\n\
.previous \n\
.section __ex_table,\"a\" \n\
.dword 1b,3b \n\
.previous"
/* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
@ -425,64 +425,64 @@ __do_clear_user (void __user *pto, unsigned long pn)
If you want to check that the allocation was right; then
check the equalities in the first comment. It should say
something like "r13=r13, r11=r11, r12=r12". */
__asm__ volatile ("
__asm__ volatile ("\n\
.ifnc %0%1%2,$r13$r12$r10 \n\
.err \n\
.endif \n\
;; Save the registers we'll clobber in the movem process
;; on the stack. Don't mention them to gcc, it will only be
;; upset.
subq 11*4,$sp
movem $r10,[$sp]
clear.d $r0
clear.d $r1
clear.d $r2
clear.d $r3
clear.d $r4
clear.d $r5
clear.d $r6
clear.d $r7
clear.d $r8
clear.d $r9
clear.d $r10
clear.d $r11
;; Now we've got this:
;; r13 - dst
;; r12 - n
;; Update n for the first loop
subq 12*4,$r12
0:
subq 12*4,$r12
bge 0b
movem $r11,[$r13+]
1:
addq 12*4,$r12 ;; compensate for last loop underflowing n
;; Restore registers from stack
movem [$sp+],$r10
2:
.section .fixup,\"ax\"
3:
move.d [$sp],$r10
addq 12*4,$r10
move.d $r10,[$sp]
clear.d $r10
jump 0b
4:
movem [$sp+],$r10
addq 12*4,$r10
addq 12*4,$r12
jump 2b
.previous
.section __ex_table,\"a\"
.dword 0b,3b
.dword 1b,4b
\n\
;; Save the registers we'll clobber in the movem process \n\
;; on the stack. Don't mention them to gcc, it will only be \n\
;; upset. \n\
subq 11*4,$sp \n\
movem $r10,[$sp] \n\
\n\
clear.d $r0 \n\
clear.d $r1 \n\
clear.d $r2 \n\
clear.d $r3 \n\
clear.d $r4 \n\
clear.d $r5 \n\
clear.d $r6 \n\
clear.d $r7 \n\
clear.d $r8 \n\
clear.d $r9 \n\
clear.d $r10 \n\
clear.d $r11 \n\
\n\
;; Now we've got this: \n\
;; r13 - dst \n\
;; r12 - n \n\
\n\
;; Update n for the first loop \n\
subq 12*4,$r12 \n\
0: \n\
subq 12*4,$r12 \n\
bge 0b \n\
movem $r11,[$r13+] \n\
1: \n\
addq 12*4,$r12 ;; compensate for last loop underflowing n\n\
\n\
;; Restore registers from stack \n\
movem [$sp+],$r10 \n\
2: \n\
.section .fixup,\"ax\" \n\
3: \n\
move.d [$sp],$r10 \n\
addq 12*4,$r10 \n\
move.d $r10,[$sp] \n\
clear.d $r10 \n\
jump 0b \n\
\n\
4: \n\
movem [$sp+],$r10 \n\
addq 12*4,$r10 \n\
addq 12*4,$r12 \n\
jump 2b \n\
\n\
.previous \n\
.section __ex_table,\"a\" \n\
.dword 0b,3b \n\
.dword 1b,4b \n\
.previous"
/* Outputs */ : "=r" (dst), "=r" (n), "=r" (retn)

View File

@ -362,8 +362,6 @@ config ETRAX_AXISFLASHMAP
select MTD
select MTD_CFI
select MTD_CFI_AMDSTD
select MTD_OBSOLETE_CHIPS
select MTD_AMDSTD
select MTD_CHAR
select MTD_BLOCK
select MTD_PARTITIONS

View File

@ -190,13 +190,12 @@ static struct mtd_info *probe_cs(struct map_info *map_cs)
"%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
map_cs->name, map_cs->size, map_cs->map_priv_1);
#ifdef CONFIG_MTD_AMDSTD
mtd_cs = do_map_probe("amd_flash", map_cs);
#endif
#ifdef CONFIG_MTD_CFI
if (!mtd_cs) {
mtd_cs = do_map_probe("cfi_probe", map_cs);
}
#endif
#ifdef CONFIG_MTD_JEDECPROBE
if (!mtd_cs)
mtd_cs = do_map_probe("jedec_probe", map_cs);
#endif
return mtd_cs;

View File

@ -185,7 +185,7 @@ static struct sync_port ports[]=
}
};
#define NUMBER_OF_PORTS (sizeof(ports)/sizeof(sync_port))
#define NUMBER_OF_PORTS ARRAY_SIZE(ports)
static const struct file_operations sync_serial_fops = {
.owner = THIS_MODULE,

View File

@ -0,0 +1,33 @@
#include <linux/module.h>
#include <asm/io.h>
#include <asm/arch/cache.h>
#include <asm/arch/hwregs/dma.h>
/* This file is used to workaround a cache bug, Guinness TR 106. */
inline void flush_dma_descr(struct dma_descr_data *descr, int flush_buf)
{
/* Flush descriptor to make sure we get correct in_eop and after. */
asm volatile ("ftagd [%0]" :: "r" (descr));
/* Flush buffer pointed out by descriptor. */
if (flush_buf)
cris_flush_cache_range(phys_to_virt((unsigned)descr->buf),
(unsigned)(descr->after - descr->buf));
}
EXPORT_SYMBOL(flush_dma_descr);
void flush_dma_list(struct dma_descr_data *descr)
{
while (1) {
flush_dma_descr(descr, 1);
if (descr->eol)
break;
descr = phys_to_virt((unsigned)descr->next);
}
}
EXPORT_SYMBOL(flush_dma_list);
/* From cacheflush.S */
EXPORT_SYMBOL(cris_flush_cache);
/* From cacheflush.S */
EXPORT_SYMBOL(cris_flush_cache_range);

View File

@ -0,0 +1,94 @@
.global cris_flush_cache_range
cris_flush_cache_range:
move.d 1024, $r12
cmp.d $r11, $r12
bhi cris_flush_1KB
nop
add.d $r10, $r11
ftagd [$r10]
cris_flush_last:
addq 32, $r10
cmp.d $r11, $r10
blt cris_flush_last
ftagd [$r10]
ret
nop
cris_flush_1KB:
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ba cris_flush_cache_range
sub.d $r12, $r11
.global cris_flush_cache
cris_flush_cache:
moveq 0, $r10
cris_flush_line:
move.d 16*1024, $r11
addq 16, $r10
cmp.d $r10, $r11
blt cris_flush_line
fidxd [$r10]
ret
nop

View File

@ -49,7 +49,7 @@ struct crisv32_ioport crisv32_ioports[] =
}
};
#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
#define NBR_OF_PORTS ARRAY_SIZE(crisv32_ioports)
struct crisv32_iopin crisv32_led1_green;
struct crisv32_iopin crisv32_led1_red;

View File

@ -54,12 +54,10 @@ show_cpuinfo(struct seq_file *m, void *v)
{
int i;
int cpu = (int)v - 1;
int entries;
unsigned long revision;
struct cpu_info *info;
entries = sizeof cpinfo / sizeof(struct cpu_info);
info = &cpinfo[entries - 1];
info = &cpinfo[ARRAY_SIZE(cpinfo) - 1];
#ifdef CONFIG_SMP
if (!cpu_online(cpu))
@ -68,7 +66,7 @@ show_cpuinfo(struct seq_file *m, void *v)
revision = rdvr();
for (i = 0; i < entries; i++) {
for (i = 0; i < ARRAY_SIZE(cpinfo); i++) {
if (cpinfo[i].rev == revision) {
info = &cpinfo[i];
break;

View File

@ -226,8 +226,6 @@ CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_OBSOLETE_CHIPS=y
CONFIG_MTD_AMDSTD=y
# CONFIG_MTD_SHARP is not set
# CONFIG_MTD_JEDEC is not set
@ -276,6 +274,7 @@ CONFIG_MTDRAM_ABS_POS=0x0
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
@ -302,16 +301,14 @@ CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
# CONFIG_IDE is not set
# CONFIG_PARIDE is not set
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
@ -321,7 +318,6 @@ CONFIG_BLK_DEV_IDECD=y
#
# CONFIG_IDE_GENERIC is not set
# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
@ -329,6 +325,7 @@ CONFIG_BLK_DEV_IDEDMA=y
# SCSI device support
#
# CONFIG_SCSI is not set
# CONFIG_ISCSI_TCP is not set
#
# IEEE 1394 (FireWire) support
@ -414,26 +411,11 @@ CONFIG_NETFILTER=y
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
CONFIG_BT=y
CONFIG_BT_L2CAP=y
# CONFIG_BT_SCO is not set
CONFIG_BT_RFCOMM=y
# CONFIG_BT_RFCOMM_TTY is not set
CONFIG_BT_BNEP=y
# CONFIG_BT_BNEP_MC_FILTER is not set
# CONFIG_BT_BNEP_PROTO_FILTER is not set
# CONFIG_BT_HIDP is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_RXRPC_DEBUG is not set
# CONFIG_BT is not set
# CONFIG_I2C is not set
#
# Bluetooth device drivers
#
CONFIG_BT_HCIUSB=y
# CONFIG_BT_HCIUSB_SCO is not set
# CONFIG_BT_HCIUART is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIVHCI is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
@ -485,31 +467,17 @@ CONFIG_NET_ETHERNET=y
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
# CONFIG_INPUT is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_CT82C710 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Input Device Drivers
@ -525,6 +493,7 @@ CONFIG_MOUSE_PS2=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
@ -542,6 +511,8 @@ CONFIG_MOUSE_PS2=y
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@ -559,6 +530,8 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RTC_LIB is not set
# CONFIG_RTC_CLASS is not set
#
# Ftape, the floppy tape device driver
@ -660,7 +633,9 @@ CONFIG_NFS_V3=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
@ -685,10 +660,22 @@ CONFIG_MSDOS_PARTITION=y
#
# CONFIG_SOUND is not set
#
# Generic devices
#
# CONFIG_SND_MPU401_UART is not set
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
# CONFIG_PARPORT_PC_PCMCIA is not set
# CONFIG_NET_PCMCIA is not set
#
# PC-card bridges
@ -734,6 +721,7 @@ CONFIG_USB_DEVICEFS=y
# USB Input Devices
#
# CONFIG_USB_HID is not set
# HID_SUPPORT is not set
#
# USB HID Boot Protocol drivers
@ -829,7 +817,7 @@ CONFIG_USB_RTL8150=y
#
# Hardware crypto devices
#
# CONFIG_CRYPTO_HW is not set
#
# Library routines

View File

@ -27,6 +27,7 @@ extern void __Mod(void);
extern void __ashldi3(void);
extern void __ashrdi3(void);
extern void __lshrdi3(void);
extern void __negdi2(void);
extern void iounmap(volatile void * __iomem);
/* Platform dependent support */
@ -34,19 +35,6 @@ EXPORT_SYMBOL(kernel_thread);
EXPORT_SYMBOL(get_cmos_time);
EXPORT_SYMBOL(loops_per_usec);
/* String functions */
EXPORT_SYMBOL(memcmp);
EXPORT_SYMBOL(memmove);
EXPORT_SYMBOL(strstr);
EXPORT_SYMBOL(strcpy);
EXPORT_SYMBOL(strchr);
EXPORT_SYMBOL(strcmp);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strncat);
EXPORT_SYMBOL(strncmp);
EXPORT_SYMBOL(strncpy);
/* Math functions */
EXPORT_SYMBOL(__Udiv);
EXPORT_SYMBOL(__Umod);
@ -55,6 +43,7 @@ EXPORT_SYMBOL(__Mod);
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__lshrdi3);
EXPORT_SYMBOL(__negdi2);
/* Memory functions */
EXPORT_SYMBOL(__ioremap);
@ -84,4 +73,4 @@ EXPORT_SYMBOL(start_one_shot_timer);
EXPORT_SYMBOL(del_fast_timer);
EXPORT_SYMBOL(schedule_usleep);
#endif
EXPORT_SYMBOL(csum_partial);

View File

@ -2,7 +2,7 @@
*
* linux/arch/cris/kernel/irq.c
*
* Copyright (c) 2000,2001 Axis Communications AB
* Copyright (c) 2000,2007 Axis Communications AB
*
* Authors: Bjorn Wesen (bjornw@axis.com)
*
@ -92,14 +92,16 @@ int show_interrupts(struct seq_file *p, void *v)
asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
{
unsigned long sp;
struct pt_regs *old_regs = set_irq_regs(regs);
irq_enter();
sp = rdsp();
if (unlikely((sp & (PAGE_SIZE - 1)) < (PAGE_SIZE/8))) {
printk("do_IRQ: stack overflow: %lX\n", sp);
show_stack(NULL, (unsigned long *)sp);
}
__do_IRQ(irq, regs);
__do_IRQ(irq);
irq_exit();
set_irq_regs(old_regs);
}
void weird_irq(void)

View File

@ -195,6 +195,11 @@ EXPORT_SYMBOL(enable_hlt);
*/
void (*pm_idle)(void);
extern void default_idle(void);
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
/*
* The idle thread. There's no useful work to be
* done, so just try to conserve power and have a

View File

@ -81,13 +81,13 @@
/* notification of userspace execution resumption
* - triggered by current->work.notify_resume
*/
extern int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs);
extern int do_signal(int canrestart, struct pt_regs *regs);
void do_notify_resume(int canrestart, sigset_t *oldset, struct pt_regs *regs,
void do_notify_resume(int canrestart, struct pt_regs *regs,
__u32 thread_info_flags )
{
/* deal with pending signal delivery */
if (thread_info_flags & _TIF_SIGPENDING)
do_signal(canrestart,oldset,regs);
do_signal(canrestart,regs);
}

View File

@ -13,6 +13,7 @@
#include <linux/sched.h>
#include <linux/syscalls.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/sem.h>

View File

@ -171,10 +171,6 @@ get_cmos_time(void)
mon = CMOS_READ(RTC_MONTH);
year = CMOS_READ(RTC_YEAR);
printk(KERN_DEBUG
"rtc: sec 0x%x min 0x%x hour 0x%x day 0x%x mon 0x%x year 0x%x\n",
sec, min, hour, day, mon, year);
BCD_TO_BIN(sec);
BCD_TO_BIN(min);
BCD_TO_BIN(hour);
@ -207,12 +203,12 @@ void
cris_do_profile(struct pt_regs* regs)
{
#if CONFIG_SYSTEM_PROFILER
#ifdef CONFIG_SYSTEM_PROFILER
cris_profile_sample(regs);
#endif
#if CONFIG_PROFILING
profile_tick(CPU_PROFILING, regs);
#ifdef CONFIG_PROFILING
profile_tick(CPU_PROFILING);
#endif
}

View File

@ -1113,7 +1113,7 @@ efi_initialize_iomem_resources(struct resource *code_resource,
if (md->num_pages == 0) /* should not happen */
continue;
flags = IORESOURCE_MEM;
flags = IORESOURCE_MEM | IORESOURCE_BUSY;
switch (md->type) {
case EFI_MEMORY_MAPPED_IO:
@ -1135,12 +1135,11 @@ efi_initialize_iomem_resources(struct resource *code_resource,
case EFI_ACPI_MEMORY_NVS:
name = "ACPI Non-volatile Storage";
flags |= IORESOURCE_BUSY;
break;
case EFI_UNUSABLE_MEMORY:
name = "reserved";
flags |= IORESOURCE_BUSY | IORESOURCE_DISABLED;
flags |= IORESOURCE_DISABLED;
break;
case EFI_RESERVED_TYPE:
@ -1149,7 +1148,6 @@ efi_initialize_iomem_resources(struct resource *code_resource,
case EFI_ACPI_RECLAIM_MEMORY:
default:
name = "reserved";
flags |= IORESOURCE_BUSY;
break;
}

View File

@ -361,10 +361,10 @@ config QEMU
select PCSPEAKER
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select ARCH_SPARSEMEM_ENABLE
select GENERIC_HARDIRQS_NO__DO_IRQ
select NR_CPUS_DEFAULT_1
select SYS_SUPPORTS_SMP
@ -1409,7 +1409,6 @@ config MIPS_MT_SMP
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_2
select SMP
@ -1426,7 +1425,6 @@ config MIPS_MT_SMTC
select GENERIC_CLOCKEVENTS_BROADCAST
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_8
select SMP
@ -1453,7 +1451,6 @@ config MIPS_VPE_LOADER
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CPU_MIPSR2_SRS
select MIPS_MT
help
Includes a loader for loading an elf relocatable object
@ -1582,12 +1579,6 @@ config CPU_MIPSR2_IRQ_VI
config CPU_MIPSR2_IRQ_EI
bool
#
# Shadow registers are an R2 feature
#
config CPU_MIPSR2_SRS
bool
config CPU_HAS_SYNC
bool
depends on !CPU_R3000

View File

@ -44,7 +44,7 @@ endif
ifneq ($(SUBARCH),$(ARCH))
ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := $(call cc-cross-prefix, $(tool-archpref)-linux- $(tool-archpref)-gnu-linux- $(tool-archpref)-unknown-gnu-linux-)
CROSS_COMPILE := $(call cc-cross-prefix, $(tool-archpref)-linux- $(tool-archpref)-linux-gnu- $(tool-archpref)-unknown-linux-gnu-)
endif
endif

View File

@ -75,6 +75,7 @@ static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
__raw_writeq(0, cfg);
__raw_writeq(delta - 1, init);
__raw_writeq(M_SCD_TIMER_ENABLE, cfg);
@ -122,7 +123,7 @@ void __cpuinit sb1480_clockevent_init(void)
CLOCK_EVT_FEAT_ONESHOT;
clockevent_set_clock(cd, V_SCD_TIMER_FREQ);
cd->max_delta_ns = clockevent_delta2ns(0x7fffff, cd);
cd->min_delta_ns = clockevent_delta2ns(1, cd);
cd->min_delta_ns = clockevent_delta2ns(2, cd);
cd->rating = 200;
cd->irq = irq;
cd->cpumask = cpumask_of_cpu(cpu);
@ -143,7 +144,10 @@ void __cpuinit sb1480_clockevent_init(void)
action->handler = sibyte_counter_handler;
action->flags = IRQF_DISABLED | IRQF_PERCPU;
action->mask = cpumask_of_cpu(cpu);
action->name = name;
action->dev_id = cd;
irq_set_affinity(irq, cpumask_of_cpu(cpu));
setup_irq(irq, action);
}

View File

@ -73,6 +73,7 @@ static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
__raw_writeq(0, cfg);
__raw_writeq(delta - 1, init);
__raw_writeq(M_SCD_TIMER_ENABLE, cfg);
@ -121,7 +122,7 @@ void __cpuinit sb1250_clockevent_init(void)
CLOCK_EVT_FEAT_ONESHOT;
clockevent_set_clock(cd, V_SCD_TIMER_FREQ);
cd->max_delta_ns = clockevent_delta2ns(0x7fffff, cd);
cd->min_delta_ns = clockevent_delta2ns(1, cd);
cd->min_delta_ns = clockevent_delta2ns(2, cd);
cd->rating = 200;
cd->irq = irq;
cd->cpumask = cpumask_of_cpu(cpu);
@ -142,7 +143,10 @@ void __cpuinit sb1250_clockevent_init(void)
action->handler = sibyte_counter_handler;
action->flags = IRQF_DISABLED | IRQF_PERCPU;
action->mask = cpumask_of_cpu(cpu);
action->name = name;
action->dev_id = cd;
irq_set_affinity(irq, cpumask_of_cpu(cpu));
setup_irq(irq, action);
}

View File

@ -943,6 +943,11 @@ __init void cpu_probe(void)
}
__cpu_name[cpu] = cpu_to_name(c);
if (cpu_has_mips_r2)
c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
else
c->srsets = 1;
}
__init void cpu_report(void)

View File

@ -43,7 +43,7 @@ static cycle_t sb1250_hpt_read(void)
}
struct clocksource bcm1250_clocksource = {
.name = "MIPS",
.name = "bcm1250-counter-3",
.rating = 200,
.read = sb1250_hpt_read,
.mask = CLOCKSOURCE_MASK(23),

View File

@ -146,7 +146,7 @@ NESTED(handle_int, PT_SIZE, sp)
and k0, ST0_IEP
bnez k0, 1f
mfc0 k0, EP0_EPC
mfc0 k0, CP0_EPC
.set noreorder
j k0
rfe

View File

@ -430,6 +430,7 @@ asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
break;
default:
spin_unlock_irq(&current->sighand->siglock);
return -EINVAL;
}
recalc_sigpending();

View File

@ -44,5 +44,5 @@ void __init rm7k_cpu_irq_init(void)
for (i = base; i < base + 4; i++)
set_irq_chip_and_handler(i, &rm7k_irq_controller,
handle_level_irq);
handle_percpu_irq);
}

View File

@ -104,5 +104,5 @@ void __init rm9k_cpu_irq_init(void)
rm9000_perfcount_irq = base + 1;
set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq,
handle_level_irq);
handle_percpu_irq);
}

View File

@ -116,5 +116,5 @@ void __init mips_cpu_irq_init(void)
for (i = irq_base + 2; i < irq_base + 8; i++)
set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
handle_level_irq);
handle_percpu_irq);
}

View File

@ -60,6 +60,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
cpu_has_dsp ? " dsp" : "",
cpu_has_mipsmt ? " mt" : ""
);
seq_printf(m, "shadow register sets\t: %d\n",
cpu_data[n].srsets);
sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
cpu_has_vce ? "%u" : "not available");

View File

@ -293,7 +293,7 @@ EXPORT(sysn32_call_table)
PTR sys_ni_syscall /* 6170, was get_kernel_syms */
PTR sys_ni_syscall /* was query_module */
PTR sys_quotactl
PTR sys_nfsservctl
PTR compat_sys_nfsservctl
PTR sys_ni_syscall /* res. for getpmsg */
PTR sys_ni_syscall /* 6175 for putpmsg */
PTR sys_ni_syscall /* res. for afs_syscall */

View File

@ -1100,59 +1100,6 @@ void *set_except_vector(int n, void *addr)
return (void *)old_handler;
}
#ifdef CONFIG_CPU_MIPSR2_SRS
/*
* MIPSR2 shadow register set allocation
* FIXME: SMP...
*/
static struct shadow_registers {
/*
* Number of shadow register sets supported
*/
unsigned long sr_supported;
/*
* Bitmap of allocated shadow registers
*/
unsigned long sr_allocated;
} shadow_registers;
static void mips_srs_init(void)
{
shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
printk(KERN_INFO "%ld MIPSR2 register sets available\n",
shadow_registers.sr_supported);
shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
}
int mips_srs_max(void)
{
return shadow_registers.sr_supported;
}
int mips_srs_alloc(void)
{
struct shadow_registers *sr = &shadow_registers;
int set;
again:
set = find_first_zero_bit(&sr->sr_allocated, sr->sr_supported);
if (set >= sr->sr_supported)
return -1;
if (test_and_set_bit(set, &sr->sr_allocated))
goto again;
return set;
}
void mips_srs_free(int set)
{
struct shadow_registers *sr = &shadow_registers;
clear_bit(set, &sr->sr_allocated);
}
static asmlinkage void do_default_vi(void)
{
show_regs(get_irq_regs());
@ -1163,6 +1110,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
{
unsigned long handler;
unsigned long old_handler = vi_handlers[n];
int srssets = current_cpu_data.srsets;
u32 *w;
unsigned char *b;
@ -1178,7 +1126,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
b = (unsigned char *)(ebase + 0x200 + n*VECTORSPACING);
if (srs >= mips_srs_max())
if (srs >= srssets)
panic("Shadow register set %d not supported", srs);
if (cpu_has_veic) {
@ -1186,7 +1134,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
board_bind_eic_interrupt(n, srs);
} else if (cpu_has_vint) {
/* SRSMap is only defined if shadow sets are implemented */
if (mips_srs_max() > 1)
if (srssets > 1)
change_c0_srsmap(0xf << n*4, srs << n*4);
}
@ -1253,14 +1201,6 @@ void *set_vi_handler(int n, vi_handler_t addr)
return set_vi_srs_handler(n, addr, 0);
}
#else
static inline void mips_srs_init(void)
{
}
#endif /* CONFIG_CPU_MIPSR2_SRS */
/*
* This is used by native signal handling
*/
@ -1503,8 +1443,6 @@ void __init trap_init(void)
else
ebase = CAC_BASE;
mips_srs_init();
per_cpu_trap_init();
/*

View File

@ -1003,6 +1003,7 @@ static void cleanup_tc(struct tc *tc)
write_tc_c0_tcstatus(tmp);
write_tc_c0_tchalt(TCHALT_H);
mips_ihb();
/* bind it to anything other than VPE1 */
// write_tc_c0_tcbind(read_tc_c0_tcbind() & ~TCBIND_CURVPE); // | TCBIND_CURVPE
@ -1235,9 +1236,12 @@ int vpe_free(vpe_handle vpe)
settc(t->index);
write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
/* mark the TC unallocated and halt'ed */
write_tc_c0_tcstatus(read_tc_c0_tcstatus() & ~TCSTATUS_A);
/* halt the TC */
write_tc_c0_tchalt(TCHALT_H);
mips_ihb();
/* mark the TC unallocated */
write_tc_c0_tcstatus(read_tc_c0_tcstatus() & ~TCSTATUS_A);
v->state = VPE_STATE_UNUSED;
@ -1533,14 +1537,16 @@ static int __init vpe_module_init(void)
t->pvpe = get_vpe(0); /* set the parent vpe */
}
/* halt the TC */
write_tc_c0_tchalt(TCHALT_H);
mips_ihb();
tmp = read_tc_c0_tcstatus();
/* mark not activated and not dynamically allocatable */
tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
tmp |= TCSTATUS_IXMT; /* interrupt exempt */
write_tc_c0_tcstatus(tmp);
write_tc_c0_tchalt(TCHALT_H);
}
}

View File

@ -19,17 +19,14 @@
* Lasat boards.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/irq.h>
#include <asm/bootinfo.h>
#include <asm/irq_cpu.h>
#include <asm/lasat/lasatint.h>
#include <asm/time.h>
#include <asm/gdb-stub.h>
#include <irq.h>
static volatile int *lasat_int_status;
static volatile int *lasat_int_mask;
@ -97,12 +94,18 @@ asmlinkage void plat_irq_dispatch(void)
/* if int_status == 0, then the interrupt has already been cleared */
if (int_status) {
irq = LASATINT_BASE + ls1bit32(int_status);
irq = LASAT_IRQ_BASE + ls1bit32(int_status);
do_IRQ(irq);
}
}
static struct irqaction cascade = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade",
};
void __init arch_init_irq(void)
{
int i;
@ -127,6 +130,9 @@ void __init arch_init_irq(void)
}
mips_cpu_irq_init();
for (i = LASATINT_BASE; i <= LASATINT_END; i++)
for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++)
set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
setup_irq(LASAT_CASCADE_IRQ, &cascade);
}

View File

@ -7,6 +7,7 @@
* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle (ralf@gnu.org)
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/highmem.h>
#include <linux/kernel.h>
@ -507,7 +508,11 @@ static inline void local_r4k_flush_data_cache_page(void * addr)
static void r4k_flush_data_cache_page(unsigned long addr)
{
r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
if (in_atomic())
local_r4k_flush_data_cache_page((void *)addr);
else
r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr,
1, 1);
}
struct flush_icache_range_args {

View File

@ -154,7 +154,7 @@ static void check_bus_watcher(void)
if (status & ~(1UL << 31)) {
l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
#ifdef DUMP_L2_ECC_TAG_ON_ERROR
l2_tag = in64(IO_SPACE_BASE | A_L2_ECC_TAG);
l2_tag = in64(IOADDR(A_L2_ECC_TAG));
#endif
memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
printk("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
@ -183,9 +183,9 @@ asmlinkage void sb1_cache_error(void)
#ifdef CONFIG_SIBYTE_BW_TRACE
/* Freeze the trace buffer now */
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
csr_out32(M_BCM1480_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
csr_out32(M_BCM1480_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
#else
csr_out32(M_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
#endif
printk("Trace buffer frozen\n");
#endif

View File

@ -426,7 +426,7 @@ void __init mem_init(void)
#ifdef CONFIG_HIGHMEM
for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
struct page *page = mem_map + tmp;
struct page *page = pfn_to_page(tmp);
if (!page_is_ram(tmp)) {
SetPageReserved(page);

View File

@ -113,6 +113,16 @@ static char irq_tab_pcit[13][5] __initdata = {
{ 0, INTA, INTB, INTC, INTD }, /* Slot 5 */
};
static char irq_tab_pcit_cplus[13][5] __initdata = {
/* INTA INTB INTC INTD */
{ 0, 0, 0, 0, 0 }, /* HOST bridge */
{ 0, INTB, INTC, INTD, INTA }, /* PCI Slot 9 */
{ 0, 0, 0, 0, 0 }, /* PCI-EISA */
{ 0, 0, 0, 0, 0 }, /* Unused */
{ 0, INTA, INTB, INTC, INTD }, /* PCI-PCI bridge */
{ 0, INTB, INTC, INTD, INTA }, /* fixup */
};
static inline int is_rm300_revd(void)
{
unsigned char csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
@ -123,8 +133,19 @@ static inline int is_rm300_revd(void)
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
switch (sni_brd_type) {
case SNI_BRD_PCI_TOWER:
case SNI_BRD_PCI_TOWER_CPLUS:
if (slot == 4) {
/*
* SNI messed up interrupt wiring for onboard
* PCI bus 1; we need to fix this up here
*/
while (dev && dev->bus->number != 1)
dev = dev->bus->self;
if (dev && dev->devfn >= PCI_DEVFN(4, 0))
slot = 5;
}
return irq_tab_pcit_cplus[slot][pin];
case SNI_BRD_PCI_TOWER:
return irq_tab_pcit[slot][pin];
case SNI_BRD_PCI_MTOWER:

View File

@ -5,12 +5,14 @@
*
* Copyright (C) 2000, 2001, 04 Keith M Wesolowski
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasatint.h>
#include <irq.h>
extern struct pci_ops nile4_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
@ -55,15 +57,15 @@ static int __init lasat_pci_setup(void)
arch_initcall(lasat_pci_setup);
#define LASATINT_ETH1 (LASATINT_BASE + 0)
#define LASATINT_ETH0 (LASATINT_BASE + 1)
#define LASATINT_HDC (LASATINT_BASE + 2)
#define LASATINT_COMP (LASATINT_BASE + 3)
#define LASATINT_HDLC (LASATINT_BASE + 4)
#define LASATINT_PCIA (LASATINT_BASE + 5)
#define LASATINT_PCIB (LASATINT_BASE + 6)
#define LASATINT_PCIC (LASATINT_BASE + 7)
#define LASATINT_PCID (LASATINT_BASE + 8)
#define LASAT_IRQ_ETH1 (LASAT_IRQ_BASE + 0)
#define LASAT_IRQ_ETH0 (LASAT_IRQ_BASE + 1)
#define LASAT_IRQ_HDC (LASAT_IRQ_BASE + 2)
#define LASAT_IRQ_COMP (LASAT_IRQ_BASE + 3)
#define LASAT_IRQ_HDLC (LASAT_IRQ_BASE + 4)
#define LASAT_IRQ_PCIA (LASAT_IRQ_BASE + 5)
#define LASAT_IRQ_PCIB (LASAT_IRQ_BASE + 6)
#define LASAT_IRQ_PCIC (LASAT_IRQ_BASE + 7)
#define LASAT_IRQ_PCID (LASAT_IRQ_BASE + 8)
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
@ -71,13 +73,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
case 1:
case 2:
case 3:
return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
return LASAT_IRQ_PCIA + (((slot-1) + (pin-1)) % 4);
case 4:
return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
return LASAT_IRQ_ETH1; /* Ethernet 1 (LAN 2) */
case 5:
return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
return LASAT_IRQ_ETH0; /* Ethernet 0 (LAN 1) */
case 6:
return LASATINT_HDC; /* IDE controller */
return LASAT_IRQ_HDC; /* IDE controller */
default:
return 0xff; /* Illegal */
}

View File

@ -154,6 +154,7 @@ static int __init vr41xx_pciu_init(void)
pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
else {
printk(KERN_ERR "PCI Clock is over 33MHz.\n");
iounmap(pciu_base);
return -EINVAL;
}

View File

@ -4,6 +4,7 @@
obj-y = q-firmware.o q-irq.o q-mem.o q-setup.o q-reset.o
obj-$(CONFIG_SMP) += q-smp.o
obj-$(CONFIG_EARLY_PRINTK) += q-console.o
obj-$(CONFIG_SMP) += q-smp.o
EXTRA_CFLAGS += -Werror

View File

@ -0,0 +1,26 @@
#include <linux/console.h>
#include <linux/init.h>
#include <linux/serial_reg.h>
#include <asm/io.h>
#define PORT(offset) (0x3f8 + (offset))
static inline unsigned int serial_in(int offset)
{
return inb(PORT(offset));
}
static inline void serial_out(int offset, int value)
{
outb(value, PORT(offset));
}
int prom_putchar(char c)
{
while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
;
serial_out(UART_TX, c);
return 1;
}

View File

@ -2,6 +2,9 @@
#include <linux/string.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#define QEMU_PORT_BASE 0xb4000000
void __init prom_init(void)
{
@ -15,4 +18,7 @@ void __init prom_init(void)
} else {
add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
}
set_io_port_base(QEMU_PORT_BASE);
}

View File

@ -6,8 +6,6 @@
extern void qemu_reboot_setup(void);
#define QEMU_PORT_BASE 0xb4000000
const char *get_system_type(void)
{
return "Qemu";
@ -20,6 +18,5 @@ void __init plat_time_init(void)
void __init plat_mem_setup(void)
{
set_io_port_base(QEMU_PORT_BASE);
qemu_reboot_setup();
}

View File

@ -370,11 +370,11 @@ void __init arch_init_irq(void)
#endif
/* Setup uart 1 settings, mapper */
/* QQQ FIXME */
__raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port));
__raw_writeq(M_DUART_IMR_BRK, IOADDR(A_DUART_IMRREG(kgdb_port)));
__raw_writeq(IMR_IP6_VAL,
IO_SPACE_BASE + A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) +
(kgdb_irq<<3));
IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) +
(kgdb_irq << 3)));
bcm1480_unmask_irq(0, kgdb_irq);
#ifdef CONFIG_GDB_CONSOLE
@ -412,18 +412,6 @@ static void bcm1480_kgdb_interrupt(void)
extern void bcm1480_mailbox_interrupt(void);
static inline void dispatch_ip4(void)
{
int cpu = smp_processor_id();
int irq = K_BCM1480_INT_TIMER_0 + cpu;
/* Reset the timer */
__raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
do_IRQ(irq);
}
static inline void dispatch_ip2(void)
{
unsigned long long mask_h, mask_l;
@ -451,6 +439,7 @@ static inline void dispatch_ip2(void)
asmlinkage void plat_irq_dispatch(void)
{
unsigned int cpu = smp_processor_id();
unsigned int pending;
#ifdef CONFIG_SIBYTE_BCM1480_PROF
@ -467,7 +456,7 @@ asmlinkage void plat_irq_dispatch(void)
#endif
if (pending & CAUSEF_IP4)
dispatch_ip4();
do_IRQ(K_BCM1480_INT_TIMER_0 + cpu);
#ifdef CONFIG_SMP
else if (pending & CAUSEF_IP3)
bcm1480_mailbox_interrupt();

View File

@ -244,7 +244,7 @@ static void pcimt_hwint1(void)
if (pend & IT_EISA) {
int irq;
/*
* Note: ASIC PCI's builtin interrupt achknowledge feature is
* Note: ASIC PCI's builtin interrupt acknowledge feature is
* broken. Using it may result in loss of some or all i8259
* interrupts, so don't use PCIMT_INT_ACKNOWLEDGE ...
*/

View File

@ -525,6 +525,7 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
intassign1 |= (uint16_t)assign << 9;
break;
default:
spin_unlock_irq(&desc->lock);
return -EINVAL;
}
@ -592,6 +593,7 @@ static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
intassign3 |= (uint16_t)assign << 12;
break;
default:
spin_unlock_irq(&desc->lock);
return -EINVAL;
}

View File

@ -168,7 +168,7 @@ ifneq ($(KBUILD_SRC),)
$(Q)mkdir -p $(objtree)/include/asm-um
$(Q)ln -fsn $(srctree)/include/asm-$(HEADER_ARCH) include/asm-um/arch
else
$(Q)cd $(TOPDIR)/include/asm-um && ln -sf ../asm-$(HEADER_ARCH) arch
$(Q)cd $(TOPDIR)/include/asm-um && ln -fsn ../asm-$(SUBARCH) arch
endif
$(objtree)/$(ARCH_DIR)/include:
@ -180,7 +180,7 @@ $(ARCH_DIR)/include/sysdep: $(objtree)/$(ARCH_DIR)/include
ifneq ($(KBUILD_SRC),)
$(Q)ln -fsn $(srctree)/$(ARCH_DIR)/include/sysdep-$(SUBARCH) $(ARCH_DIR)/include/sysdep
else
$(Q)cd $(ARCH_DIR)/include && ln -sf sysdep-$(SUBARCH) sysdep
$(Q)cd $(ARCH_DIR)/include && ln -fsn sysdep-$(SUBARCH) sysdep
endif
$(ARCH_DIR)/os:
@ -188,7 +188,7 @@ $(ARCH_DIR)/os:
ifneq ($(KBUILD_SRC),)
$(Q)ln -fsn $(srctree)/$(ARCH_DIR)/os-$(OS) $(ARCH_DIR)/os
else
$(Q)cd $(ARCH_DIR) && ln -sf os-$(OS) os
$(Q)cd $(ARCH_DIR) && ln -fsn os-$(OS) os
endif
# Generated files

View File

@ -753,6 +753,7 @@ static struct mc_device net_mc = {
.remove = net_remove,
};
#ifdef CONFIG_INET
static int uml_inetaddr_event(struct notifier_block *this, unsigned long event,
void *ptr)
{
@ -789,14 +790,13 @@ struct notifier_block uml_inetaddr_notifier = {
.notifier_call = uml_inetaddr_event,
};
static int uml_net_init(void)
static void inet_register(void)
{
struct list_head *ele;
struct uml_net_private *lp;
struct in_device *ip;
struct in_ifaddr *in;
mconsole_register_dev(&net_mc);
register_inetaddr_notifier(&uml_inetaddr_notifier);
/* Devices may have been opened already, so the uml_inetaddr_notifier
@ -816,7 +816,17 @@ static int uml_net_init(void)
}
}
spin_unlock(&opened_lock);
}
#else
static inline void inet_register(void)
{
}
#endif
static int uml_net_init(void)
{
mconsole_register_dev(&net_mc);
inet_register();
return 0;
}

View File

@ -1,11 +1,13 @@
/*
* Copyright (C) 2000 Jeff Dike (jdike@karaya.com)
* Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
* Licensed under the GPL
*/
#ifndef __USER_H__
#define __USER_H__
#include "uml-config.h"
/*
* The usual definition - copied here because the kernel provides its own,
* fancier, type-safe, definition. Using that one would require
@ -23,8 +25,17 @@
extern void panic(const char *fmt, ...)
__attribute__ ((format (printf, 1, 2)));
#ifdef UML_CONFIG_PRINTK
extern int printk(const char *fmt, ...)
__attribute__ ((format (printf, 1, 2)));
#else
static inline int printk(const char *fmt, ...)
{
return 0;
}
#endif
extern void schedule(void);
extern int in_aton(char *str);
extern int open_gdb_chan(void);

View File

@ -347,14 +347,15 @@ int um_request_irq(unsigned int irq, int fd, int type,
{
int err;
err = request_irq(irq, handler, irqflags, devname, dev_id);
if (err)
return err;
if (fd != -1)
if (fd != -1) {
err = activate_fd(irq, fd, type, dev_id);
return err;
if (err)
return err;
}
return request_irq(irq, handler, irqflags, devname, dev_id);
}
EXPORT_SYMBOL(um_request_irq);
EXPORT_SYMBOL(reactivate_fd);

View File

@ -3,7 +3,6 @@
#include <sys/mman.h>
#include <sys/time.h>
#include <asm/unistd.h>
#include <asm/page.h>
#include "as-layout.h"
#include "ptrace_user.h"
#include "skas.h"

View File

@ -496,8 +496,7 @@ int os_rcv_fd(int fd, int *helper_pid_out)
n = recvmsg(fd, &msg, 0);
if(n < 0)
return -errno;
else if(n != sizeof(iov.iov_len))
else if(n != iov.iov_len)
*helper_pid_out = -1;
cmsg = CMSG_FIRSTHDR(&msg);

View File

@ -1,18 +1,24 @@
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
# x86 configuration
mainmenu "Linux Kernel Configuration for x86"
mainmenu "Linux Kernel Configuration"
# Select 32 or 64 bit
config 64BIT
bool "64-bit kernel" if ARCH = "x86"
default ARCH = "x86_64"
help
Say yes to build a 64-bit kernel - formerly known as x86_64
Say no to build a 32-bit kernel - formerly known as i386
config X86_32
def_bool !64BIT
config X86_64
def_bool 64BIT
### Arch settings
config X86
bool
default y
help
This is Linux's home port. Linux was originally native to the Intel
386, and runs on all the later x86 processors including the Intel
486, 586, Pentiums, and various instruction-set-compatible chips by
AMD, Cyrix, and others.
config GENERIC_TIME
bool
@ -33,7 +39,7 @@ config GENERIC_CLOCKEVENTS
config GENERIC_CLOCKEVENTS_BROADCAST
bool
default y
depends on X86_LOCAL_APIC
depends on X86_64 || (X86_32 && X86_LOCAL_APIC)
config LOCKDEP_SUPPORT
bool
@ -47,10 +53,6 @@ config SEMAPHORE_SLEEPERS
bool
default y
config X86
bool
default y
config MMU
bool
default y
@ -61,7 +63,7 @@ config ZONE_DMA
config QUICKLIST
bool
default y
default X86_32
config SBUS
bool
@ -91,6 +93,76 @@ config DMI
bool
default y
config RWSEM_GENERIC_SPINLOCK
def_bool !X86_XADD
config RWSEM_XCHGADD_ALGORITHM
def_bool X86_XADD
config ARCH_HAS_ILOG2_U32
def_bool n
config ARCH_HAS_ILOG2_U64
def_bool n
config GENERIC_CALIBRATE_DELAY
def_bool y
config GENERIC_TIME_VSYSCALL
bool
default X86_64
config ZONE_DMA32
bool
default X86_64
config ARCH_POPULATES_NODE_MAP
def_bool y
config AUDIT_ARCH
bool
default X86_64
# Use the generic interrupt handling code in kernel/irq/:
config GENERIC_HARDIRQS
bool
default y
config GENERIC_IRQ_PROBE
bool
default y
config GENERIC_PENDING_IRQ
bool
depends on GENERIC_HARDIRQS && SMP
default y
config X86_SMP
bool
depends on X86_32 && SMP && !X86_VOYAGER
default y
config X86_HT
bool
depends on SMP && !(X86_VISWS || X86_VOYAGER || MK8)
default y
config X86_BIOS_REBOOT
bool
depends on X86_32 && !(X86_VISWS || X86_VOYAGER)
default y
config X86_TRAMPOLINE
bool
depends on X86_SMP || (X86_VOYAGER && SMP)
default y
config KTIME_SCALAR
def_bool X86_32
source "init/Kconfig"
menu "Processor type and features"
@ -137,6 +209,7 @@ config X86_PC
config X86_ELAN
bool "AMD Elan"
depends on X86_32
help
Select this for an AMD Elan processor.
@ -146,6 +219,7 @@ config X86_ELAN
config X86_VOYAGER
bool "Voyager (NCR)"
depends on X86_32
select SMP if !BROKEN
help
Voyager is an MCA-based 32-way capable SMP architecture proprietary
@ -160,6 +234,7 @@ config X86_NUMAQ
bool "NUMAQ (IBM/Sequent)"
select SMP
select NUMA
depends on X86_32
help
This option is used for getting Linux to run on a (IBM/Sequent) NUMA
multiquad box. This changes the way that processors are bootstrapped,
@ -169,7 +244,7 @@ config X86_NUMAQ
config X86_SUMMIT
bool "Summit/EXA (IBM x440)"
depends on SMP
depends on X86_32 && SMP
help
This option is needed for IBM systems that use the Summit/EXA chipset.
In particular, it is needed for the x440.
@ -179,7 +254,7 @@ config X86_SUMMIT
config X86_BIGSMP
bool "Support for other sub-arch SMP systems with more than 8 CPUs"
depends on SMP
depends on X86_32 && SMP
help
This option is needed for the systems that have more than 8 CPUs
and if the system is not of any sub-arch type above.
@ -188,6 +263,7 @@ config X86_BIGSMP
config X86_VISWS
bool "SGI 320/540 (Visual Workstation)"
depends on X86_32
help
The SGI Visual Workstation series is an IA32-based workstation
based on SGI systems chips with some legacy PC hardware attached.
@ -199,6 +275,7 @@ config X86_VISWS
config X86_GENERICARCH
bool "Generic architecture (Summit, bigsmp, ES7000, default)"
depends on X86_32
help
This option compiles in the Summit, bigsmp, ES7000, default subarchitectures.
It is intended for a generic binary kernel.
@ -206,18 +283,27 @@ config X86_GENERICARCH
config X86_ES7000
bool "Support for Unisys ES7000 IA32 series"
depends on SMP
depends on X86_32 && SMP
help
Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
supposed to run on an IA32-based Unisys ES7000 system.
Only choose this option if you have such a system, otherwise you
should say N here.
config X86_VSMP
bool "Support for ScaleMP vSMP"
depends on X86_64 && PCI
help
Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
supposed to run on these EM64T-based machines. Only choose this option
if you have one of these machines.
endchoice
config SCHED_NO_NO_OMIT_FRAME_POINTER
bool "Single-depth WCHAN output"
default y
depends on X86_32
help
Calculate simpler /proc/<PID>/wchan values. If this option
is disabled then wchan values will recurse back to the
@ -228,7 +314,7 @@ config SCHED_NO_NO_OMIT_FRAME_POINTER
config PARAVIRT
bool
depends on !(X86_VISWS || X86_VOYAGER)
depends on X86_32 && !(X86_VISWS || X86_VOYAGER)
help
This changes the kernel so it can modify itself when it is run
under a hypervisor, potentially improving performance significantly
@ -237,6 +323,7 @@ config PARAVIRT
menuconfig PARAVIRT_GUEST
bool "Paravirtualized guest support"
depends on X86_32
help
Say Y here to get to see options related to running Linux under
various hypervisors. This option alone does not add any kernel code.
@ -264,7 +351,7 @@ endif
config ACPI_SRAT
bool
default y
depends on ACPI && NUMA && (X86_SUMMIT || X86_GENERICARCH)
depends on X86_32 && ACPI && NUMA && (X86_SUMMIT || X86_GENERICARCH)
select ACPI_NUMA
config HAVE_ARCH_PARSE_SRAT
@ -275,12 +362,12 @@ config HAVE_ARCH_PARSE_SRAT
config X86_SUMMIT_NUMA
bool
default y
depends on NUMA && (X86_SUMMIT || X86_GENERICARCH)
depends on X86_32 && NUMA && (X86_SUMMIT || X86_GENERICARCH)
config X86_CYCLONE_TIMER
bool
default y
depends on X86_SUMMIT || X86_GENERICARCH
depends on X86_32 && X86_SUMMIT || X86_GENERICARCH
config ES7000_CLUSTERED_APIC
bool
@ -290,21 +377,89 @@ config ES7000_CLUSTERED_APIC
source "arch/x86/Kconfig.cpu"
config HPET_TIMER
bool "HPET Timer Support"
bool
prompt "HPET Timer Support" if X86_32
default X86_64
help
This enables the use of the HPET for the kernel's internal timer.
HPET is the next generation timer replacing legacy 8254s.
You can safely choose Y here. However, HPET will only be
activated if the platform and the BIOS support this feature.
Otherwise the 8254 will be used for timing services.
Use the IA-PC HPET (High Precision Event Timer) to manage
time in preference to the PIT and RTC, if a HPET is
present.
HPET is the next generation timer replacing legacy 8254s.
The HPET provides a stable time base on SMP
systems, unlike the TSC, but it is more expensive to access,
as it is off-chip. You can find the HPET spec at
<http://www.intel.com/hardwaredesign/hpetspec.htm>.
Choose N to continue using the legacy 8254 timer.
You can safely choose Y here. However, HPET will only be
activated if the platform and the BIOS support this feature.
Otherwise the 8254 will be used for timing services.
Choose N to continue using the legacy 8254 timer.
config HPET_EMULATE_RTC
bool
depends on HPET_TIMER && RTC=y
default y
# Mark as embedded because too many people got it wrong.
# The code disables itself when not needed.
config GART_IOMMU
bool "GART IOMMU support" if EMBEDDED
default y
select SWIOTLB
select AGP
depends on X86_64 && PCI
help
Support for full DMA access of devices with 32bit memory access only
on systems with more than 3GB. This is usually needed for USB,
sound, many IDE/SATA chipsets and some other devices.
Provides a driver for the AMD Athlon64/Opteron/Turion/Sempron GART
based hardware IOMMU and a software bounce buffer based IOMMU used
on Intel systems and as fallback.
The code is only active when needed (enough memory and limited
device) unless CONFIG_IOMMU_DEBUG or iommu=force is specified
too.
config CALGARY_IOMMU
bool "IBM Calgary IOMMU support"
select SWIOTLB
depends on X86_64 && PCI && EXPERIMENTAL
help
Support for hardware IOMMUs in IBM's xSeries x366 and x460
systems. Needed to run systems with more than 3GB of memory
properly with 32-bit PCI devices that do not support DAC
(Double Address Cycle). Calgary also supports bus level
isolation, where all DMAs pass through the IOMMU. This
prevents them from going anywhere except their intended
destination. This catches hard-to-find kernel bugs and
mis-behaving drivers and devices that do not use the DMA-API
properly to set up their DMA buffers. The IOMMU can be
turned off at boot time with the iommu=off parameter.
Normally the kernel will make the right choice by itself.
If unsure, say Y.
config CALGARY_IOMMU_ENABLED_BY_DEFAULT
bool "Should Calgary be enabled by default?"
default y
depends on CALGARY_IOMMU
help
Should Calgary be enabled by default? if you choose 'y', Calgary
will be used (if it exists). If you choose 'n', Calgary will not be
used even if it exists. If you choose 'n' and would like to use
Calgary anyway, pass 'iommu=calgary' on the kernel command line.
If unsure, say Y.
# need this always selected by IOMMU for the VIA workaround
config SWIOTLB
bool
help
Support for software bounce buffers used on x86-64 systems
which don't have a hardware IOMMU (e.g. the current generation
of Intel's x86-64 CPUs). Using this PCI devices which can only
access 32-bits of memory can be used on systems with more than
3 GB of memory. If unsure, say Y.
config NR_CPUS
int "Maximum number of CPUs (2-255)"
range 2 255
@ -321,7 +476,7 @@ config NR_CPUS
config SCHED_SMT
bool "SMT (Hyperthreading) scheduler support"
depends on X86_HT
depends on (X86_64 && SMP) || (X86_32 && X86_HT)
help
SMT scheduler support improves the CPU scheduler's decision making
when dealing with Intel Pentium 4 chips with HyperThreading at a
@ -330,7 +485,7 @@ config SCHED_SMT
config SCHED_MC
bool "Multi-core scheduler support"
depends on X86_HT
depends on (X86_64 && SMP) || (X86_32 && X86_HT)
default y
help
Multi-core scheduler support improves the CPU scheduler's decision
@ -341,7 +496,7 @@ source "kernel/Kconfig.preempt"
config X86_UP_APIC
bool "Local APIC support on uniprocessors"
depends on !SMP && !(X86_VISWS || X86_VOYAGER || X86_GENERICARCH)
depends on X86_32 && !SMP && !(X86_VISWS || X86_VOYAGER || X86_GENERICARCH)
help
A local APIC (Advanced Programmable Interrupt Controller) is an
integrated interrupt controller in the CPU. If you have a single-CPU
@ -366,17 +521,17 @@ config X86_UP_IOAPIC
config X86_LOCAL_APIC
bool
depends on X86_UP_APIC || ((X86_VISWS || SMP) && !X86_VOYAGER) || X86_GENERICARCH
depends on X86_64 || (X86_32 && (X86_UP_APIC || ((X86_VISWS || SMP) && !X86_VOYAGER) || X86_GENERICARCH))
default y
config X86_IO_APIC
bool
depends on X86_UP_IOAPIC || (SMP && !(X86_VISWS || X86_VOYAGER)) || X86_GENERICARCH
depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !(X86_VISWS || X86_VOYAGER)) || X86_GENERICARCH))
default y
config X86_VISWS_APIC
bool
depends on X86_VISWS
depends on X86_32 && X86_VISWS
default y
config X86_MCE
@ -396,9 +551,25 @@ config X86_MCE
to disable it. MCE support simply ignores non-MCE processors like
the 386 and 486, so nearly everyone can say Y here.
config X86_MCE_INTEL
bool "Intel MCE features"
depends on X86_64 && X86_MCE && X86_LOCAL_APIC
default y
help
Additional support for intel specific MCE features such as
the thermal monitor.
config X86_MCE_AMD
bool "AMD MCE features"
depends on X86_64 && X86_MCE && X86_LOCAL_APIC
default y
help
Additional support for AMD specific MCE features such as
the DRAM Error Threshold.
config X86_MCE_NONFATAL
tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
depends on X86_MCE
depends on X86_32 && X86_MCE
help
Enabling this feature starts a timer that triggers every 5 seconds which
will look at the machine check registers to see if anything happened.
@ -411,14 +582,15 @@ config X86_MCE_NONFATAL
config X86_MCE_P4THERMAL
bool "check for P4 thermal throttling interrupt."
depends on X86_MCE && (X86_UP_APIC || SMP) && !X86_VISWS
depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) && !X86_VISWS
help
Enabling this feature will cause a message to be printed when the P4
enters thermal throttling.
config VM86
default y
bool "Enable VM86 support" if EMBEDDED
default y
depends on X86_32
help
This option is required by programs like DOSEMU to run 16-bit legacy
code on X86 processors. It also may be needed by software like
@ -427,6 +599,7 @@ config VM86
config TOSHIBA
tristate "Toshiba Laptop support"
depends on X86_32
---help---
This adds a driver to safely access the System Management Mode of
the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
@ -442,6 +615,7 @@ config TOSHIBA
config I8K
tristate "Dell laptop support"
depends on X86_32
---help---
This adds a driver to safely access the System Management Mode
of the CPU on the Dell Inspiron 8000. The System Management Mode
@ -462,7 +636,7 @@ config I8K
config X86_REBOOTFIXUPS
bool "Enable X86 board specific fixups for reboot"
depends on X86
depends on X86_32 && X86
default n
---help---
This enables chipset and/or board specific fixups to be done
@ -517,12 +691,11 @@ config X86_CPUID
with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
/dev/cpu/31/cpuid.
source "drivers/firmware/Kconfig"
choice
prompt "High Memory Support"
default HIGHMEM4G if !X86_NUMAQ
default HIGHMEM64G if X86_NUMAQ
depends on X86_32
config NOHIGHMEM
bool "off"
@ -582,6 +755,7 @@ choice
depends on EXPERIMENTAL
prompt "Memory split" if EMBEDDED
default VMSPLIT_3G
depends on X86_32
help
Select the desired split between kernel and user memory.
@ -619,16 +793,17 @@ config PAGE_OFFSET
default 0x78000000 if VMSPLIT_2G_OPT
default 0x40000000 if VMSPLIT_1G
default 0xC0000000
depends on X86_32
config HIGHMEM
bool
depends on HIGHMEM64G || HIGHMEM4G
depends on X86_32 && (HIGHMEM64G || HIGHMEM4G)
default y
config X86_PAE
bool "PAE (Physical Address Extension) Support"
default n
depends on !HIGHMEM4G
depends on X86_32 && !HIGHMEM4G
select RESOURCES_64BIT
help
PAE is required for NX support, and furthermore enables
@ -639,46 +814,82 @@ config X86_PAE
# Common NUMA Features
config NUMA
bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)"
depends on SMP && HIGHMEM64G && (X86_NUMAQ || (X86_SUMMIT || X86_GENERICARCH) && ACPI) && EXPERIMENTAL
depends on SMP
depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || (X86_SUMMIT || X86_GENERICARCH) && ACPI) && EXPERIMENTAL)
default n if X86_PC
default y if (X86_NUMAQ || X86_SUMMIT)
help
NUMA support for i386. This is currently highly experimental
and should be only used for kernel development. It might also
cause boot failures.
Enable NUMA (Non Uniform Memory Access) support.
The kernel will try to allocate memory used by a CPU on the
local memory controller of the CPU and add some more
NUMA awareness to the kernel.
For i386 this is currently highly experimental and should be only
used for kernel development. It might also cause boot failures.
For x86_64 this is recommended on all multiprocessor Opteron systems.
If the system is EM64T, you should say N unless your system is
EM64T NUMA.
comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
depends on X86_SUMMIT && (!HIGHMEM64G || !ACPI)
depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
config K8_NUMA
bool "Old style AMD Opteron NUMA detection"
depends on X86_64 && NUMA && PCI
default y
help
Enable K8 NUMA node topology detection. You should say Y here if
you have a multi processor AMD K8 system. This uses an old
method to read the NUMA configuration directly from the builtin
Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
instead, which also takes priority if both are compiled in.
config X86_64_ACPI_NUMA
bool "ACPI NUMA detection"
depends on X86_64 && NUMA && ACPI && PCI
select ACPI_NUMA
default y
help
Enable ACPI SRAT based node topology detection.
config NUMA_EMU
bool "NUMA emulation"
depends on X86_64 && NUMA
help
Enable NUMA emulation. A flat machine will be split
into virtual nodes when booted with "numa=fake=N", where N is the
number of nodes. This is only useful for debugging.
config NODES_SHIFT
int
default "6" if X86_64
default "4" if X86_NUMAQ
default "3"
depends on NEED_MULTIPLE_NODES
config HAVE_ARCH_BOOTMEM_NODE
bool
depends on NUMA
depends on X86_32 && NUMA
default y
config ARCH_HAVE_MEMORY_PRESENT
bool
depends on DISCONTIGMEM
depends on X86_32 && DISCONTIGMEM
default y
config NEED_NODE_MEMMAP_SIZE
bool
depends on DISCONTIGMEM || SPARSEMEM
depends on X86_32 && (DISCONTIGMEM || SPARSEMEM)
default y
config HAVE_ARCH_ALLOC_REMAP
bool
depends on NUMA
depends on X86_32 && NUMA
default y
config ARCH_FLATMEM_ENABLE
def_bool y
depends on (ARCH_SELECT_MEMORY_MODEL && X86_PC)
depends on (X86_32 && ARCH_SELECT_MEMORY_MODEL && X86_PC) || (X86_64 && !NUMA)
config ARCH_DISCONTIGMEM_ENABLE
def_bool y
@ -690,21 +901,23 @@ config ARCH_DISCONTIGMEM_DEFAULT
config ARCH_SPARSEMEM_ENABLE
def_bool y
depends on (NUMA || (X86_PC && EXPERIMENTAL))
select SPARSEMEM_STATIC
depends on NUMA || (EXPERIMENTAL && (X86_PC || X86_64))
select SPARSEMEM_STATIC if X86_32
select SPARSEMEM_VMEMMAP_ENABLE if X86_64
config ARCH_SELECT_MEMORY_MODEL
def_bool y
depends on ARCH_SPARSEMEM_ENABLE
depends on X86_32 && ARCH_SPARSEMEM_ENABLE
config ARCH_POPULATES_NODE_MAP
def_bool y
config ARCH_MEMORY_PROBE
def_bool X86_64
depends on MEMORY_HOTPLUG
source "mm/Kconfig"
config HIGHPTE
bool "Allocate 3rd-level pagetables from highmem"
depends on HIGHMEM4G || HIGHMEM64G
depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)
help
The VM uses one page table entry for each page of physical memory.
For systems with a lot of RAM, this can be wasteful of precious
@ -712,7 +925,8 @@ config HIGHPTE
entries in high memory.
config MATH_EMULATION
bool "Math emulation"
bool
prompt "Math emulation" if X86_32
---help---
Linux can emulate a math coprocessor (used for floating point
operations) if you don't have one. 486DX and Pentium processors have
@ -772,7 +986,7 @@ config MTRR
config EFI
bool "Boot from EFI support"
depends on ACPI
depends on X86_32 && ACPI
default n
---help---
This enables the kernel to boot on EFI platforms using
@ -789,18 +1003,18 @@ config EFI
kernel should continue to boot on existing non-EFI platforms.
config IRQBALANCE
bool "Enable kernel irq balancing"
depends on SMP && X86_IO_APIC
bool "Enable kernel irq balancing"
depends on X86_32 && SMP && X86_IO_APIC
default y
help
The default yes will allow the kernel to do irq load balancing.
The default yes will allow the kernel to do irq load balancing.
Saying no will keep the kernel from doing irq load balancing.
# turning this on wastes a bunch of space.
# Summit needs it only when NUMA is on
config BOOT_IOREMAP
bool
depends on (((X86_SUMMIT || X86_GENERICARCH) && NUMA) || (X86 && EFI))
depends on X86_32 && (((X86_SUMMIT || X86_GENERICARCH) && NUMA) || (X86 && EFI))
default y
config SECCOMP
@ -820,6 +1034,30 @@ config SECCOMP
If unsure, say Y. Only embedded should say N here.
config CC_STACKPROTECTOR
bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
depends on X86_64 && EXPERIMENTAL
help
This option turns on the -fstack-protector GCC feature. This
feature puts, at the beginning of critical functions, a canary
value on the stack just before the return address, and validates
the value just before actually returning. Stack based buffer
overflows (that need to overwrite this return address) now also
overwrite the canary, which gets detected and the attack is then
neutralized via a kernel panic.
This feature requires gcc version 4.2 or above, or a distribution
gcc with the feature backported. Older versions are automatically
detected and for those versions, this configuration option is ignored.
config CC_STACKPROTECTOR_ALL
bool "Use stack-protector for all functions"
depends on CC_STACKPROTECTOR
help
Normally, GCC only inserts the canary value protection for
functions that use large-ish on-stack buffers. By enabling
this option, GCC will be asked to do this for ALL functions.
source kernel/Kconfig.hz
config KEXEC
@ -841,7 +1079,7 @@ config KEXEC
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
depends on EXPERIMENTAL
depends on HIGHMEM
depends on X86_64 || (X86_32 && HIGHMEM)
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
@ -856,6 +1094,7 @@ config CRASH_DUMP
config PHYSICAL_START
hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP)
default "0x1000000" if X86_NUMAQ
default "0x200000" if X86_64
default "0x100000"
help
This gives the physical address where the kernel is loaded.
@ -908,25 +1147,31 @@ config RELOCATABLE
must live at a different physical address than the primary
kernel.
Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
it has been loaded at and the compile time physical address
(CONFIG_PHYSICAL_START) is ignored.
config PHYSICAL_ALIGN
hex "Alignment value to which kernel should be aligned"
default "0x100000"
hex
prompt "Alignment value to which kernel should be aligned" if X86_32
default "0x100000" if X86_32
default "0x200000" if X86_64
range 0x2000 0x400000
help
This value puts the alignment restrictions on physical address
where kernel is loaded and run from. Kernel is compiled for an
address which meets above alignment restriction.
where kernel is loaded and run from. Kernel is compiled for an
address which meets above alignment restriction.
If bootloader loads the kernel at a non-aligned address and
CONFIG_RELOCATABLE is set, kernel will move itself to nearest
address aligned to above value and run from there.
If bootloader loads the kernel at a non-aligned address and
CONFIG_RELOCATABLE is set, kernel will move itself to nearest
address aligned to above value and run from there.
If bootloader loads the kernel at a non-aligned address and
CONFIG_RELOCATABLE is not set, kernel will ignore the run time
load address and decompress itself to the address it has been
compiled for and run from there. The address for which kernel is
compiled already meets above alignment restrictions. Hence the
end result is that kernel runs from a physical address meeting
If bootloader loads the kernel at a non-aligned address and
CONFIG_RELOCATABLE is not set, kernel will ignore the run time
load address and decompress itself to the address it has been
compiled for and run from there. The address for which kernel is
compiled already meets above alignment restrictions. Hence the
end result is that kernel runs from a physical address meeting
above alignment restrictions.
Don't change this unless you know what you are doing.
@ -938,10 +1183,13 @@ config HOTPLUG_CPU
Say Y here to experiment with turning CPUs off and on, and to
enable suspend on SMP systems. CPUs can be controlled through
/sys/devices/system/cpu.
Say N if you want to disable CPU hotplug and don't need to
suspend.
config COMPAT_VDSO
bool "Compat VDSO support"
default y
depends on X86_32
help
Map the VDSO to the predictable old-style address too.
---help---
@ -955,18 +1203,35 @@ endmenu
config ARCH_ENABLE_MEMORY_HOTPLUG
def_bool y
depends on HIGHMEM
depends on X86_64 || (X86_32 && HIGHMEM)
menu "Power management options (ACPI, APM)"
config MEMORY_HOTPLUG_RESERVE
def_bool X86_64
depends on (MEMORY_HOTPLUG && DISCONTIGMEM)
config HAVE_ARCH_EARLY_PFN_TO_NID
def_bool X86_64
depends on NUMA
config OUT_OF_LINE_PFN_TO_PAGE
def_bool X86_64
depends on DISCONTIGMEM
menu "Power management options"
depends on !X86_VOYAGER
source kernel/power/Kconfig
config ARCH_HIBERNATION_HEADER
bool
depends on X86_64 && HIBERNATION
default y
source "kernel/power/Kconfig"
source "drivers/acpi/Kconfig"
menuconfig APM
tristate "APM (Advanced Power Management) BIOS support"
depends on PM_SLEEP && !X86_VISWS
depends on X86_32 && PM_SLEEP && !X86_VISWS
---help---
APM is a BIOS specification for saving power using several different
techniques. This is mostly useful for battery powered laptops with
@ -1092,13 +1357,14 @@ config APM_REAL_MODE_POWER_OFF
endif # APM
source "arch/x86/kernel/cpu/cpufreq/Kconfig_32"
source "arch/x86/kernel/cpu/cpufreq/Kconfig"
source "drivers/cpuidle/Kconfig"
endmenu
menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
menu "Bus options (PCI etc.)"
config PCI
bool "PCI support" if !X86_VISWS
@ -1118,7 +1384,7 @@ config PCI
choice
prompt "PCI access mode"
depends on PCI && !X86_VISWS
depends on X86_32 && PCI && !X86_VISWS
default PCI_GOANY
---help---
On PCI systems, the BIOS can be used to detect the PCI devices and
@ -1151,17 +1417,18 @@ endchoice
config PCI_BIOS
bool
depends on !X86_VISWS && PCI && (PCI_GOBIOS || PCI_GOANY)
depends on X86_32 && !X86_VISWS && PCI && (PCI_GOBIOS || PCI_GOANY)
default y
# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
config PCI_DIRECT
bool
depends on PCI && ((PCI_GODIRECT || PCI_GOANY) || X86_VISWS)
depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY) || X86_VISWS)
default y
config PCI_MMCONFIG
bool
depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
depends on X86_32 && PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
default y
config PCI_DOMAINS
@ -1169,14 +1436,52 @@ config PCI_DOMAINS
depends on PCI
default y
config PCI_MMCONFIG
bool "Support mmconfig PCI config space access"
depends on X86_64 && PCI && ACPI
config DMAR
bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
help
DMA remapping (DMAR) devices support enables independent address
translations for Direct Memory Access (DMA) from devices.
These DMA remapping devices are reported via ACPI tables
and include PCI device scope covered by these DMA
remapping devices.
config DMAR_GFX_WA
bool "Support for Graphics workaround"
depends on DMAR
default y
help
Current Graphics drivers tend to use physical address
for DMA and avoid using DMA APIs. Setting this config
option permits the IOMMU driver to set a unity map for
all the OS-visible memory. Hence the driver can continue
to use physical addresses for DMA.
config DMAR_FLOPPY_WA
bool
depends on DMAR
default y
help
Floppy disk drivers are know to bypass DMA API calls
thereby failing to work when IOMMU is enabled. This
workaround will setup a 1:1 mapping for the first
16M to make floppy (an ISA device) work.
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
# x86_64 have no ISA slots, but do have ISA-style DMA.
config ISA_DMA_API
bool
default y
if X86_32
config ISA
bool "ISA support"
depends on !(X86_VOYAGER || X86_VISWS)
@ -1248,9 +1553,11 @@ config GEODE_MFGPT_TIMER
MFGPTs have a better resolution and max interval than the
generic PIT, and are suitable for use as high-res timers.
endif # X86_32
config K8_NB
def_bool y
depends on AGP_AMD64
depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA)))
source "drivers/pcmcia/Kconfig"
@ -1258,16 +1565,48 @@ source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"
menu "Executable file formats / Emulations"
source "fs/Kconfig.binfmt"
config IA32_EMULATION
bool "IA32 Emulation"
depends on X86_64
help
Include code to run 32-bit programs under a 64-bit kernel. You should
likely turn this on, unless you're 100% sure that you don't have any
32-bit programs left.
config IA32_AOUT
tristate "IA32 a.out support"
depends on IA32_EMULATION
help
Support old a.out binaries in the 32bit emulation.
config COMPAT
bool
depends on IA32_EMULATION
default y
config COMPAT_FOR_U64_ALIGNMENT
def_bool COMPAT
depends on X86_64
config SYSVIPC_COMPAT
bool
depends on X86_64 && COMPAT && SYSVIPC
default y
endmenu
source "net/Kconfig"
source "drivers/Kconfig"
source "drivers/firmware/Kconfig"
source "fs/Kconfig"
source "kernel/Kconfig.instrumentation"
@ -1279,43 +1618,3 @@ source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"
#
# Use the generic interrupt handling code in kernel/irq/:
#
config GENERIC_HARDIRQS
bool
default y
config GENERIC_IRQ_PROBE
bool
default y
config GENERIC_PENDING_IRQ
bool
depends on GENERIC_HARDIRQS && SMP
default y
config X86_SMP
bool
depends on SMP && !X86_VOYAGER
default y
config X86_HT
bool
depends on SMP && !(X86_VISWS || X86_VOYAGER)
default y
config X86_BIOS_REBOOT
bool
depends on !(X86_VISWS || X86_VOYAGER)
default y
config X86_TRAMPOLINE
bool
depends on X86_SMP || (X86_VOYAGER && SMP)
default y
config KTIME_SCALAR
bool
default y

View File

@ -3,11 +3,12 @@ if !X86_ELAN
choice
prompt "Processor family"
default M686
default M686 if X86_32
default GENERIC_CPU if X86_64
config M386
bool "386"
depends on !UML
depends on X86_32 && !UML
---help---
This is the processor type of your CPU. This information is used for
optimizing purposes. In order to compile a kernel that can run on
@ -49,6 +50,7 @@ config M386
config M486
bool "486"
depends on X86_32
help
Select this for a 486 series processor, either Intel or one of the
compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
@ -57,6 +59,7 @@ config M486
config M586
bool "586/K5/5x86/6x86/6x86MX"
depends on X86_32
help
Select this for an 586 or 686 series processor such as the AMD K5,
the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
@ -64,18 +67,21 @@ config M586
config M586TSC
bool "Pentium-Classic"
depends on X86_32
help
Select this for a Pentium Classic processor with the RDTSC (Read
Time Stamp Counter) instruction for benchmarking.
config M586MMX
bool "Pentium-MMX"
depends on X86_32
help
Select this for a Pentium with the MMX graphics/multimedia
extended instructions.
config M686
bool "Pentium-Pro"
depends on X86_32
help
Select this for Intel Pentium Pro chips. This enables the use of
Pentium Pro extended instructions, and disables the init-time guard
@ -83,6 +89,7 @@ config M686
config MPENTIUMII
bool "Pentium-II/Celeron(pre-Coppermine)"
depends on X86_32
help
Select this for Intel chips based on the Pentium-II and
pre-Coppermine Celeron core. This option enables an unaligned
@ -92,6 +99,7 @@ config MPENTIUMII
config MPENTIUMIII
bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
depends on X86_32
help
Select this for Intel chips based on the Pentium-III and
Celeron-Coppermine core. This option enables use of some
@ -100,19 +108,14 @@ config MPENTIUMIII
config MPENTIUMM
bool "Pentium M"
depends on X86_32
help
Select this for Intel Pentium M (not Pentium-4 M)
notebook chips.
config MCORE2
bool "Core 2/newer Xeon"
help
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
CPUs. You can distinguish newer from older Xeons by the CPU family
in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
config MPENTIUM4
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
depends on X86_32
help
Select this for Intel Pentium 4 chips. This includes the
Pentium 4, Pentium D, P4-based Celeron and Xeon, and
@ -148,6 +151,7 @@ config MPENTIUM4
config MK6
bool "K6/K6-II/K6-III"
depends on X86_32
help
Select this for an AMD K6-family processor. Enables use of
some extended instructions, and passes appropriate optimization
@ -155,6 +159,7 @@ config MK6
config MK7
bool "Athlon/Duron/K7"
depends on X86_32
help
Select this for an AMD Athlon K7-family processor. Enables use of
some extended instructions, and passes appropriate optimization
@ -169,6 +174,7 @@ config MK8
config MCRUSOE
bool "Crusoe"
depends on X86_32
help
Select this for a Transmeta Crusoe processor. Treats the processor
like a 586 with TSC, and sets some GCC optimization flags (like a
@ -176,11 +182,13 @@ config MCRUSOE
config MEFFICEON
bool "Efficeon"
depends on X86_32
help
Select this for a Transmeta Efficeon processor.
config MWINCHIPC6
bool "Winchip-C6"
depends on X86_32
help
Select this for an IDT Winchip C6 chip. Linux and GCC
treat this chip as a 586TSC with some extended instructions
@ -188,6 +196,7 @@ config MWINCHIPC6
config MWINCHIP2
bool "Winchip-2"
depends on X86_32
help
Select this for an IDT Winchip-2. Linux and GCC
treat this chip as a 586TSC with some extended instructions
@ -195,6 +204,7 @@ config MWINCHIP2
config MWINCHIP3D
bool "Winchip-2A/Winchip-3"
depends on X86_32
help
Select this for an IDT Winchip-2A or 3. Linux and GCC
treat this chip as a 586TSC with some extended instructions
@ -204,16 +214,19 @@ config MWINCHIP3D
config MGEODEGX1
bool "GeodeGX1"
depends on X86_32
help
Select this for a Geode GX1 (Cyrix MediaGX) chip.
config MGEODE_LX
bool "Geode GX/LX"
depends on X86_32
help
Select this for AMD Geode GX and LX processors.
config MCYRIXIII
bool "CyrixIII/VIA-C3"
depends on X86_32
help
Select this for a Cyrix III or C3 chip. Presently Linux and GCC
treat this chip as a generic 586. Whilst the CPU is 686 class,
@ -225,6 +238,7 @@ config MCYRIXIII
config MVIAC3_2
bool "VIA C3-2 (Nehemiah)"
depends on X86_32
help
Select this for a VIA C3 "Nehemiah". Selecting this enables usage
of SSE and tells gcc to treat the CPU as a 686.
@ -232,15 +246,42 @@ config MVIAC3_2
config MVIAC7
bool "VIA C7"
depends on X86_32
help
Select this for a VIA C7. Selecting this uses the correct cache
shift and tells gcc to treat the CPU as a 686.
config MPSC
bool "Intel P4 / older Netburst based Xeon"
depends on X86_64
help
Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
Xeon CPUs with Intel 64bit which is compatible with x86-64.
Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Netburst core and shouldn't use this option. You can distinguish them
using the cpu family field
in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
config MCORE2
bool "Core 2/newer Xeon"
help
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
CPUs. You can distinguish newer from older Xeons by the CPU family
in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
config GENERIC_CPU
bool "Generic-x86-64"
depends on X86_64
help
Generic x86-64 CPU.
Run equally well on all x86-64 CPUs.
endchoice
config X86_GENERIC
bool "Generic x86 support"
help
bool "Generic x86 support"
depends on X86_32
help
Instead of just including optimizations for the selected
x86 variant (e.g. PII, Crusoe or Athlon), include some more
generic optimizations as well. This will make the kernel
@ -253,44 +294,31 @@ endif
#
# Define implied options from the CPU selection here
#
config X86_L1_CACHE_BYTES
int
default "128" if GENERIC_CPU || MPSC
default "64" if MK8 || MCORE2
depends on X86_64
config X86_INTERNODE_CACHE_BYTES
int
default "4096" if X86_VSMP
default X86_L1_CACHE_BYTES if !X86_VSMP
depends on X86_64
config X86_CMPXCHG
bool
depends on !M386
default y
def_bool X86_64 || (X86_32 && !M386)
config X86_L1_CACHE_SHIFT
int
default "7" if MPENTIUM4 || X86_GENERIC
default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC
default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7
config X86_XADD
bool
depends on !M386
default y
config RWSEM_GENERIC_SPINLOCK
bool
depends on !X86_XADD
default y
config RWSEM_XCHGADD_ALGORITHM
bool
depends on X86_XADD
default y
config ARCH_HAS_ILOG2_U32
bool
default n
config ARCH_HAS_ILOG2_U64
bool
default n
config GENERIC_CALIBRATE_DELAY
bool
depends on X86_32 && !M386
default y
config X86_PPRO_FENCE
@ -305,22 +333,22 @@ config X86_F00F_BUG
config X86_WP_WORKS_OK
bool
depends on !M386
depends on X86_32 && !M386
default y
config X86_INVLPG
bool
depends on !M386
depends on X86_32 && !M386
default y
config X86_BSWAP
bool
depends on !M386
depends on X86_32 && !M386
default y
config X86_POPAD_OK
bool
depends on !M386
depends on X86_32 && !M386
default y
config X86_ALIGNMENT_16
@ -330,7 +358,7 @@ config X86_ALIGNMENT_16
config X86_GOOD_APIC
bool
depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7
depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7 || X86_64
default y
config X86_INTEL_USERCOPY
@ -355,7 +383,7 @@ config X86_OOSTORE
config X86_TSC
bool
depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64
default y
# this should be set for all -march=.. options where the compiler
@ -367,6 +395,7 @@ config X86_CMOV
config X86_MINIMUM_CPU_FAMILY
int
default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK
default "64" if X86_64
default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
default "3"

View File

@ -1,839 +0,0 @@
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
# Note: ISA is disabled and will hopefully never be enabled.
# If you managed to buy an ISA x86-64 box you'll have to fix all the
# ISA drivers you need yourself.
#
mainmenu "Linux Kernel Configuration"
config X86_64
bool
default y
help
Port to the x86-64 architecture. x86-64 is a 64-bit extension to the
classical 32-bit x86 architecture. For details see
<http://www.x86-64.org/>.
config 64BIT
def_bool y
config X86
bool
default y
config GENERIC_TIME
bool
default y
config GENERIC_TIME_VSYSCALL
bool
default y
config GENERIC_CMOS_UPDATE
bool
default y
config CLOCKSOURCE_WATCHDOG
bool
default y
config GENERIC_CLOCKEVENTS
bool
default y
config GENERIC_CLOCKEVENTS_BROADCAST
bool
default y
config ZONE_DMA32
bool
default y
config LOCKDEP_SUPPORT
bool
default y
config STACKTRACE_SUPPORT
bool
default y
config SEMAPHORE_SLEEPERS
bool
default y
config MMU
bool
default y
config ZONE_DMA
bool
default y
config ISA
bool
config SBUS
bool
config RWSEM_GENERIC_SPINLOCK
bool
default y
config RWSEM_XCHGADD_ALGORITHM
bool
config GENERIC_HWEIGHT
bool
default y
config GENERIC_CALIBRATE_DELAY
bool
default y
config X86_CMPXCHG
bool
default y
config GENERIC_ISA_DMA
bool
default y
config GENERIC_IOMAP
bool
default y
config ARCH_MAY_HAVE_PC_FDC
bool
default y
config ARCH_POPULATES_NODE_MAP
def_bool y
config DMI
bool
default y
config AUDIT_ARCH
bool
default y
config GENERIC_BUG
bool
default y
depends on BUG
config ARCH_HAS_ILOG2_U32
bool
default n
config ARCH_HAS_ILOG2_U64
bool
default n
source "init/Kconfig"
menu "Processor type and features"
source "kernel/time/Kconfig"
choice
prompt "Subarchitecture Type"
default X86_PC
config X86_PC
bool "PC-compatible"
help
Choose this option if your computer is a standard PC or compatible.
config X86_VSMP
bool "Support for ScaleMP vSMP"
depends on PCI
help
Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
supposed to run on these EM64T-based machines. Only choose this option
if you have one of these machines.
endchoice
choice
prompt "Processor family"
default GENERIC_CPU
config MK8
bool "AMD-Opteron/Athlon64"
help
Optimize for AMD Opteron/Athlon64/Hammer/K8 CPUs.
config MPSC
bool "Intel P4 / older Netburst based Xeon"
help
Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
Xeon CPUs with Intel 64bit which is compatible with x86-64.
Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Netburst core and shouldn't use this option. You can distinguish them
using the cpu family field
in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
config MCORE2
bool "Intel Core2 / newer Xeon"
help
Optimize for Intel Core2 and newer Xeons (51xx)
You can distinguish the newer Xeons from the older ones using
the cpu family field in /proc/cpuinfo. 15 is an older Xeon
(use CONFIG_MPSC then), 6 is a newer one.
config GENERIC_CPU
bool "Generic-x86-64"
help
Generic x86-64 CPU.
Run equally well on all x86-64 CPUs.
endchoice
#
# Define implied options from the CPU selection here
#
config X86_L1_CACHE_BYTES
int
default "128" if GENERIC_CPU || MPSC
default "64" if MK8 || MCORE2
config X86_L1_CACHE_SHIFT
int
default "7" if GENERIC_CPU || MPSC
default "6" if MK8 || MCORE2
config X86_INTERNODE_CACHE_BYTES
int
default "4096" if X86_VSMP
default X86_L1_CACHE_BYTES if !X86_VSMP
config X86_TSC
bool
default y
config X86_GOOD_APIC
bool
default y
config MICROCODE
tristate "/dev/cpu/microcode - Intel CPU microcode support"
select FW_LOADER
---help---
If you say Y here the 'File systems' section, you will be
able to update the microcode on Intel processors. You will
obviously need the actual microcode binary data itself which is
not shipped with the Linux kernel.
For latest news and information on obtaining all the required
ingredients for this driver, check:
<http://www.urbanmyth.org/microcode/>.
To compile this driver as a module, choose M here: the
module will be called microcode.
If you use modprobe or kmod you may also want to add the line
'alias char-major-10-184 microcode' to your /etc/modules.conf file.
config MICROCODE_OLD_INTERFACE
bool
depends on MICROCODE
default y
config X86_MSR
tristate "/dev/cpu/*/msr - Model-specific register support"
help
This device gives privileged processes access to the x86
Model-Specific Registers (MSRs). It is a character device with
major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
MSR accesses are directed to a specific CPU on multi-processor
systems.
config X86_CPUID
tristate "/dev/cpu/*/cpuid - CPU information support"
help
This device gives processes access to the x86 CPUID instruction to
be executed on a specific processor. It is a character device
with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
/dev/cpu/31/cpuid.
config X86_HT
bool
depends on SMP && !MK8
default y
config MATH_EMULATION
bool
config MCA
bool
config EISA
bool
config X86_IO_APIC
bool
default y
config X86_LOCAL_APIC
bool
default y
config MTRR
bool "MTRR (Memory Type Range Register) support"
---help---
On Intel P6 family processors (Pentium Pro, Pentium II and later)
the Memory Type Range Registers (MTRRs) may be used to control
processor access to memory ranges. This is most useful if you have
a video (VGA) card on a PCI or AGP bus. Enabling write-combining
allows bus write transfers to be combined into a larger transfer
before bursting over the PCI/AGP bus. This can increase performance
of image write operations 2.5 times or more. Saying Y here creates a
/proc/mtrr file which may be used to manipulate your processor's
MTRRs. Typically the X server should use this.
This code has a reasonably generic interface so that similar
control registers on other processors can be easily supported
as well.
Saying Y here also fixes a problem with buggy SMP BIOSes which only
set the MTRRs for the boot CPU and not for the secondary CPUs. This
can lead to all sorts of problems, so it's good to say Y here.
Just say Y here, all x86-64 machines support MTRRs.
See <file:Documentation/mtrr.txt> for more information.
config SMP
bool "Symmetric multi-processing support"
---help---
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
you have a system with more than one CPU, say Y.
If you say N here, the kernel will run on single and multiprocessor
machines, but will use only one CPU of a multiprocessor machine. If
you say Y here, the kernel will run on many, but not all,
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
If you don't know what to do here, say N.
config SCHED_SMT
bool "SMT (Hyperthreading) scheduler support"
depends on SMP
default n
help
SMT scheduler support improves the CPU scheduler's decision making
when dealing with Intel Pentium 4 chips with HyperThreading at a
cost of slightly increased overhead in some places. If unsure say
N here.
config SCHED_MC
bool "Multi-core scheduler support"
depends on SMP
default y
help
Multi-core scheduler support improves the CPU scheduler's decision
making when dealing with multi-core CPU chips at a cost of slightly
increased overhead in some places. If unsure say N here.
source "kernel/Kconfig.preempt"
config NUMA
bool "Non Uniform Memory Access (NUMA) Support"
depends on SMP
help
Enable NUMA (Non Uniform Memory Access) support. The kernel
will try to allocate memory used by a CPU on the local memory
controller of the CPU and add some more NUMA awareness to the kernel.
This code is recommended on all multiprocessor Opteron systems.
If the system is EM64T, you should say N unless your system is EM64T
NUMA.
config K8_NUMA
bool "Old style AMD Opteron NUMA detection"
depends on NUMA && PCI
default y
help
Enable K8 NUMA node topology detection. You should say Y here if
you have a multi processor AMD K8 system. This uses an old
method to read the NUMA configuration directly from the builtin
Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
instead, which also takes priority if both are compiled in.
config NODES_SHIFT
int
default "6"
depends on NEED_MULTIPLE_NODES
# Dummy CONFIG option to select ACPI_NUMA from drivers/acpi/Kconfig.
config X86_64_ACPI_NUMA
bool "ACPI NUMA detection"
depends on NUMA
select ACPI
select PCI
select ACPI_NUMA
default y
help
Enable ACPI SRAT based node topology detection.
config NUMA_EMU
bool "NUMA emulation"
depends on NUMA
help
Enable NUMA emulation. A flat machine will be split
into virtual nodes when booted with "numa=fake=N", where N is the
number of nodes. This is only useful for debugging.
config ARCH_DISCONTIGMEM_ENABLE
bool
depends on NUMA
default y
config ARCH_DISCONTIGMEM_DEFAULT
def_bool y
depends on NUMA
config ARCH_SPARSEMEM_ENABLE
def_bool y
depends on (NUMA || EXPERIMENTAL)
select SPARSEMEM_VMEMMAP_ENABLE
config ARCH_MEMORY_PROBE
def_bool y
depends on MEMORY_HOTPLUG
config ARCH_FLATMEM_ENABLE
def_bool y
depends on !NUMA
source "mm/Kconfig"
config MEMORY_HOTPLUG_RESERVE
def_bool y
depends on (MEMORY_HOTPLUG && DISCONTIGMEM)
config HAVE_ARCH_EARLY_PFN_TO_NID
def_bool y
depends on NUMA
config OUT_OF_LINE_PFN_TO_PAGE
def_bool y
depends on DISCONTIGMEM
config NR_CPUS
int "Maximum number of CPUs (2-255)"
range 2 255
depends on SMP
default "8"
help
This allows you to specify the maximum number of CPUs which this
kernel will support. Current maximum is 255 CPUs due to
APIC addressing limits. Less depending on the hardware.
This is purely to save memory - each supported CPU requires
memory in the static kernel configuration.
config PHYSICAL_ALIGN
hex
default "0x200000"
config HOTPLUG_CPU
bool "Support for suspend on SMP and hot-pluggable CPUs (EXPERIMENTAL)"
depends on SMP && HOTPLUG && EXPERIMENTAL
help
Say Y here to experiment with turning CPUs off and on. CPUs
can be controlled through /sys/devices/system/cpu/cpu#.
This is also required for suspend/hibernation on SMP systems.
Say N if you want to disable CPU hotplug and don't need to
suspend.
config ARCH_ENABLE_MEMORY_HOTPLUG
def_bool y
config HPET_TIMER
bool
default y
help
Use the IA-PC HPET (High Precision Event Timer) to manage
time in preference to the PIT and RTC, if a HPET is
present. The HPET provides a stable time base on SMP
systems, unlike the TSC, but it is more expensive to access,
as it is off-chip. You can find the HPET spec at
<http://www.intel.com/hardwaredesign/hpetspec.htm>.
config HPET_EMULATE_RTC
bool
depends on HPET_TIMER && RTC=y
default y
# Mark as embedded because too many people got it wrong.
# The code disables itself when not needed.
config GART_IOMMU
bool "GART IOMMU support" if EMBEDDED
default y
select SWIOTLB
select AGP
depends on PCI
help
Support for full DMA access of devices with 32bit memory access only
on systems with more than 3GB. This is usually needed for USB,
sound, many IDE/SATA chipsets and some other devices.
Provides a driver for the AMD Athlon64/Opteron/Turion/Sempron GART
based hardware IOMMU and a software bounce buffer based IOMMU used
on Intel systems and as fallback.
The code is only active when needed (enough memory and limited
device) unless CONFIG_IOMMU_DEBUG or iommu=force is specified
too.
config CALGARY_IOMMU
bool "IBM Calgary IOMMU support"
select SWIOTLB
depends on PCI && EXPERIMENTAL
help
Support for hardware IOMMUs in IBM's xSeries x366 and x460
systems. Needed to run systems with more than 3GB of memory
properly with 32-bit PCI devices that do not support DAC
(Double Address Cycle). Calgary also supports bus level
isolation, where all DMAs pass through the IOMMU. This
prevents them from going anywhere except their intended
destination. This catches hard-to-find kernel bugs and
mis-behaving drivers and devices that do not use the DMA-API
properly to set up their DMA buffers. The IOMMU can be
turned off at boot time with the iommu=off parameter.
Normally the kernel will make the right choice by itself.
If unsure, say Y.
config CALGARY_IOMMU_ENABLED_BY_DEFAULT
bool "Should Calgary be enabled by default?"
default y
depends on CALGARY_IOMMU
help
Should Calgary be enabled by default? if you choose 'y', Calgary
will be used (if it exists). If you choose 'n', Calgary will not be
used even if it exists. If you choose 'n' and would like to use
Calgary anyway, pass 'iommu=calgary' on the kernel command line.
If unsure, say Y.
# need this always selected by IOMMU for the VIA workaround
config SWIOTLB
bool
help
Support for software bounce buffers used on x86-64 systems
which don't have a hardware IOMMU (e.g. the current generation
of Intel's x86-64 CPUs). Using this PCI devices which can only
access 32-bits of memory can be used on systems with more than
3 GB of memory. If unsure, say Y.
config X86_MCE
bool "Machine check support" if EMBEDDED
default y
help
Include a machine check error handler to report hardware errors.
This version will require the mcelog utility to decode some
machine check error logs. See
ftp://ftp.x86-64.org/pub/linux/tools/mcelog
config X86_MCE_INTEL
bool "Intel MCE features"
depends on X86_MCE && X86_LOCAL_APIC
default y
help
Additional support for intel specific MCE features such as
the thermal monitor.
config X86_MCE_AMD
bool "AMD MCE features"
depends on X86_MCE && X86_LOCAL_APIC
default y
help
Additional support for AMD specific MCE features such as
the DRAM Error Threshold.
config KEXEC
bool "kexec system call"
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
but it is independent of the system firmware. And like a reboot
you can start any kernel with it, not just Linux.
The name comes from the similarity to the exec system call.
It is an ongoing process to be certain the hardware in a machine
is properly shutdown, so do not be surprised if this code does not
initially work for you. It may help to enable device hotplugging
support. As of this writing the exact hardware interface is
strongly in flux, so no good recommendation can be made.
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
depends on EXPERIMENTAL
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
which are loaded in the main kernel with kexec-tools into
a specially reserved region and then later executed after
a crash by kdump/kexec. The crash dump kernel must be compiled
to a memory address not used by the main kernel or BIOS using
PHYSICAL_START, or it must be built as a relocatable image
(CONFIG_RELOCATABLE=y).
For more details see Documentation/kdump/kdump.txt
config RELOCATABLE
bool "Build a relocatable kernel (EXPERIMENTAL)"
depends on EXPERIMENTAL
help
Builds a relocatable kernel. This enables loading and running
a kernel binary from a different physical address than it has
been compiled for.
One use is for the kexec on panic case where the recovery kernel
must live at a different physical address than the primary
kernel.
Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
it has been loaded at and the compile time physical address
(CONFIG_PHYSICAL_START) is ignored.
config PHYSICAL_START
hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP)
default "0x200000"
help
This gives the physical address where the kernel is loaded. It
should be aligned to 2MB boundary.
If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
bzImage will decompress itself to above physical address and
run from there. Otherwise, bzImage will run from the address where
it has been loaded by the boot loader and will ignore above physical
address.
In normal kdump cases one does not have to set/change this option
as now bzImage can be compiled as a completely relocatable image
(CONFIG_RELOCATABLE=y) and be used to load and run from a different
address. This option is mainly useful for the folks who don't want
to use a bzImage for capturing the crash dump and want to use a
vmlinux instead.
So if you are using bzImage for capturing the crash dump, leave
the value here unchanged to 0x200000 and set CONFIG_RELOCATABLE=y.
Otherwise if you plan to use vmlinux for capturing the crash dump
change this value to start of the reserved region (Typically 16MB
0x1000000). In other words, it can be set based on the "X" value as
specified in the "crashkernel=YM@XM" command line boot parameter
passed to the panic-ed kernel. Typically this parameter is set as
crashkernel=64M@16M. Please take a look at
Documentation/kdump/kdump.txt for more details about crash dumps.
Usage of bzImage for capturing the crash dump is advantageous as
one does not have to build two kernels. Same kernel can be used
as production kernel and capture kernel.
Don't change this unless you know what you are doing.
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
depends on PROC_FS
default y
help
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
execution. By using pipes or other transports made available to
the process as file descriptors supporting the read/write
syscalls, it's possible to isolate those applications in
their own address space using seccomp. Once seccomp is
enabled via /proc/<pid>/seccomp, it cannot be disabled
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
If unsure, say Y. Only embedded should say N here.
config CC_STACKPROTECTOR
bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
depends on EXPERIMENTAL
help
This option turns on the -fstack-protector GCC feature. This
feature puts, at the beginning of critical functions, a canary
value on the stack just before the return address, and validates
the value just before actually returning. Stack based buffer
overflows (that need to overwrite this return address) now also
overwrite the canary, which gets detected and the attack is then
neutralized via a kernel panic.
This feature requires gcc version 4.2 or above, or a distribution
gcc with the feature backported. Older versions are automatically
detected and for those versions, this configuration option is ignored.
config CC_STACKPROTECTOR_ALL
bool "Use stack-protector for all functions"
depends on CC_STACKPROTECTOR
help
Normally, GCC only inserts the canary value protection for
functions that use large-ish on-stack buffers. By enabling
this option, GCC will be asked to do this for ALL functions.
source kernel/Kconfig.hz
config K8_NB
def_bool y
depends on AGP_AMD64 || GART_IOMMU || (PCI && NUMA)
endmenu
#
# Use the generic interrupt handling code in kernel/irq/:
#
config GENERIC_HARDIRQS
bool
default y
config GENERIC_IRQ_PROBE
bool
default y
# we have no ISA slots, but we do have ISA-style DMA.
config ISA_DMA_API
bool
default y
config GENERIC_PENDING_IRQ
bool
depends on GENERIC_HARDIRQS && SMP
default y
menu "Power management options"
source kernel/power/Kconfig
config ARCH_HIBERNATION_HEADER
bool
depends on HIBERNATION
default y
source "drivers/acpi/Kconfig"
source "arch/x86/kernel/cpu/cpufreq/Kconfig_64"
source "drivers/cpuidle/Kconfig"
endmenu
menu "Bus options (PCI etc.)"
config PCI
bool "PCI support"
select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
config PCI_DIRECT
bool
depends on PCI
default y
config PCI_MMCONFIG
bool "Support mmconfig PCI config space access"
depends on PCI && ACPI
config PCI_DOMAINS
bool
depends on PCI
default y
config DMAR
bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
depends on PCI_MSI && ACPI && EXPERIMENTAL
help
DMA remapping (DMAR) devices support enables independent address
translations for Direct Memory Access (DMA) from devices.
These DMA remapping devices are reported via ACPI tables
and include PCI device scope covered by these DMA
remapping devices.
config DMAR_GFX_WA
bool "Support for Graphics workaround"
depends on DMAR
default y
help
Current Graphics drivers tend to use physical address
for DMA and avoid using DMA APIs. Setting this config
option permits the IOMMU driver to set a unity map for
all the OS-visible memory. Hence the driver can continue
to use physical addresses for DMA.
config DMAR_FLOPPY_WA
bool
depends on DMAR
default y
help
Floppy disk drivers are know to bypass DMA API calls
thereby failing to work when IOMMU is enabled. This
workaround will setup a 1:1 mapping for the first
16M to make floppy (an ISA device) work.
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats / Emulations"
source "fs/Kconfig.binfmt"
config IA32_EMULATION
bool "IA32 Emulation"
help
Include code to run 32-bit programs under a 64-bit kernel. You should
likely turn this on, unless you're 100% sure that you don't have any
32-bit programs left.
config IA32_AOUT
tristate "IA32 a.out support"
depends on IA32_EMULATION
help
Support old a.out binaries in the 32bit emulation.
config COMPAT
bool
depends on IA32_EMULATION
default y
config COMPAT_FOR_U64_ALIGNMENT
def_bool COMPAT
config SYSVIPC_COMPAT
bool
depends on COMPAT && SYSVIPC
default y
endmenu
source "net/Kconfig"
source drivers/Kconfig
source "drivers/firmware/Kconfig"
source fs/Kconfig
source "kernel/Kconfig.instrumentation"
source "arch/x86/Kconfig.debug"
source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"

View File

@ -1,12 +1,16 @@
# Unified Makefile for i386 and x86_64
# select defconfig based on actual architecture
KBUILD_DEFCONFIG := $(ARCH)_defconfig
ifeq ($(ARCH),x86)
KBUILD_DEFCONFIG := i386_defconfig
else
KBUILD_DEFCONFIG := $(ARCH)_defconfig
endif
# # No need to remake these files
# No need to remake these files
$(srctree)/arch/x86/Makefile%: ;
ifeq ($(ARCH),i386)
ifeq ($(CONFIG_X86_32),y)
include $(srctree)/arch/x86/Makefile_32
else
include $(srctree)/arch/x86/Makefile_64

View File

@ -160,7 +160,7 @@ archclean:
$(Q)$(MAKE) $(clean)=arch/x86/boot
define archhelp
echo '* bzImage - Compressed kernel image (arch/$(ARCH)/boot/bzImage)'
echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'
echo ' install - Install kernel using'
echo ' (your) ~/bin/installkernel or'
echo ' (distribution) /sbin/installkernel or'
@ -170,6 +170,6 @@ define archhelp
echo ' isoimage - Create a boot CD-ROM image'
endef
CLEAN_FILES += arch/$(ARCH)/boot/fdimage \
arch/$(ARCH)/boot/image.iso \
arch/$(ARCH)/boot/mtools.conf
CLEAN_FILES += arch/x86/boot/fdimage \
arch/x86/boot/image.iso \
arch/x86/boot/mtools.conf

View File

@ -127,7 +127,7 @@ archclean:
$(Q)$(MAKE) $(clean)=$(boot)
define archhelp
echo '* bzImage - Compressed kernel image (arch/$(ARCH)/boot/bzImage)'
echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'
echo ' install - Install kernel using'
echo ' (your) ~/bin/installkernel or'
echo ' (distribution) /sbin/installkernel or'
@ -137,8 +137,8 @@ define archhelp
echo ' isoimage - Create a boot CD-ROM image'
endef
CLEAN_FILES += arch/$(ARCH)/boot/fdimage \
arch/$(ARCH)/boot/image.iso \
arch/$(ARCH)/boot/mtools.conf
CLEAN_FILES += arch/x86/boot/fdimage \
arch/x86/boot/image.iso \
arch/x86/boot/mtools.conf

View File

@ -49,10 +49,10 @@ HOSTCFLAGS_build.o := $(LINUXINCLUDE)
# How to compile the 16-bit code. Note we always compile for -march=i386,
# that way we can complain to the user if the CPU is insufficient.
cflags-i386 :=
cflags-x86_64 := -m32
cflags-$(CONFIG_X86_32) :=
cflags-$(CONFIG_X86_64) := -m32
KBUILD_CFLAGS := $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
$(cflags-$(ARCH)) \
$(cflags-y) \
-Wall -Wstrict-prototypes \
-march=i386 -mregparm=3 \
-include $(srctree)/$(src)/code16gcc.h \

View File

@ -42,13 +42,7 @@ static struct cpu_features cpu;
static u32 cpu_vendor[3];
static u32 err_flags[NCAPINTS];
#ifdef CONFIG_X86_64
static const int req_level = 64;
#elif defined(CONFIG_X86_MINIMUM_CPU_FAMILY)
static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY;
#else
static const int req_level = 3;
#endif
static const u32 req_flags[NCAPINTS] =
{

View File

@ -3,6 +3,7 @@
#
extra-y := head_32.o init_task.o vmlinux.lds
CPPFLAGS_vmlinux.lds += -Ui386
obj-y := process_32.o signal_32.o entry_32.o traps_32.o irq_32.o \
ptrace_32.o time_32.o ioport_32.o ldt_32.o setup_32.o i8259_32.o sys_i386_32.o \
@ -60,7 +61,7 @@ quiet_cmd_syscall = SYSCALL $@
cmd_syscall = $(CC) -m elf_i386 -nostdlib $(SYSCFLAGS_$(@F)) \
-Wl,-T,$(filter-out FORCE,$^) -o $@
export CPPFLAGS_vsyscall_32.lds += -P -C -U$(ARCH)
export CPPFLAGS_vsyscall_32.lds += -P -C -Ui386
vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
$(call ld-option, -Wl$(comma)--hash-style=sysv)

View File

@ -3,7 +3,9 @@
#
extra-y := head_64.o head64.o init_task.o vmlinux.lds
CPPFLAGS_vmlinux.lds += -Ux86_64
EXTRA_AFLAGS := -traditional
obj-y := process_64.o signal_64.o entry_64.o traps_64.o irq_64.o \
ptrace_64.o time_64.o ioport_64.o ldt_64.o setup_64.o i8259_64.o sys_x86_64.o \
x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \

View File

@ -637,6 +637,38 @@ static int __init acpi_parse_hpet(struct acpi_table_header *table)
}
hpet_address = hpet_tbl->address.address;
/*
* Some broken BIOSes advertise HPET at 0x0. We really do not
* want to allocate a resource there.
*/
if (!hpet_address) {
printk(KERN_WARNING PREFIX
"HPET id: %#x base: %#lx is invalid\n",
hpet_tbl->id, hpet_address);
return 0;
}
#ifdef CONFIG_X86_64
/*
* Some even more broken BIOSes advertise HPET at
* 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
* some noise:
*/
if (hpet_address == 0xfed0000000000000UL) {
if (!hpet_force_user) {
printk(KERN_WARNING PREFIX "HPET id: %#x "
"base: 0xfed0000000000000 is bogus\n "
"try hpet=force on the kernel command line to "
"fix it up to 0xfed00000.\n", hpet_tbl->id);
hpet_address = 0;
return 0;
}
printk(KERN_WARNING PREFIX
"HPET id: %#x base: 0xfed0000000000000 fixed up "
"to 0xfed00000.\n", hpet_tbl->id);
hpet_address >>= 32;
}
#endif
printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
hpet_tbl->id, hpet_address);

View File

@ -19,6 +19,9 @@ config X86_ACPI_CPUFREQ
Processor Performance States.
This driver also supports Intel Enhanced Speedstep.
To compile this driver as a module, choose M here: the
module will be called acpi-cpufreq.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
@ -26,7 +29,7 @@ config X86_ACPI_CPUFREQ
config ELAN_CPUFREQ
tristate "AMD Elan SC400 and SC410"
select CPU_FREQ_TABLE
depends on X86_ELAN
depends on X86_32 && X86_ELAN
---help---
This adds the CPUFreq driver for AMD Elan SC400 and SC410
processors.
@ -42,7 +45,7 @@ config ELAN_CPUFREQ
config SC520_CPUFREQ
tristate "AMD Elan SC520"
select CPU_FREQ_TABLE
depends on X86_ELAN
depends on X86_32 && X86_ELAN
---help---
This adds the CPUFreq driver for AMD Elan SC520 processor.
@ -54,6 +57,7 @@ config SC520_CPUFREQ
config X86_POWERNOW_K6
tristate "AMD Mobile K6-2/K6-3 PowerNow!"
select CPU_FREQ_TABLE
depends on X86_32
help
This adds the CPUFreq driver for mobile AMD K6-2+ and mobile
AMD K6-3+ processors.
@ -65,6 +69,7 @@ config X86_POWERNOW_K6
config X86_POWERNOW_K7
tristate "AMD Mobile Athlon/Duron PowerNow!"
select CPU_FREQ_TABLE
depends on X86_32
help
This adds the CPUFreq driver for mobile AMD K7 mobile processors.
@ -76,23 +81,27 @@ config X86_POWERNOW_K7_ACPI
bool
depends on X86_POWERNOW_K7 && ACPI_PROCESSOR
depends on !(X86_POWERNOW_K7 = y && ACPI_PROCESSOR = m)
depends on X86_32
default y
config X86_POWERNOW_K8
tristate "AMD Opteron/Athlon64 PowerNow!"
select CPU_FREQ_TABLE
depends on EXPERIMENTAL
help
This adds the CPUFreq driver for mobile AMD Opteron/Athlon64 processors.
To compile this driver as a module, choose M here: the
module will be called powernow-k8.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
config X86_POWERNOW_K8_ACPI
bool "ACPI Support"
select ACPI_PROCESSOR
depends on ACPI && X86_POWERNOW_K8
bool
prompt "ACPI Support" if X86_32
depends on ACPI && X86_POWERNOW_K8 && ACPI_PROCESSOR
depends on !(X86_POWERNOW_K8 = y && ACPI_PROCESSOR = m)
default y
help
This provides access to the K8s Processor Performance States via ACPI.
@ -104,7 +113,7 @@ config X86_POWERNOW_K8_ACPI
config X86_GX_SUSPMOD
tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
depends on PCI
depends on X86_32 && PCI
help
This add the CPUFreq driver for NatSemi Geode processors which
support suspend modulation.
@ -114,15 +123,20 @@ config X86_GX_SUSPMOD
If in doubt, say N.
config X86_SPEEDSTEP_CENTRINO
tristate "Intel Enhanced SpeedStep"
tristate "Intel Enhanced SpeedStep (deprecated)"
select CPU_FREQ_TABLE
select X86_SPEEDSTEP_CENTRINO_TABLE
select X86_SPEEDSTEP_CENTRINO_TABLE if X86_32
depends on X86_32 || (X86_64 && ACPI_PROCESSOR)
help
This is deprecated and this functionality is now merged into
acpi_cpufreq (X86_ACPI_CPUFREQ). Use that driver instead of
speedstep_centrino.
This adds the CPUFreq driver for Enhanced SpeedStep enabled
mobile CPUs. This means Intel Pentium M (Centrino) CPUs. However,
you also need to say Y to "Use ACPI tables to decode..." below
[which might imply enabling ACPI] if you want to use this driver
on non-Banias CPUs.
mobile CPUs. This means Intel Pentium M (Centrino) CPUs
or 64bit enabled Intel Xeons.
To compile this driver as a module, choose M here: the
module will be called speedstep-centrino.
For details, take a look at <file:Documentation/cpu-freq/>.
@ -130,7 +144,7 @@ config X86_SPEEDSTEP_CENTRINO
config X86_SPEEDSTEP_CENTRINO_TABLE
bool "Built-in tables for Banias CPUs"
depends on X86_SPEEDSTEP_CENTRINO
depends on X86_32 && X86_SPEEDSTEP_CENTRINO
default y
help
Use built-in tables for Banias CPUs if ACPI encoding
@ -141,6 +155,7 @@ config X86_SPEEDSTEP_CENTRINO_TABLE
config X86_SPEEDSTEP_ICH
tristate "Intel Speedstep on ICH-M chipsets (ioport interface)"
select CPU_FREQ_TABLE
depends on X86_32
help
This adds the CPUFreq driver for certain mobile Intel Pentium III
(Coppermine), all mobile Intel Pentium III-M (Tualatin) and all
@ -154,7 +169,7 @@ config X86_SPEEDSTEP_ICH
config X86_SPEEDSTEP_SMI
tristate "Intel SpeedStep on 440BX/ZX/MX chipsets (SMI interface)"
select CPU_FREQ_TABLE
depends on EXPERIMENTAL
depends on X86_32 && EXPERIMENTAL
help
This adds the CPUFreq driver for certain mobile Intel Pentium III
(Coppermine), all mobile Intel Pentium III-M (Tualatin)
@ -169,15 +184,24 @@ config X86_P4_CLOCKMOD
select CPU_FREQ_TABLE
help
This adds the CPUFreq driver for Intel Pentium 4 / XEON
processors.
processors. When enabled it will lower CPU temperature by skipping
clocks.
This driver should be only used in exceptional
circumstances when very low power is needed because it causes severe
slowdowns and noticeable latencies. Normally Speedstep should be used
instead.
To compile this driver as a module, choose M here: the
module will be called p4-clockmod.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
Unless you are absolutely sure say N.
config X86_CPUFREQ_NFORCE2
tristate "nVidia nForce2 FSB changing"
depends on EXPERIMENTAL
depends on X86_32 && EXPERIMENTAL
help
This adds the CPUFreq driver for FSB changing on nVidia nForce2
platforms.
@ -188,6 +212,7 @@ config X86_CPUFREQ_NFORCE2
config X86_LONGRUN
tristate "Transmeta LongRun"
depends on X86_32
help
This adds the CPUFreq driver for Transmeta Crusoe and Efficeon processors
which support LongRun.
@ -199,7 +224,7 @@ config X86_LONGRUN
config X86_LONGHAUL
tristate "VIA Cyrix III Longhaul"
select CPU_FREQ_TABLE
depends on ACPI_PROCESSOR
depends on X86_32 && ACPI_PROCESSOR
help
This adds the CPUFreq driver for VIA Samuel/CyrixIII,
VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
@ -212,7 +237,7 @@ config X86_LONGHAUL
config X86_E_POWERSAVER
tristate "VIA C7 Enhanced PowerSaver (EXPERIMENTAL)"
select CPU_FREQ_TABLE
depends on EXPERIMENTAL
depends on X86_32 && EXPERIMENTAL
help
This adds the CPUFreq driver for VIA C7 processors.
@ -233,11 +258,11 @@ config X86_ACPI_CPUFREQ_PROC_INTF
config X86_SPEEDSTEP_LIB
tristate
default X86_SPEEDSTEP_ICH || X86_SPEEDSTEP_SMI || X86_P4_CLOCKMOD
default (X86_SPEEDSTEP_ICH || X86_SPEEDSTEP_SMI || X86_P4_CLOCKMOD)
config X86_SPEEDSTEP_RELAXED_CAP_CHECK
bool "Relaxed speedstep capability checks"
depends on (X86_SPEEDSTEP_SMI || X86_SPEEDSTEP_ICH)
depends on X86_32 && (X86_SPEEDSTEP_SMI || X86_SPEEDSTEP_ICH)
help
Don't perform all checks for a speedstep capable system which would
normally be done. Some ancient or strange systems, though speedstep

View File

@ -1,108 +0,0 @@
#
# CPU Frequency scaling
#
menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
if CPU_FREQ
comment "CPUFreq processor drivers"
config X86_POWERNOW_K8
tristate "AMD Opteron/Athlon64 PowerNow!"
select CPU_FREQ_TABLE
help
This adds the CPUFreq driver for mobile AMD Opteron/Athlon64 processors.
To compile this driver as a module, choose M here: the
module will be called powernow-k8.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
config X86_POWERNOW_K8_ACPI
bool
depends on X86_POWERNOW_K8 && ACPI_PROCESSOR
depends on !(X86_POWERNOW_K8 = y && ACPI_PROCESSOR = m)
default y
config X86_SPEEDSTEP_CENTRINO
tristate "Intel Enhanced SpeedStep (deprecated)"
select CPU_FREQ_TABLE
depends on ACPI_PROCESSOR
help
This is deprecated and this functionality is now merged into
acpi_cpufreq (X86_ACPI_CPUFREQ). Use that driver instead of
speedstep_centrino.
This adds the CPUFreq driver for Enhanced SpeedStep enabled
mobile CPUs. This means Intel Pentium M (Centrino) CPUs
or 64bit enabled Intel Xeons.
To compile this driver as a module, choose M here: the
module will be called speedstep-centrino.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
config X86_ACPI_CPUFREQ
tristate "ACPI Processor P-States driver"
select CPU_FREQ_TABLE
depends on ACPI_PROCESSOR
help
This driver adds a CPUFreq driver which utilizes the ACPI
Processor Performance States.
This driver also supports Intel Enhanced Speedstep.
To compile this driver as a module, choose M here: the
module will be called acpi-cpufreq.
For details, take a look at <file:Documentation/cpu-freq/>.
If in doubt, say N.
comment "shared options"
config X86_ACPI_CPUFREQ_PROC_INTF
bool "/proc/acpi/processor/../performance interface (deprecated)"
depends on PROC_FS
depends on X86_ACPI_CPUFREQ || X86_POWERNOW_K8_ACPI
help
This enables the deprecated /proc/acpi/processor/../performance
interface. While it is helpful for debugging, the generic,
cross-architecture cpufreq interfaces should be used.
If in doubt, say N.
config X86_P4_CLOCKMOD
tristate "Intel Pentium 4 clock modulation"
depends on EMBEDDED
select CPU_FREQ_TABLE
help
This adds the clock modulation driver for Intel Pentium 4 / XEON
processors. When enabled it will lower CPU temperature by skipping
clocks.
This driver should be only used in exceptional
circumstances when very low power is needed because it causes severe
slowdowns and noticeable latencies. Normally Speedstep should be used
instead.
To compile this driver as a module, choose M here: the
module will be called p4-clockmod.
For details, take a look at <file:Documentation/cpu-freq/>.
Unless you are absolutely sure say N.
config X86_SPEEDSTEP_LIB
tristate
default X86_P4_CLOCKMOD
endif
endmenu

View File

@ -46,7 +46,7 @@
#define PFX "powernow-k8: "
#define BFX PFX "BIOS error: "
#define VERSION "version 2.00.00"
#define VERSION "version 2.20.00"
#include "powernow-k8.h"
/* serialize freq changes */
@ -73,33 +73,11 @@ static u32 find_khz_freq_from_fid(u32 fid)
return 1000 * find_freq_from_fid(fid);
}
/* Return a frequency in MHz, given an input fid and did */
static u32 find_freq_from_fiddid(u32 fid, u32 did)
static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
{
if (current_cpu_data.x86 == 0x10)
return 100 * (fid + 0x10) >> did;
else
return 100 * (fid + 0x8) >> did;
return data[pstate].frequency;
}
static u32 find_khz_freq_from_fiddid(u32 fid, u32 did)
{
return 1000 * find_freq_from_fiddid(fid, did);
}
static u32 find_fid_from_pstate(u32 pstate)
{
u32 hi, lo;
rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
return lo & HW_PSTATE_FID_MASK;
}
static u32 find_did_from_pstate(u32 pstate)
{
u32 hi, lo;
rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
return (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
}
/* Return the vco fid for an input fid
*
@ -142,9 +120,7 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
if (cpu_family == CPU_HW_PSTATE) {
rdmsr(MSR_PSTATE_STATUS, lo, hi);
i = lo & HW_PSTATE_MASK;
rdmsr(MSR_PSTATE_DEF_BASE + i, lo, hi);
data->currfid = lo & HW_PSTATE_FID_MASK;
data->currdid = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
data->currpstate = i;
return 0;
}
do {
@ -295,7 +271,7 @@ static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid,
static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
{
wrmsr(MSR_PSTATE_CTRL, pstate, 0);
data->currfid = find_fid_from_pstate(pstate);
data->currpstate = pstate;
return 0;
}
@ -845,17 +821,20 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
{
int i;
u32 hi = 0, lo = 0;
rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
for (i = 0; i < data->acpi_data.state_count; i++) {
u32 index;
u32 hi = 0, lo = 0;
u32 fid;
u32 did;
index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
if (index > MAX_HW_PSTATE) {
if (index > data->max_hw_pstate) {
printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
continue;
}
rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
if (!(hi & HW_PSTATE_VALID_MASK)) {
@ -864,22 +843,9 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
continue;
}
fid = lo & HW_PSTATE_FID_MASK;
did = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
powernow_table[i].index = index;
dprintk(" %d : fid 0x%x, did 0x%x\n", index, fid, did);
powernow_table[i].index = index | (fid << HW_FID_INDEX_SHIFT) | (did << HW_DID_INDEX_SHIFT);
powernow_table[i].frequency = find_khz_freq_from_fiddid(fid, did);
if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
powernow_table[i].frequency,
(unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
continue;
}
powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
}
return 0;
}
@ -1020,22 +986,18 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
/* Take a frequency, and issue the hardware pstate transition command */
static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
{
u32 fid = 0;
u32 did = 0;
u32 pstate = 0;
int res, i;
struct cpufreq_freqs freqs;
dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
/* get fid did for hardware pstate transition */
/* get MSR index for hardware pstate transition */
pstate = index & HW_PSTATE_MASK;
if (pstate > MAX_HW_PSTATE)
if (pstate > data->max_hw_pstate)
return 0;
fid = (index & HW_FID_INDEX_MASK) >> HW_FID_INDEX_SHIFT;
did = (index & HW_DID_INDEX_MASK) >> HW_DID_INDEX_SHIFT;
freqs.old = find_khz_freq_from_fiddid(data->currfid, data->currdid);
freqs.new = find_khz_freq_from_fiddid(fid, did);
freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
for_each_cpu_mask(i, *(data->available_cores)) {
freqs.cpu = i;
@ -1043,9 +1005,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
}
res = transition_pstate(data, pstate);
data->currfid = find_fid_from_pstate(pstate);
data->currdid = find_did_from_pstate(pstate);
freqs.new = find_khz_freq_from_fiddid(data->currfid, data->currdid);
freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
for_each_cpu_mask(i, *(data->available_cores)) {
freqs.cpu = i;
@ -1090,10 +1050,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
if (query_current_values_with_pending_wait(data))
goto err_out;
if (cpu_family == CPU_HW_PSTATE)
dprintk("targ: curr fid 0x%x, did 0x%x\n",
data->currfid, data->currdid);
else {
if (cpu_family != CPU_HW_PSTATE) {
dprintk("targ: curr fid 0x%x, vid 0x%x\n",
data->currfid, data->currvid);
@ -1124,7 +1081,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
mutex_unlock(&fidvid_mutex);
if (cpu_family == CPU_HW_PSTATE)
pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
else
pol->cur = find_khz_freq_from_fid(data->currfid);
ret = 0;
@ -1223,7 +1180,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
+ (3 * (1 << data->irt) * 10)) * 1000;
if (cpu_family == CPU_HW_PSTATE)
pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
else
pol->cur = find_khz_freq_from_fid(data->currfid);
dprintk("policy current frequency %d kHz\n", pol->cur);
@ -1240,8 +1197,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
if (cpu_family == CPU_HW_PSTATE)
dprintk("cpu_init done, current fid 0x%x, did 0x%x\n",
data->currfid, data->currdid);
dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
else
dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
data->currfid, data->currvid);
@ -1297,7 +1253,7 @@ static unsigned int powernowk8_get (unsigned int cpu)
goto out;
if (cpu_family == CPU_HW_PSTATE)
khz = find_khz_freq_from_fiddid(data->currfid, data->currdid);
khz = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
else
khz = find_khz_freq_from_fid(data->currfid);

View File

@ -10,6 +10,7 @@ struct powernow_k8_data {
u32 numps; /* number of p-states */
u32 batps; /* number of p-states supported on battery */
u32 max_hw_pstate; /* maximum legal hardware pstate */
/* these values are constant when the PSB is used to determine
* vid/fid pairings, but are modified during the ->target() call
@ -21,8 +22,8 @@ struct powernow_k8_data {
u32 plllock; /* pll lock time, units 1 us */
u32 exttype; /* extended interface = 1 */
/* keep track of the current fid / vid or did */
u32 currvid, currfid, currdid;
/* keep track of the current fid / vid or pstate */
u32 currvid, currfid, currpstate;
/* the powernow_table includes all frequency and vid/fid pairings:
* fid are the lower 8 bits of the index, vid are the upper 8 bits.
@ -87,23 +88,14 @@ struct powernow_k8_data {
/* Hardware Pstate _PSS and MSR definitions */
#define USE_HW_PSTATE 0x00000080
#define HW_PSTATE_FID_MASK 0x0000003f
#define HW_PSTATE_DID_MASK 0x000001c0
#define HW_PSTATE_DID_SHIFT 6
#define HW_PSTATE_MASK 0x00000007
#define HW_PSTATE_VALID_MASK 0x80000000
#define HW_FID_INDEX_SHIFT 8
#define HW_FID_INDEX_MASK 0x0000ff00
#define HW_DID_INDEX_SHIFT 16
#define HW_DID_INDEX_MASK 0x00ff0000
#define HW_WATTS_MASK 0xff
#define HW_PWR_DVR_MASK 0x300
#define HW_PWR_DVR_SHIFT 8
#define HW_PWR_MAX_MULT 3
#define MAX_HW_PSTATE 8 /* hw pstate supports up to 8 */
#define HW_PSTATE_MAX_MASK 0x000000f0
#define HW_PSTATE_MAX_SHIFT 4
#define MSR_PSTATE_DEF_BASE 0xc0010064 /* base of Pstate MSRs */
#define MSR_PSTATE_STATUS 0xc0010063 /* Pstate Status MSR */
#define MSR_PSTATE_CTRL 0xc0010062 /* Pstate control MSR */
#define MSR_PSTATE_CUR_LIMIT 0xc0010061 /* pstate current limit MSR */
/* define the two driver architectures */
#define CPU_OPTERON 0

View File

@ -802,13 +802,15 @@ static struct sysdev_attribute *mce_attributes[] = {
NULL
};
static cpumask_t mce_device_initialized = CPU_MASK_NONE;
/* Per cpu sysdev init. All of the cpus still share the same ctl bank */
static __cpuinit int mce_create_device(unsigned int cpu)
{
int err;
int i;
if (!mce_available(&cpu_data(cpu)))
if (!mce_available(&boot_cpu_data))
return -EIO;
memset(&per_cpu(device_mce, cpu).kobj, 0, sizeof(struct kobject));
@ -825,6 +827,7 @@ static __cpuinit int mce_create_device(unsigned int cpu)
if (err)
goto error;
}
cpu_set(cpu, mce_device_initialized);
return 0;
error:
@ -841,10 +844,14 @@ static void mce_remove_device(unsigned int cpu)
{
int i;
if (!cpu_isset(cpu, mce_device_initialized))
return;
for (i = 0; mce_attributes[i]; i++)
sysdev_remove_file(&per_cpu(device_mce,cpu),
mce_attributes[i]);
sysdev_unregister(&per_cpu(device_mce,cpu));
cpu_clear(cpu, mce_device_initialized);
}
/* Get notified when a cpu comes on/off. Be hotplug friendly. */
@ -852,21 +859,18 @@ static int
mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned long)hcpu;
int err = 0;
switch (action) {
case CPU_UP_PREPARE:
case CPU_UP_PREPARE_FROZEN:
err = mce_create_device(cpu);
case CPU_ONLINE:
case CPU_ONLINE_FROZEN:
mce_create_device(cpu);
break;
case CPU_UP_CANCELED:
case CPU_UP_CANCELED_FROZEN:
case CPU_DEAD:
case CPU_DEAD_FROZEN:
mce_remove_device(cpu);
break;
}
return err ? NOTIFY_BAD : NOTIFY_OK;
return NOTIFY_OK;
}
static struct notifier_block mce_cpu_notifier = {

View File

@ -89,8 +89,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
int fpu_exception;
#ifdef CONFIG_SMP
if (!cpu_online(n))
return 0;
n = c->cpu_index;
#endif
seq_printf(m, "processor\t: %d\n"
@ -177,14 +175,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
static void *c_start(struct seq_file *m, loff_t *pos)
{
if (*pos == 0) /* just in case, cpu 0 is not the first */
*pos = first_cpu(cpu_possible_map);
if ((*pos) < NR_CPUS && cpu_possible(*pos))
*pos = first_cpu(cpu_online_map);
if ((*pos) < NR_CPUS && cpu_online(*pos))
return &cpu_data(*pos);
return NULL;
}
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
*pos = next_cpu(*pos, cpu_possible_map);
*pos = next_cpu(*pos, cpu_online_map);
return c_start(m, pos);
}
static void c_stop(struct seq_file *m, void *v)

View File

@ -39,6 +39,7 @@ struct device_fixup {
static struct device_fixup fixups_table[] = {
{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset },
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset },
};
/*

View File

@ -892,7 +892,6 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
#ifdef CONFIG_SMP
c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
c->cpu_index = 0;
#endif
}
@ -1078,8 +1077,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
#ifdef CONFIG_SMP
if (!cpu_online(c->cpu_index))
return 0;
cpu = c->cpu_index;
#endif
@ -1171,15 +1168,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
static void *c_start(struct seq_file *m, loff_t *pos)
{
if (*pos == 0) /* just in case, cpu 0 is not the first */
*pos = first_cpu(cpu_possible_map);
if ((*pos) < NR_CPUS && cpu_possible(*pos))
*pos = first_cpu(cpu_online_map);
if ((*pos) < NR_CPUS && cpu_online(*pos))
return &cpu_data(*pos);
return NULL;
}
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
*pos = next_cpu(*pos, cpu_possible_map);
*pos = next_cpu(*pos, cpu_online_map);
return c_start(m, pos);
}

View File

@ -82,18 +82,15 @@ static int set_rtc_mmss(unsigned long nowtime)
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
unsigned char control, freq_select;
unsigned long flags;
/*
* IRQs are disabled when we're called from the timer interrupt,
* no need for spin_lock_irqsave()
* set_rtc_mmss is called when irqs are enabled, so disable irqs here
*/
spin_lock(&rtc_lock);
spin_lock_irqsave(&rtc_lock, flags);
/*
* Tell the clock it's being set and stop it.
*/
control = CMOS_READ(RTC_CONTROL);
CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
@ -138,7 +135,7 @@ static int set_rtc_mmss(unsigned long nowtime)
CMOS_WRITE(control, RTC_CONTROL);
CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
spin_unlock(&rtc_lock);
spin_unlock_irqrestore(&rtc_lock, flags);
return retval;
}
@ -164,21 +161,27 @@ unsigned long read_persistent_clock(void)
unsigned century = 0;
spin_lock_irqsave(&rtc_lock, flags);
/*
* if UIP is clear, then we have >= 244 microseconds before RTC
* registers will be updated. Spec sheet says that this is the
* reliable way to read RTC - registers invalid (off bus) during update
*/
while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
cpu_relax();
do {
sec = CMOS_READ(RTC_SECONDS);
min = CMOS_READ(RTC_MINUTES);
hour = CMOS_READ(RTC_HOURS);
day = CMOS_READ(RTC_DAY_OF_MONTH);
mon = CMOS_READ(RTC_MONTH);
year = CMOS_READ(RTC_YEAR);
/* now read all RTC registers while stable with interrupts disabled */
sec = CMOS_READ(RTC_SECONDS);
min = CMOS_READ(RTC_MINUTES);
hour = CMOS_READ(RTC_HOURS);
day = CMOS_READ(RTC_DAY_OF_MONTH);
mon = CMOS_READ(RTC_MONTH);
year = CMOS_READ(RTC_YEAR);
#ifdef CONFIG_ACPI
if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
acpi_gbl_FADT.century)
century = CMOS_READ(acpi_gbl_FADT.century);
if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
acpi_gbl_FADT.century)
century = CMOS_READ(acpi_gbl_FADT.century);
#endif
} while (sec != CMOS_READ(RTC_SECONDS));
spin_unlock_irqrestore(&rtc_lock, flags);
/*

View File

@ -12,6 +12,7 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/preempt.h>
#include <linux/delay.h>
#include <asm/processor.h>
@ -42,11 +43,13 @@ static void delay_tsc(unsigned long loops)
{
unsigned long bclock, now;
preempt_disable(); /* TSC's are per-cpu */
rdtscl(bclock);
do {
rep_nop();
rdtscl(now);
} while ((now-bclock) < loops);
preempt_enable();
}
/*

View File

@ -10,7 +10,9 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/preempt.h>
#include <linux/delay.h>
#include <asm/delay.h>
#include <asm/msr.h>
@ -27,14 +29,15 @@ int read_current_timer(unsigned long *timer_value)
void __delay(unsigned long loops)
{
unsigned bclock, now;
preempt_disable(); /* TSC's are pre-cpu */
rdtscl(bclock);
do
{
do {
rep_nop();
rdtscl(now);
}
while((now-bclock) < loops);
while ((now-bclock) < loops);
preempt_enable();
}
EXPORT_SYMBOL(__delay);

View File

@ -568,7 +568,7 @@ static voyager_module_t *voyager_initial_module;
* boot cpu *after* all memory initialisation has been done (so we can
* use kmalloc) but before smp initialisation, so we can probe the SMP
* configuration and pick up necessary information. */
void
void __init
voyager_cat_init(void)
{
voyager_module_t **modpp = &voyager_initial_module;

View File

@ -1900,7 +1900,7 @@ voyager_smp_prepare_cpus(unsigned int max_cpus)
smp_boot_cpus();
}
static void __devinit voyager_smp_prepare_boot_cpu(void)
static void __cpuinit voyager_smp_prepare_boot_cpu(void)
{
init_gdt(smp_processor_id());
switch_to_new_gdt();
@ -1911,7 +1911,7 @@ static void __devinit voyager_smp_prepare_boot_cpu(void)
cpu_set(smp_processor_id(), cpu_present_map);
}
static int __devinit
static int __cpuinit
voyager_cpu_up(unsigned int cpu)
{
/* This only works at boot for x86. See "rewrite" above. */

View File

@ -77,6 +77,9 @@ count_resource(struct acpi_resource *acpi_res, void *data)
struct acpi_resource_address64 addr;
acpi_status status;
if (info->res_num >= PCI_BUS_NUM_RESOURCES)
return AE_OK;
status = resource_to_addr(acpi_res, &addr);
if (ACPI_SUCCESS(status))
info->res_num++;
@ -93,6 +96,9 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
unsigned long flags;
struct resource *root;
if (info->res_num >= PCI_BUS_NUM_RESOURCES)
return AE_OK;
status = resource_to_addr(acpi_res, &addr);
if (!ACPI_SUCCESS(status))
return AE_OK;

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