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ARM: dts: r8a7779: Add HSCIF0/1 device nodes

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Based on Rev. 1.00 of the R-Car H1 datasheet.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Ulrich Hecht 2019-01-18 11:48:15 +01:00 committed by Simon Horman
parent adbb78e110
commit 055d15a88f
1 changed files with 26 additions and 0 deletions
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26
arch/arm/boot/dts/r8a7779.dtsi
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@ -287,6 +287,32 @@ scif5: serial@ffe45000 {
status = "disabled"; status = "disabled";
}; };
hscif0: serial@ffe48000 {
compatible = "renesas,hscif-r8a7779",
"renesas,rcar-gen1-hscif", "renesas,hscif";
reg = <0xffe48000 96>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_HSCIF0>,
<&cpg_clocks R8A7779_CLK_S>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&cpg_clocks>;
status = "disabled";
};
hscif1: serial@ffe49000 {
compatible = "renesas,hscif-r8a7779",
"renesas,rcar-gen1-hscif", "renesas,hscif";
reg = <0xffe49000 96>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_HSCIF1>,
<&cpg_clocks R8A7779_CLK_S>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&cpg_clocks>;
status = "disabled";
};
pfc: pin-controller@fffc0000 { pfc: pin-controller@fffc0000 {
compatible = "renesas,pfc-r8a7779"; compatible = "renesas,pfc-r8a7779";
reg = <0xfffc0000 0x23c>; reg = <0xfffc0000 0x23c>;