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ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x

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Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This commit is contained in:
Marek Szyprowski 2015-12-09 09:07:35 +01:00 committed by Krzysztof Kozlowski
parent 4869710cae
commit 05053d7a56
1 changed files with 4 additions and 2 deletions
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6
arch/arm/boot/dts/exynos5420.dtsi
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@ -298,8 +298,10 @@ gsc_pd: power-domain@10044000 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>; reg = <0x10044000 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; clocks = <&clock CLK_FIN_PLL>,
clock-names = "asb0", "asb1"; <&clock CLK_MOUT_USER_ACLK300_GSCL>,
<&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
clock-names = "oscclk", "clk0", "asb0", "asb1";
}; };
isp_pd: power-domain@10044020 { isp_pd: power-domain@10044020 {