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ARM: sun7i: fix PLL4 clock and add PLL8

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Allwinner reworked the PLL4 clock in sun7i; so we need to change the
compatible. Additionally, PLL8 is compatible with this new PLL4
implementation, so let's add a node for it as well.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Emilio López 2014-03-19 15:19:31 -03:00 committed by Maxime Ripard
parent c9eaa447e7
commit 04ebcb5405
1 changed files with 9 additions and 1 deletions
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10
arch/arm/boot/dts/sun7i-a20.dtsi
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@ -87,7 +87,7 @@ pll1: clk@01c20000 {
pll4: clk@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
compatible = "allwinner,sun7i-a20-pll4-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
clock-output-names = "pll4";
@ -109,6 +109,14 @@ pll6: clk@01c20028 {
clock-output-names = "pll6_sata", "pll6_other", "pll6";
};
pll8: clk@01c20040 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-pll4-clk";
reg = <0x01c20040 0x4>;
clocks = <&osc24M>;
clock-output-names = "pll8";
};
cpu: cpu@01c20054 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-cpu-clk";