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Revert "ARM: dts: DRA7: Add dt nodes for PWMSS"
This reverts commit 5fcc673067
.
The binding may need to change pending related hwmod comments,
so reverting as requested by Paul Walmsley <paul@pwsan.com>.
This commit is contained in:
parent
44a3ab68ca
commit
04862d8063
@ -4,7 +4,6 @@ Required properties:
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- compatible: Must be "ti,<soc>-ehrpwm".
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for am33xx - compatible = "ti,am33xx-ehrpwm";
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for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
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for dra7xx - compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm";
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- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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the cells format. The only third cell flag supported by this binding is
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PWM_POLARITY_INVERTED.
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@ -28,10 +27,3 @@ ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */
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#pwm-cells = <3>;
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reg = <0x300000 0x2000>;
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};
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ehrpwm0: ehrpwm@0 { /* EHRPWM on dra7xx */
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compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x48440200 0x80>;
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ti,hwmods = "ehrpwm0";
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};
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@ -1,9 +1,7 @@
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TI SOC based PWM Subsystem
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Required properties:
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- compatible: Must be "ti,<soc>-pwmss".
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for am33xx - compatible = "ti,am33xx-pwmss"
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for dra7xx - compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"
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- compatible: Must be "ti,am33xx-pwmss";
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- reg: physical base address and size of the registers map.
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- address-cells: Specify the number of u32 entries needed in child nodes.
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Should set to 1.
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@ -31,16 +29,3 @@ pwmss0: pwmss@48300000 {
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/* child nodes go here */
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};
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epwmss0: epwmss@4843e000 { /* On DRA7xx */
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compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
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reg = <0x4843e000 0x30>;
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ti,hwmods = "epwmss0";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x4843e100 0x4843e100 0x80 /* ECAP */
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0x4843e180 0x4843e180 0x80 /* EQEP */
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0x4843e200 0x4843e200 0x80>; /* EHRPWM */
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/* child nodes go here */
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};
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@ -1563,70 +1563,6 @@ hdmi: encoder@58060000 {
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clock-names = "fck", "sys_clk";
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};
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};
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epwmss0: epwmss@4843e000 {
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compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
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reg = <0x4843e000 0x30>;
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ti,hwmods = "epwmss0";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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ranges = <0x4843e100 0x4843e100 0x80 /* ECAP */
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0x4843e180 0x4843e180 0x80 /* EQEP */
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0x4843e200 0x4843e200 0x80>;/* EHRPWM */
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ehrpwm0: ehrpwm@4843e200 {
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compatible = "ti,dra7xx-ehrpwm",
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"ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x4843e200 0x80>;
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ti,hwmods = "ehrpwm0";
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status = "disabled";
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};
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};
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epwmss1: epwmss@48440000 {
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compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
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reg = <0x48440000 0x30>;
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ti,hwmods = "epwmss1";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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ranges = <0x48440100 0x48440100 0x80 /* ECAP */
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0x48440180 0x48440180 0x80 /* EQEP */
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0x48440200 0x48440200 0x80>; /* EHRPWM */
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ehrpwm1: ehrpwm@48440200 {
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compatible = "ti,dra7xx-ehrpwm",
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"ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x48440200 0x80>;
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ti,hwmods = "ehrpwm1";
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status = "disabled";
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};
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};
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epwmss2: epwmss@48442000 {
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compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
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reg = <0x48442000 0x30>;
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ti,hwmods = "epwmss2";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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ranges = <0x48442100 0x48442100 0x80 /* ECAP */
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0x48442180 0x48442180 0x80 /* EQEP */
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0x48442200 0x48442200 0x80>; /* EHRPWM */
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ehrpwm2: ehrpwm@48442200 {
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compatible = "ti,dra7xx-ehrpwm",
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"ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x48442200 0x80>;
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ti,hwmods = "ehrpwm2";
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status = "disabled";
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};
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};
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};
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thermal_zones: thermal-zones {
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