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drm/mgag200: Move cursor-image update to mgag200_show_cursor()
Separating the management of buffer objects from updating the hardware cursor buffer gives the code more structure. While doing this, we can further split the image-update code into code for writing the buffer, setting the base scan-out address, and enabling the cursor. The first two operations are in dedicated functions update() and set_base(). Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190927091301.10574-5-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann
parent
6ae04536e7
commit
047244aa0a
@ -12,6 +12,127 @@
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static bool warn_transparent = true;
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static bool warn_palette = true;
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static int mgag200_cursor_update(struct mga_device *mdev, void *dst, void *src,
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unsigned int width, unsigned int height)
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{
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struct drm_device *dev = mdev->dev;
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unsigned int i, row, col;
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uint32_t colour_set[16];
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uint32_t *next_space = &colour_set[0];
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uint32_t *palette_iter;
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uint32_t this_colour;
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bool found = false;
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int colour_count = 0;
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u8 reg_index;
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u8 this_row[48];
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memset(&colour_set[0], 0, sizeof(uint32_t)*16);
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/* width*height*4 = 16384 */
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for (i = 0; i < 16384; i += 4) {
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this_colour = ioread32(src + i);
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/* No transparency */
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if (this_colour>>24 != 0xff &&
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this_colour>>24 != 0x0) {
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if (warn_transparent) {
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dev_info(&dev->pdev->dev, "Video card doesn't support cursors with partial transparency.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_transparent = false; /* Only tell the user once. */
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}
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return -EINVAL;
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}
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/* Don't need to store transparent pixels as colours */
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if (this_colour>>24 == 0x0)
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continue;
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found = false;
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for (palette_iter = &colour_set[0]; palette_iter != next_space; palette_iter++) {
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if (*palette_iter == this_colour) {
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found = true;
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break;
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}
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}
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if (found)
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continue;
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/* We only support 4bit paletted cursors */
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if (colour_count >= 16) {
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if (warn_palette) {
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dev_info(&dev->pdev->dev, "Video card only supports cursors with up to 16 colours.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_palette = false; /* Only tell the user once. */
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}
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return -EINVAL;
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}
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*next_space = this_colour;
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next_space++;
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colour_count++;
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}
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/* Program colours from cursor icon into palette */
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for (i = 0; i < colour_count; i++) {
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if (i <= 2)
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reg_index = 0x8 + i*0x4;
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else
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reg_index = 0x60 + i*0x3;
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WREG_DAC(reg_index, colour_set[i] & 0xff);
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WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff);
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WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff);
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BUG_ON((colour_set[i]>>24 & 0xff) != 0xff);
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}
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/* now write colour indices into hardware cursor buffer */
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for (row = 0; row < 64; row++) {
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memset(&this_row[0], 0, 48);
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for (col = 0; col < 64; col++) {
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this_colour = ioread32(src + 4*(col + 64*row));
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/* write transparent pixels */
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if (this_colour>>24 == 0x0) {
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this_row[47 - col/8] |= 0x80>>(col%8);
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continue;
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}
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/* write colour index here */
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for (i = 0; i < colour_count; i++) {
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if (colour_set[i] == this_colour) {
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if (col % 2)
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this_row[col/2] |= i<<4;
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else
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this_row[col/2] |= i;
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break;
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}
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}
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}
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memcpy_toio(dst + row*48, &this_row[0], 48);
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}
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return 0;
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}
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static void mgag200_cursor_set_base(struct mga_device *mdev, u64 address)
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{
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u8 addrl = (address >> 10) & 0xff;
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u8 addrh = (address >> 18) & 0x3f;
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/* Program gpu address of cursor buffer */
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_LOW, addrl);
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_HI, addrh);
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}
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static int mgag200_show_cursor(struct mga_device *mdev, void *dst, void *src,
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unsigned int width, unsigned int height,
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u64 dst_gpu)
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{
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int ret;
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ret = mgag200_cursor_update(mdev, dst, src, width, height);
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if (ret)
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return ret;
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mgag200_cursor_set_base(mdev, dst_gpu);
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/* Adjust cursor control register to turn on the cursor */
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WREG_DAC(MGA1064_CURSOR_CTL, 4); /* 16-colour palletized cursor mode */
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return 0;
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}
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/*
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* Hide the cursor off screen. We can't disable the cursor hardware because
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* it takes too long to re-activate and causes momentary corruption.
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@ -82,19 +203,10 @@ int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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struct drm_gem_vram_object *pixels_next;
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struct drm_gem_object *obj;
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struct drm_gem_vram_object *gbo = NULL;
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int ret = 0;
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int ret;
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u8 *src, *dst;
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unsigned int i, row, col;
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uint32_t colour_set[16];
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uint32_t *next_space = &colour_set[0];
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uint32_t *palette_iter;
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uint32_t this_colour;
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bool found = false;
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int colour_count = 0;
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s64 gpu_addr;
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u64 dst_gpu;
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u8 reg_index;
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u8 this_row[48];
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if (!pixels_1 || !pixels_2) {
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WREG8(MGA_CURPOSXL, 0);
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@ -159,91 +271,9 @@ int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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}
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dst_gpu = (u64)gpu_addr;
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memset(&colour_set[0], 0, sizeof(uint32_t)*16);
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/* width*height*4 = 16384 */
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for (i = 0; i < 16384; i += 4) {
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this_colour = ioread32(src + i);
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/* No transparency */
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if (this_colour>>24 != 0xff &&
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this_colour>>24 != 0x0) {
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if (warn_transparent) {
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dev_info(&dev->pdev->dev, "Video card doesn't support cursors with partial transparency.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_transparent = false; /* Only tell the user once. */
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}
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ret = -EINVAL;
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goto err_drm_gem_vram_kunmap_dst;
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}
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/* Don't need to store transparent pixels as colours */
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if (this_colour>>24 == 0x0)
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continue;
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found = false;
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for (palette_iter = &colour_set[0]; palette_iter != next_space; palette_iter++) {
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if (*palette_iter == this_colour) {
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found = true;
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break;
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}
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}
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if (found)
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continue;
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/* We only support 4bit paletted cursors */
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if (colour_count >= 16) {
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if (warn_palette) {
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dev_info(&dev->pdev->dev, "Video card only supports cursors with up to 16 colours.\n");
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dev_info(&dev->pdev->dev, "Not enabling hardware cursor.\n");
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warn_palette = false; /* Only tell the user once. */
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}
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ret = -EINVAL;
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goto err_drm_gem_vram_kunmap_dst;
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}
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*next_space = this_colour;
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next_space++;
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colour_count++;
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}
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/* Program colours from cursor icon into palette */
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for (i = 0; i < colour_count; i++) {
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if (i <= 2)
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reg_index = 0x8 + i*0x4;
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else
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reg_index = 0x60 + i*0x3;
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WREG_DAC(reg_index, colour_set[i] & 0xff);
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WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff);
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WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff);
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BUG_ON((colour_set[i]>>24 & 0xff) != 0xff);
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}
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/* now write colour indices into hardware cursor buffer */
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for (row = 0; row < 64; row++) {
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memset(&this_row[0], 0, 48);
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for (col = 0; col < 64; col++) {
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this_colour = ioread32(src + 4*(col + 64*row));
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/* write transparent pixels */
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if (this_colour>>24 == 0x0) {
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this_row[47 - col/8] |= 0x80>>(col%8);
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continue;
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}
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/* write colour index here */
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for (i = 0; i < colour_count; i++) {
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if (colour_set[i] == this_colour) {
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if (col % 2)
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this_row[col/2] |= i<<4;
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else
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this_row[col/2] |= i;
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break;
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}
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}
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}
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memcpy_toio(dst + row*48, &this_row[0], 48);
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}
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/* Program gpu address of cursor buffer */
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_LOW, (u8)((dst_gpu>>10) & 0xff));
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WREG_DAC(MGA1064_CURSOR_BASE_ADR_HI, (u8)((dst_gpu>>18) & 0x3f));
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/* Adjust cursor control register to turn on the cursor */
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WREG_DAC(MGA1064_CURSOR_CTL, 4); /* 16-colour palletized cursor mode */
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ret = mgag200_show_cursor(mdev, dst, src, width, height, dst_gpu);
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if (ret)
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goto err_drm_gem_vram_kunmap_dst;
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/* Now update internal buffer pointers */
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if (pixels_current)
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