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Renesas ARM64 Based SoC DT Updates for v4.8

Browse Source 
* Fix W=1 dtc warnings and other cleanups
 * Enable watchdog timer
 * Enable DMA for I2C
 * Increase the size of GIC-400 mapped registers: be nicer to hypervisors
 * Support RTS/CTS hardware flow control
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Merge tag 'renesas-arm64-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Renesas ARM64 Based SoC DT Updates for v4.8

* Fix W=1 dtc warnings and other cleanups
* Enable watchdog timer
* Enable DMA for I2C
* Increase the size of GIC-400 mapped registers: be nicer to hypervisors
* Support RTS/CTS hardware flow control

* tag 'renesas-arm64-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Drop 0x from unit address of gic
  arm64: dts: salvator-x: Fix W=1 dtc warnings
  arm64: dts: r8a7795: Fix W=1 dtc warnings
  arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT node
  arm64: dts: salvator-x: Enable watchdog timer
  arm64: dts: r8a7795: Add RWDT node
  arm64: dts: r8a7795: enable DMA for I2C
  arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers
  arm64: dts: salvator-x: SCIF1 supports RTS/CTS hardware flow control

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-06-13 15:29:12 -07:00
commit 045ab0c54c
2 changed files with 71 additions and 41 deletions
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14
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
View File

@ -62,7 +62,7 @@ x12_clk: x12_clk {
clock-frequency = <24576000>; clock-frequency = <24576000>;
}; };
vcc_sdhi0: regulator@1 { vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc"; regulator-name = "SDHI0 Vcc";
@ -73,7 +73,7 @@ vcc_sdhi0: regulator@1 {
enable-active-high; enable-active-high;
}; };
vccq_sdhi0: regulator@2 { vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio"; compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ"; regulator-name = "SDHI0 VccQ";
@ -86,7 +86,7 @@ vccq_sdhi0: regulator@2 {
1800000 0>; 1800000 0>;
}; };
vcc_sdhi3: regulator@3 { vcc_sdhi3: regulator-vcc-sdhi3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "SDHI3 Vcc"; regulator-name = "SDHI3 Vcc";
@ -97,7 +97,7 @@ vcc_sdhi3: regulator@3 {
enable-active-high; enable-active-high;
}; };
vccq_sdhi3: regulator@4 { vccq_sdhi3: regulator-vccq-sdhi3 {
compatible = "regulator-gpio"; compatible = "regulator-gpio";
regulator-name = "SDHI3 VccQ"; regulator-name = "SDHI3 VccQ";
@ -208,6 +208,7 @@ &scif1 {
pinctrl-0 = <&scif1_pins>; pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -329,6 +330,11 @@ &ssi1 {
shared-pin; shared-pin;
}; };
&wdt0 {
timeout-sec = <60>;
status = "okay";
};
&audio_clk_a { &audio_clk_a {
clock-frequency = <22579200>; clock-frequency = <22579200>;
}; };

78
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View File

@ -69,21 +69,23 @@ a57_3: cpu@3 {
next-level-cache = <&L2_CA57>; next-level-cache = <&L2_CA57>;
enable-method = "psci"; enable-method = "psci";
}; };
};
L2_CA57: cache-controller@0 { L2_CA57: cache-controller@0 {
compatible = "cache"; compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7795_PD_CA57_SCU>; power-domains = <&sysc R8A7795_PD_CA57_SCU>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };
L2_CA53: cache-controller@1 { L2_CA53: cache-controller@100 {
compatible = "cache"; compatible = "cache";
reg = <0x100>;
power-domains = <&sysc R8A7795_PD_CA53_SCU>; power-domains = <&sysc R8A7795_PD_CA53_SCU>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };
};
extal_clk: extal { extal_clk: extal {
compatible = "fixed-clock"; compatible = "fixed-clock";
@ -151,19 +153,27 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
gic: interrupt-controller@0xf1010000 { gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400"; compatible = "arm,gic-400";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <0>; #address-cells = <0>;
interrupt-controller; interrupt-controller;
reg = <0x0 0xf1010000 0 0x1000>, reg = <0x0 0xf1010000 0 0x1000>,
<0x0 0xf1020000 0 0x2000>, <0x0 0xf1020000 0 0x20000>,
<0x0 0xf1040000 0 0x20000>, <0x0 0xf1040000 0 0x20000>,
<0x0 0xf1060000 0 0x2000>; <0x0 0xf1060000 0 0x20000>;
interrupts = <GIC_PPI 9 interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
}; };
wdt0: watchdog@e6020000 {
compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7795", compatible = "renesas,gpio-r8a7795",
"renesas,gpio-rcar"; "renesas,gpio-rcar";
@ -749,6 +759,8 @@ i2c0: i2c@e6500000 {
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>; clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac1 0x91>, <&dmac1 0x90>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
@ -761,6 +773,8 @@ i2c1: i2c@e6508000 {
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac1 0x93>, <&dmac1 0x92>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <6>; i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
@ -773,6 +787,8 @@ i2c2: i2c@e6510000 {
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>; clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac1 0x95>, <&dmac1 0x94>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <6>; i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
@ -785,6 +801,8 @@ i2c3: i2c@e66d0000 {
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>; clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac0 0x97>, <&dmac0 0x96>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
@ -797,6 +815,8 @@ i2c4: i2c@e66d8000 {
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>; clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac0 0x99>, <&dmac0 0x98>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
@ -809,6 +829,8 @@ i2c5: i2c@e66e0000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>; clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
@ -821,6 +843,8 @@ i2c6: i2c@e66e8000 {
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>; clocks = <&cpg CPG_MOD 918>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <6>; i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
@ -874,63 +898,63 @@ rcar_sound: sound@ec500000 {
status = "disabled"; status = "disabled";
rcar_sound,dvc { rcar_sound,dvc {
dvc0: dvc@0 { dvc0: dvc-0 {
dmas = <&audma0 0xbc>; dmas = <&audma0 0xbc>;
dma-names = "tx"; dma-names = "tx";
}; };
dvc1: dvc@1 { dvc1: dvc-1 {
dmas = <&audma0 0xbe>; dmas = <&audma0 0xbe>;
dma-names = "tx"; dma-names = "tx";
}; };
}; };
rcar_sound,src { rcar_sound,src {
src0: src@0 { src0: src-0 {
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>; dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src1: src@1 { src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>; dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src2: src@2 { src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>; dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src3: src@3 { src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>; dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src4: src@4 { src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>; dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src5: src@5 { src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>; dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src6: src@6 { src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>; dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src7: src@7 { src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>; dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src8: src@8 { src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>; dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
}; };
src9: src@9 { src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>; dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
@ -938,52 +962,52 @@ src9: src@9 {
}; };
rcar_sound,ssi { rcar_sound,ssi {
ssi0: ssi@0 { ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi1: ssi@1 { ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi2: ssi@2 { ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi3: ssi@3 { ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi4: ssi@4 { ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi5: ssi@5 { ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi6: ssi@6 { ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi7: ssi@7 { ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi8: ssi@8 { ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi9: ssi@9 { ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu"; dma-names = "rx", "tx", "rxu", "txu";