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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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spi/spi_mpc8xxx: Fix QE mode Litte Endian
QE mode uses Little Endian so words > 8 bits are byte swapped. Workaround this by always enforcing wordsize 8 for words > 8 bits. Unfortunately this will not work for LSB transfers where wordsize is > 8 bits so disable these for now. Also move the different quirks into its own function to keep mpc8xxx_spi_setup_transfer() sane. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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f9218c2a60
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@ -286,11 +286,75 @@ static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
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}
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}
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static int
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mspi_apply_cpu_mode_quirks(struct spi_mpc8xxx_cs *cs,
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struct spi_device *spi,
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struct mpc8xxx_spi *mpc8xxx_spi,
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int bits_per_word)
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{
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cs->rx_shift = 0;
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cs->tx_shift = 0;
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if (bits_per_word <= 8) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u8;
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cs->get_tx = mpc8xxx_spi_tx_buf_u8;
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
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cs->rx_shift = 16;
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cs->tx_shift = 24;
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}
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} else if (bits_per_word <= 16) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u16;
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cs->get_tx = mpc8xxx_spi_tx_buf_u16;
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
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cs->rx_shift = 16;
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cs->tx_shift = 16;
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}
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} else if (bits_per_word <= 32) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u32;
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cs->get_tx = mpc8xxx_spi_tx_buf_u32;
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} else
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return -EINVAL;
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE &&
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spi->mode & SPI_LSB_FIRST) {
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cs->tx_shift = 0;
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if (bits_per_word <= 8)
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cs->rx_shift = 8;
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else
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cs->rx_shift = 0;
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}
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mpc8xxx_spi->rx_shift = cs->rx_shift;
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mpc8xxx_spi->tx_shift = cs->tx_shift;
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mpc8xxx_spi->get_rx = cs->get_rx;
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mpc8xxx_spi->get_tx = cs->get_tx;
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return bits_per_word;
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}
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static int
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mspi_apply_qe_mode_quirks(struct spi_mpc8xxx_cs *cs,
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struct spi_device *spi,
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int bits_per_word)
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{
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/* QE uses Little Endian for words > 8
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* so transform all words > 8 into 8 bits
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* Unfortnatly that doesn't work for LSB so
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* reject these for now */
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/* Note: 32 bits word, LSB works iff
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* tfcr/rfcr is set to CPMFCR_GBL */
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if (spi->mode & SPI_LSB_FIRST &&
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bits_per_word > 8)
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return -EINVAL;
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if (bits_per_word > 8)
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return 8; /* pretend its 8 bits */
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return bits_per_word;
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}
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static
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int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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{
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struct mpc8xxx_spi *mpc8xxx_spi;
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u8 bits_per_word, pm;
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int bits_per_word;
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u8 pm;
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u32 hz;
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struct spi_mpc8xxx_cs *cs = spi->controller_state;
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@ -316,41 +380,16 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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if (!hz)
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hz = spi->max_speed_hz;
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cs->rx_shift = 0;
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cs->tx_shift = 0;
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if (bits_per_word <= 8) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u8;
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cs->get_tx = mpc8xxx_spi_tx_buf_u8;
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
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cs->rx_shift = 16;
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cs->tx_shift = 24;
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}
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} else if (bits_per_word <= 16) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u16;
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cs->get_tx = mpc8xxx_spi_tx_buf_u16;
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
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cs->rx_shift = 16;
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cs->tx_shift = 16;
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}
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} else if (bits_per_word <= 32) {
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cs->get_rx = mpc8xxx_spi_rx_buf_u32;
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cs->get_tx = mpc8xxx_spi_tx_buf_u32;
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} else
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return -EINVAL;
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if (!(mpc8xxx_spi->flags & SPI_CPM_MODE))
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bits_per_word = mspi_apply_cpu_mode_quirks(cs, spi,
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mpc8xxx_spi,
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bits_per_word);
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else if (mpc8xxx_spi->flags & SPI_QE)
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bits_per_word = mspi_apply_qe_mode_quirks(cs, spi,
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bits_per_word);
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if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE &&
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spi->mode & SPI_LSB_FIRST) {
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cs->tx_shift = 0;
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if (bits_per_word <= 8)
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cs->rx_shift = 8;
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else
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cs->rx_shift = 0;
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}
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mpc8xxx_spi->rx_shift = cs->rx_shift;
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mpc8xxx_spi->tx_shift = cs->tx_shift;
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mpc8xxx_spi->get_rx = cs->get_rx;
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mpc8xxx_spi->get_tx = cs->get_tx;
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if (bits_per_word < 0)
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return bits_per_word;
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if (bits_per_word == 32)
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bits_per_word = 0;
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