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mtd: fsl-quadspi: Actually clear TX FIFO upon write

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QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
Alexander Stein 2015-07-02 11:37:56 +02:00 committed by Brian Norris
parent cef1ed9c6b
commit 038761dfe4
1 changed files with 1 additions and 1 deletions
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2
drivers/mtd/spi-nor/fsl-quadspi.c
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@ -539,7 +539,7 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
/* clear the TX FIFO. */ /* clear the TX FIFO. */
tmp = readl(q->iobase + QUADSPI_MCR); tmp = readl(q->iobase + QUADSPI_MCR);
writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR); writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);
/* fill the TX data to the FIFO */ /* fill the TX data to the FIFO */
for (j = 0, i = ((count + 3) / 4); j < i; j++) { for (j = 0, i = ((count + 3) / 4); j < i; j++) {