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drm/amdgpu/dp: add back special handling for NUTMEG
When I fixed the dp rate selection in: 3b73b168cffd9c392584d3f665021fa2190f8612 drm/amdgpu: fix dp link rate selection (v2) I accidently dropped the special handling for NUTMEG DP bridge chips. They require a fixed link rate. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -265,15 +265,27 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector
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unsigned max_lane_num = drm_dp_max_lane_count(dpcd);
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unsigned lane_num, i, max_pix_clock;
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
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max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
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if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) ==
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ENCODER_OBJECT_ID_NUTMEG) {
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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max_pix_clock = (lane_num * 270000 * 8) / bpp;
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if (max_pix_clock >= pix_clock) {
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*dp_lanes = lane_num;
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*dp_rate = link_rates[i];
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*dp_rate = 270000;
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return 0;
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}
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}
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} else {
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for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
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for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {
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max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
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if (max_pix_clock >= pix_clock) {
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*dp_lanes = lane_num;
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*dp_rate = link_rates[i];
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return 0;
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}
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}
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}
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}
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return -EINVAL;
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