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MIPS: generic: Increase NR_IRQS to 256
128 IRQs is not enough to support Ingenic SoCs. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -9,7 +9,7 @@
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#define __ASM_MACH_GENERIC_IRQ_H
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#ifndef NR_IRQS
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#define NR_IRQS 128
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#define NR_IRQS 256
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#endif
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#ifdef CONFIG_I8259
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