Third batch of cleanup/soc for 3.20:

- several fixes and adjustments following the last cleanup batch
 - removal of some unused Kconfig options
 - slight PM and pm_idle rework to ease future rework
 - removal of unneeded mach/system_rev.h
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Merge tag 'at91-cleanup3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc

Merge "at91: cleanup/soc for 3.20 #3 (bis) from Nicolas Ferre:

Third batch of cleanup/soc for 3.20:
- several fixes and adjustments following the last cleanup batch
- removal of some unused Kconfig options
- slight PM and pm_idle rework to ease future rework
- removal of unneeded mach/system_rev.h

* tag 'at91-cleanup3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ARM: at91: sam9: set arm_pm_idle from sam9_dt_device_init
  ARM: at91: fix sam9n12 and sam9x5 arm_pm_idle
  ARM: at91: mark const init data with __initconst instead of __initdata
  ARM: at91: fix PM initialization for newer SoCs
  ARM: at91: fix Kconfig.debug by adding DEBUG_AT91_UART option

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-01-26 18:40:58 -08:00
commit 02685cd20a
14 changed files with 54 additions and 96 deletions

View File

@ -117,17 +117,20 @@ choice
config AT91_DEBUG_LL_DBGU0
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5, 9n12"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU0
depends on ARCH_AT91
depends on SOC_AT91RM9200 || SOC_AT91SAM9
config AT91_DEBUG_LL_DBGU1
bool "Kernel low-level debugging on 9263, 9g45 and sama5d3"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU1
depends on ARCH_AT91
depends on SOC_AT91SAM9 || SOC_SAMA5
config AT91_DEBUG_LL_DBGU2
bool "Kernel low-level debugging on sama5d4"
select DEBUG_AT91_UART
depends on HAVE_AT91_DBGU2
depends on ARCH_AT91
depends on SOC_SAMA5
config DEBUG_BCM2835
bool "Kernel low-level debugging on BCM2835 PL011 UART"
@ -1148,6 +1151,10 @@ choice
endchoice
config DEBUG_AT91_UART
bool
depends on ARCH_AT91
config DEBUG_EXYNOS_UART
bool
@ -1208,8 +1215,7 @@ config DEBUG_LL_INCLUDE
string
default "debug/sa1100.S" if DEBUG_SA1100
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
default "debug/at91.S" if AT91_DEBUG_LL_DBGU0 || AT91_DEBUG_LL_DBGU1 || \
AT91_DEBUG_LL_DBGU2
default "debug/at91.S" if DEBUG_AT91_UART
default "debug/asm9260.S" if DEBUG_ASM9260_UART
default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
default "debug/meson.S" if DEBUG_MESON_UARTAO

View File

@ -6,15 +6,6 @@ config HAVE_AT91_UTMI
config HAVE_AT91_USB_CLK
bool
config HAVE_AT91_DBGU0
bool
config HAVE_AT91_DBGU1
bool
config HAVE_AT91_DBGU2
bool
config COMMON_CLK_AT91
bool
select COMMON_CLK
@ -70,7 +61,6 @@ config SOC_SAMA5D3
bool "SAMA5D3 family"
select SOC_SAMA5
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU1
select HAVE_AT91_UTMI
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
@ -81,7 +71,6 @@ config SOC_SAMA5D3
config SOC_SAMA5D4
bool "SAMA5D4 family"
select SOC_SAMA5
select HAVE_AT91_DBGU2
select CLKSRC_MMIO
select CACHE_L2X0
select CACHE_PL310
@ -101,12 +90,10 @@ config SOC_AT91RM9200
select COMMON_CLK_AT91
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
help
@ -115,7 +102,6 @@ config SOC_AT91SAM9260
config SOC_AT91SAM9261
bool "AT91SAM9261 or AT91SAM9G10"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
@ -124,21 +110,18 @@ config SOC_AT91SAM9261
config SOC_AT91SAM9263
bool "AT91SAM9263"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9RL
bool "AT91SAM9RL"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
config SOC_AT91SAM9G45
bool "AT91SAM9G45 or AT91SAM9M10 families"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
@ -149,7 +132,6 @@ config SOC_AT91SAM9G45
config SOC_AT91SAM9X5
bool "AT91SAM9x5 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
@ -164,7 +146,6 @@ config SOC_AT91SAM9X5
config SOC_AT91SAM9N12
bool "AT91SAM9N12 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK

View File

@ -22,11 +22,5 @@
* AT91SAM9260 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9260_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9260)
.init = at91sam9260_initialize,
AT91_SOC_END

View File

@ -21,11 +21,5 @@
* AT91SAM9261 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9261_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9261)
.init = at91sam9261_initialize,
AT91_SOC_END

View File

@ -20,11 +20,5 @@
* AT91SAM9263 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9263_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9263)
.init = at91sam9263_initialize,
AT91_SOC_END

View File

@ -19,11 +19,6 @@
/* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9g45_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9g45)
.init = at91sam9g45_initialize,
AT91_SOC_END

View File

@ -21,11 +21,5 @@
* AT91SAM9RL processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9rl_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9rl)
.init = at91sam9rl_initialize,
AT91_SOC_END

View File

@ -33,14 +33,14 @@ static void __init at91rm9200_dt_timer_init(void)
static void __init rm9200_dt_device_init(void)
{
at91_rm9200_pm_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
at91_rm9200_pm_init();
}
static const char *at91rm9200_dt_board_compat[] __initdata = {
static const char *at91rm9200_dt_board_compat[] __initconst = {
"atmel,at91rm9200",
NULL
};

View File

@ -16,6 +16,7 @@
#include <linux/of_platform.h>
#include <linux/clk-provider.h>
#include <asm/system_misc.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
@ -26,11 +27,13 @@
static void __init sam9_dt_device_init(void)
{
at91_sam9260_pm_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
arm_pm_idle = at91sam9_idle;
at91_sam9260_pm_init();
}
static const char *at91_dt_board_compat[] __initdata = {
static const char *at91_dt_board_compat[] __initconst = {
"atmel,at91sam9",
NULL
};
@ -45,8 +48,10 @@ MACHINE_END
static void __init sam9g45_dt_device_init(void)
{
at91_sam9g45_pm_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
arm_pm_idle = at91sam9_idle;
at91_sam9g45_pm_init();
}
static const char *at91_9g45_board_compat[] __initconst = {
@ -61,3 +66,25 @@ DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
.init_machine = sam9g45_dt_device_init,
.dt_compat = at91_9g45_board_compat,
MACHINE_END
static void __init sam9x5_dt_device_init(void)
{
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
arm_pm_idle = at91sam9_idle;
at91_sam9x5_pm_init();
}
static const char *at91_9x5_board_compat[] __initconst = {
"atmel,at91sam9x5",
"atmel,at91sam9n12",
NULL
};
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
.map_io = at91_map_io,
.init_early = at91_dt_initialize,
.init_machine = sam9x5_dt_device_init,
.dt_compat = at91_9x5_board_compat,
MACHINE_END

View File

@ -28,8 +28,8 @@
static void __init sama5_dt_device_init(void)
{
at91_sam9260_pm_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
at91_sam9x5_pm_init();
}
static const char *sama5_dt_board_compat[] __initconst = {

View File

@ -36,10 +36,12 @@ extern void at91_ioremap_matrix(u32 base_addr);
extern void __init at91_rm9200_pm_init(void);
extern void __init at91_sam9260_pm_init(void);
extern void __init at91_sam9g45_pm_init(void);
extern void __init at91_sam9x5_pm_init(void);
#else
void __init at91_rm9200_pm_init(void) { }
void __init at91_sam9260_pm_init(void) { }
void __init at91_sam9g45_pm_init(void) { }
void __init at91_sam9x5_pm_init(void) { }
#endif
#endif /* _AT91_GENERIC_H */

View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Under GPLv2 only
*/
#ifndef __ARCH_SYSTEM_REV_H__
#define __ARCH_SYSTEM_REV_H__
#include <asm/system_info.h>
/*
* board revision encoding
* mach specific
* the 16-31 bit are reserved for at91 generic information
*
* bit 31:
* 0 => nand 8 bit
* 1 => nand 16 bit
*/
#define BOARD_HAVE_NAND_16BIT (1 << 31)
static inline int board_have_nand_16bit(void)
{
return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
}
#endif /* __ARCH_SYSTEM_REV_H__ */

View File

@ -306,3 +306,10 @@ void __init at91_sam9g45_pm_init(void)
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
return at91_pm_init();
}
void __init at91_sam9x5_pm_init(void)
{
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
return at91_pm_init();
}

View File

@ -17,15 +17,6 @@
#include <mach/hardware.h>
#include <mach/at91_ramc.h>
#ifdef CONFIG_SOC_AT91SAM9263
/*
* FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
* handle those cases both here and in the Suspend-To-RAM support.
*/
#warning Assuming EB1 SDRAM controller is *NOT* used
#endif
/*
* When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
* clock during suspend by adjusting its prescalar and divisor.