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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 16:56:45 +07:00
KVM: move DR register access handling into generic code
Currently both SVM and VMX have their own DR handling code. Move it to x86.c. Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Gleb Natapov
Avi Kivity
parent
6bc31bdc55
commit
020df0794f
@ -496,8 +496,7 @@ struct kvm_x86_ops {
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void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
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void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
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void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
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int (*get_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long *dest);
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int (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value);
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void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
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void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
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unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
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void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
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@ -602,6 +601,8 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
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void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
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void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
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int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
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int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
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unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
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void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
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@ -1307,70 +1307,11 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *sd)
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svm->vmcb->control.asid = sd->next_asid++;
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}
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static int svm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *dest)
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static void svm_set_dr7(struct kvm_vcpu *vcpu, unsigned long value)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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switch (dr) {
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case 0 ... 3:
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*dest = vcpu->arch.db[dr];
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break;
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case 4:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
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return EMULATE_FAIL; /* will re-inject UD */
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/* fall through */
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case 6:
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
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*dest = vcpu->arch.dr6;
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else
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*dest = svm->vmcb->save.dr6;
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break;
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case 5:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
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return EMULATE_FAIL; /* will re-inject UD */
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/* fall through */
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case 7:
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
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*dest = vcpu->arch.dr7;
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else
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*dest = svm->vmcb->save.dr7;
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break;
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}
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return EMULATE_DONE;
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}
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static int svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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switch (dr) {
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case 0 ... 3:
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vcpu->arch.db[dr] = value;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
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vcpu->arch.eff_db[dr] = value;
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break;
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case 4:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
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return EMULATE_FAIL; /* will re-inject UD */
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/* fall through */
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case 6:
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vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1;
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break;
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case 5:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
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return EMULATE_FAIL; /* will re-inject UD */
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/* fall through */
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case 7:
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vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
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svm->vmcb->save.dr7 = vcpu->arch.dr7;
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vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK);
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}
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break;
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}
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return EMULATE_DONE;
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svm->vmcb->save.dr7 = value;
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}
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static int pf_interception(struct vcpu_svm *svm)
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@ -3302,8 +3243,7 @@ static struct kvm_x86_ops svm_x86_ops = {
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.set_idt = svm_set_idt,
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.get_gdt = svm_get_gdt,
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.set_gdt = svm_set_gdt,
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.get_dr = svm_get_dr,
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.set_dr = svm_set_dr,
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.set_dr7 = svm_set_dr7,
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.cache_reg = svm_cache_reg,
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.get_rflags = svm_get_rflags,
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.set_rflags = svm_set_rflags,
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@ -3089,19 +3089,9 @@ static int handle_cr(struct kvm_vcpu *vcpu)
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return 0;
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}
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static int check_dr_alias(struct kvm_vcpu *vcpu)
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{
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return -1;
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}
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return 0;
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}
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static int handle_dr(struct kvm_vcpu *vcpu)
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{
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unsigned long exit_qualification;
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unsigned long val;
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int dr, reg;
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/* Do not handle if the CPL > 0, will trigger GP on re-entry */
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@ -3136,67 +3126,20 @@ static int handle_dr(struct kvm_vcpu *vcpu)
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dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
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reg = DEBUG_REG_ACCESS_REG(exit_qualification);
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if (exit_qualification & TYPE_MOV_FROM_DR) {
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switch (dr) {
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case 0 ... 3:
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val = vcpu->arch.db[dr];
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break;
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case 4:
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if (check_dr_alias(vcpu) < 0)
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return 1;
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/* fall through */
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case 6:
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val = vcpu->arch.dr6;
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break;
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case 5:
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if (check_dr_alias(vcpu) < 0)
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return 1;
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/* fall through */
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default: /* 7 */
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val = vcpu->arch.dr7;
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break;
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}
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kvm_register_write(vcpu, reg, val);
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} else {
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val = vcpu->arch.regs[reg];
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switch (dr) {
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case 0 ... 3:
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vcpu->arch.db[dr] = val;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
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vcpu->arch.eff_db[dr] = val;
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break;
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case 4:
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if (check_dr_alias(vcpu) < 0)
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return 1;
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/* fall through */
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case 6:
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if (val & 0xffffffff00000000ULL) {
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kvm_inject_gp(vcpu, 0);
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return 1;
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}
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vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
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break;
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case 5:
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if (check_dr_alias(vcpu) < 0)
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return 1;
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/* fall through */
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default: /* 7 */
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if (val & 0xffffffff00000000ULL) {
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kvm_inject_gp(vcpu, 0);
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return 1;
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}
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vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
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vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
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vcpu->arch.switch_db_regs =
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(val & DR7_BP_EN_MASK);
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}
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break;
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}
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}
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unsigned long val;
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if (!kvm_get_dr(vcpu, dr, &val))
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kvm_register_write(vcpu, reg, val);
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} else
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kvm_set_dr(vcpu, dr, vcpu->arch.regs[reg]);
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skip_emulated_instruction(vcpu);
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return 1;
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}
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static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)
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{
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vmcs_writel(GUEST_DR7, val);
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}
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static int handle_cpuid(struct kvm_vcpu *vcpu)
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{
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kvm_emulate_cpuid(vcpu);
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@ -4187,6 +4130,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
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.set_idt = vmx_set_idt,
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.get_gdt = vmx_get_gdt,
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.set_gdt = vmx_set_gdt,
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.set_dr7 = vmx_set_dr7,
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.cache_reg = vmx_cache_reg,
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.get_rflags = vmx_get_rflags,
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.set_rflags = vmx_set_rflags,
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@ -562,6 +562,80 @@ unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
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}
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EXPORT_SYMBOL_GPL(kvm_get_cr8);
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int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
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{
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switch (dr) {
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case 0 ... 3:
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vcpu->arch.db[dr] = val;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
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vcpu->arch.eff_db[dr] = val;
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break;
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case 4:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 1;
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}
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/* fall through */
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case 6:
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if (val & 0xffffffff00000000ULL) {
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kvm_inject_gp(vcpu, 0);
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return 1;
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}
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vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
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break;
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case 5:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 1;
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}
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/* fall through */
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default: /* 7 */
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if (val & 0xffffffff00000000ULL) {
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kvm_inject_gp(vcpu, 0);
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return 1;
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}
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vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
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if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
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kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
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vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
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}
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break;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_set_dr);
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int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
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{
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switch (dr) {
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case 0 ... 3:
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*val = vcpu->arch.db[dr];
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break;
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case 4:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 1;
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}
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/* fall through */
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case 6:
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*val = vcpu->arch.dr6;
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break;
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case 5:
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if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 1;
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}
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/* fall through */
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default: /* 7 */
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*val = vcpu->arch.dr7;
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break;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_get_dr);
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static inline u32 bit(int bitno)
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{
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return 1 << (bitno & 31);
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@ -3483,14 +3557,14 @@ int emulate_clts(struct kvm_vcpu *vcpu)
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int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
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{
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return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
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return kvm_get_dr(ctxt->vcpu, dr, dest);
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}
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int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
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{
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unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
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return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
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return kvm_set_dr(ctxt->vcpu, dr, value & mask);
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}
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void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
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