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arm64: dts: imx8mn: Add cpu-freq support

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Add A53 OPP table, cpu regulator and speed grading node to
support cpu-freq driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Anson Huang 2019-08-18 02:32:25 -04:00 committed by Shawn Guo
parent 3e44dd0973
commit 01c493144e
2 changed files with 45 additions and 0 deletions
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4
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
View File

@ -27,6 +27,10 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
};
};
&A53_0 {
cpu-supply = <&buck2_reg>;
};
&iomuxc {
pinctrl-names = "default";

41
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -51,6 +51,9 @@ A53_0: cpu@0 {
clocks = <&clk IMX8MN_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
};
A53_1: cpu@1 {
@ -61,6 +64,7 @@ A53_1: cpu@1 {
clocks = <&clk IMX8MN_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_2: cpu@2 {
@ -71,6 +75,7 @@ A53_2: cpu@2 {
clocks = <&clk IMX8MN_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_3: cpu@3 {
@ -81,6 +86,7 @@ A53_3: cpu@3 {
clocks = <&clk IMX8MN_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_L2: l2-cache0 {
@ -88,6 +94,35 @@ A53_L2: l2-cache0 {
};
};
a53_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <850000>;
opp-supported-hw = <0xb00>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;
};
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-microvolt = <950000>;
opp-supported-hw = <0x300>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1000000>;
opp-supported-hw = <0x100>, <0x3>;
clock-latency-ns = <150000>;
opp-suspend;
};
};
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x80000000>;
@ -288,6 +323,12 @@ ocotp: ocotp-ctrl@30350000 {
compatible = "fsl,imx8mn-ocotp", "fsl,imx7d-ocotp", "syscon";
reg = <0x30350000 0x10000>;
clocks = <&clk IMX8MN_CLK_OCOTP_ROOT>;
#address-cells = <1>;
#size-cells = <1>;
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
};
anatop: anatop@30360000 {