mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 23:01:04 +07:00
scsi: hisi_sas: fix v2 hw underflow residual value
The value dw0 is the residual bytes when UNDERFLOW error happens, but we filled the residual with the value of dw3 before. So change the residual from dw3 to dw0. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
c16db73665
commit
01b361fc90
@ -1972,7 +1972,7 @@ static void slot_err_v2_hw(struct hisi_hba *hisi_hba,
|
||||
}
|
||||
case DMA_RX_DATA_LEN_UNDERFLOW:
|
||||
{
|
||||
ts->residual = dma_rx_err_type;
|
||||
ts->residual = trans_tx_fail_type;
|
||||
ts->stat = SAS_DATA_UNDERRUN;
|
||||
break;
|
||||
}
|
||||
@ -2098,7 +2098,7 @@ static void slot_err_v2_hw(struct hisi_hba *hisi_hba,
|
||||
}
|
||||
case DMA_RX_DATA_LEN_UNDERFLOW:
|
||||
{
|
||||
ts->residual = dma_rx_err_type;
|
||||
ts->residual = trans_tx_fail_type;
|
||||
ts->stat = SAS_DATA_UNDERRUN;
|
||||
break;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user