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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-01 08:36:43 +07:00
iwl3945: add load ucode op
The patch adds 3945 iwl_lib_ops->load_ucode to the driver. Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Kolekar, Abhijeet
John W. Linville
parent
775a6e27bf
commit
0164b9b45d
@ -2506,12 +2506,170 @@ void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv)
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cancel_delayed_work(&priv->thermal_periodic);
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}
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/* check contents of special bootstrap uCode SRAM */
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static int iwl3945_verify_bsm(struct iwl_priv *priv)
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{
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__le32 *image = priv->ucode_boot.v_addr;
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u32 len = priv->ucode_boot.len;
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u32 reg;
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u32 val;
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IWL_DEBUG_INFO("Begin verify bsm\n");
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/* verify BSM SRAM contents */
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val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
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for (reg = BSM_SRAM_LOWER_BOUND;
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reg < BSM_SRAM_LOWER_BOUND + len;
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reg += sizeof(u32), image++) {
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val = iwl_read_prph(priv, reg);
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if (val != le32_to_cpu(*image)) {
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IWL_ERR(priv, "BSM uCode verification failed at "
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"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
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BSM_SRAM_LOWER_BOUND,
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reg - BSM_SRAM_LOWER_BOUND, len,
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val, le32_to_cpu(*image));
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return -EIO;
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}
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}
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IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
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return 0;
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}
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/**
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* iwl3945_load_bsm - Load bootstrap instructions
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*
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* BSM operation:
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*
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* The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
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* in special SRAM that does not power down during RFKILL. When powering back
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* up after power-saving sleeps (or during initial uCode load), the BSM loads
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* the bootstrap program into the on-board processor, and starts it.
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*
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* The bootstrap program loads (via DMA) instructions and data for a new
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* program from host DRAM locations indicated by the host driver in the
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* BSM_DRAM_* registers. Once the new program is loaded, it starts
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* automatically.
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*
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* When initializing the NIC, the host driver points the BSM to the
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* "initialize" uCode image. This uCode sets up some internal data, then
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* notifies host via "initialize alive" that it is complete.
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*
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* The host then replaces the BSM_DRAM_* pointer values to point to the
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* normal runtime uCode instructions and a backup uCode data cache buffer
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* (filled initially with starting data values for the on-board processor),
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* then triggers the "initialize" uCode to load and launch the runtime uCode,
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* which begins normal operation.
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*
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* When doing a power-save shutdown, runtime uCode saves data SRAM into
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* the backup data cache in DRAM before SRAM is powered down.
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*
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* When powering back up, the BSM loads the bootstrap program. This reloads
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* the runtime uCode instructions and the backup data cache into SRAM,
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* and re-launches the runtime uCode from where it left off.
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*/
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static int iwl3945_load_bsm(struct iwl_priv *priv)
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{
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__le32 *image = priv->ucode_boot.v_addr;
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u32 len = priv->ucode_boot.len;
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dma_addr_t pinst;
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dma_addr_t pdata;
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u32 inst_len;
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u32 data_len;
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int rc;
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int i;
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u32 done;
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u32 reg_offset;
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IWL_DEBUG_INFO("Begin load bsm\n");
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/* make sure bootstrap program is no larger than BSM's SRAM size */
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if (len > IWL39_MAX_BSM_SIZE)
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return -EINVAL;
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/* Tell bootstrap uCode where to find the "Initialize" uCode
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* in host DRAM ... host DRAM physical address bits 31:0 for 3945.
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* NOTE: iwl3945_initialize_alive_start() will replace these values,
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* after the "initialize" uCode has run, to point to
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* runtime/protocol instructions and backup data cache. */
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pinst = priv->ucode_init.p_addr;
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pdata = priv->ucode_init_data.p_addr;
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inst_len = priv->ucode_init.len;
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data_len = priv->ucode_init_data.len;
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rc = iwl_grab_nic_access(priv);
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if (rc)
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return rc;
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iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
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iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
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iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
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iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
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/* Fill BSM memory with bootstrap instructions */
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for (reg_offset = BSM_SRAM_LOWER_BOUND;
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reg_offset < BSM_SRAM_LOWER_BOUND + len;
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reg_offset += sizeof(u32), image++)
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_iwl_write_prph(priv, reg_offset,
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le32_to_cpu(*image));
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rc = iwl3945_verify_bsm(priv);
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if (rc) {
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iwl_release_nic_access(priv);
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return rc;
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}
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/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
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iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
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iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
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IWL39_RTC_INST_LOWER_BOUND);
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iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
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/* Load bootstrap code into instruction SRAM now,
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* to prepare to load "initialize" uCode */
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iwl_write_prph(priv, BSM_WR_CTRL_REG,
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BSM_WR_CTRL_REG_BIT_START);
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/* Wait for load of bootstrap uCode to finish */
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for (i = 0; i < 100; i++) {
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done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
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if (!(done & BSM_WR_CTRL_REG_BIT_START))
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break;
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udelay(10);
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}
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if (i < 100)
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IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
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else {
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IWL_ERR(priv, "BSM write did not complete!\n");
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return -EIO;
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}
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/* Enable future boot loads whenever power management unit triggers it
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* (e.g. when powering back up after power-save shutdown) */
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iwl_write_prph(priv, BSM_WR_CTRL_REG,
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BSM_WR_CTRL_REG_BIT_START_EN);
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iwl_release_nic_access(priv);
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return 0;
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}
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static struct iwl_lib_ops iwl3945_lib = {
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.load_ucode = iwl3945_load_bsm,
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};
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static struct iwl_ops iwl3945_ops = {
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.lib = &iwl3945_lib,
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};
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static struct iwl_cfg iwl3945_bg_cfg = {
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.name = "3945BG",
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.fw_name_pre = IWL3945_FW_PRE,
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.ucode_api_max = IWL3945_UCODE_API_MAX,
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.ucode_api_min = IWL3945_UCODE_API_MIN,
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.sku = IWL_SKU_G,
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.ops = &iwl3945_ops,
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.mod_params = &iwl3945_mod_params
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};
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@ -2521,6 +2679,7 @@ static struct iwl_cfg iwl3945_abg_cfg = {
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.ucode_api_max = IWL3945_UCODE_API_MAX,
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.ucode_api_min = IWL3945_UCODE_API_MIN,
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.sku = IWL_SKU_A|IWL_SKU_G,
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.ops = &iwl3945_ops,
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.mod_params = &iwl3945_mod_params
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};
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@ -4924,156 +4924,6 @@ static int iwl3945_verify_ucode(struct iwl_priv *priv)
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return rc;
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}
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/* check contents of special bootstrap uCode SRAM */
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static int iwl3945_verify_bsm(struct iwl_priv *priv)
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{
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__le32 *image = priv->ucode_boot.v_addr;
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u32 len = priv->ucode_boot.len;
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u32 reg;
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u32 val;
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IWL_DEBUG_INFO("Begin verify bsm\n");
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/* verify BSM SRAM contents */
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val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
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for (reg = BSM_SRAM_LOWER_BOUND;
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reg < BSM_SRAM_LOWER_BOUND + len;
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reg += sizeof(u32), image++) {
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val = iwl_read_prph(priv, reg);
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if (val != le32_to_cpu(*image)) {
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IWL_ERR(priv, "BSM uCode verification failed at "
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"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
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BSM_SRAM_LOWER_BOUND,
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reg - BSM_SRAM_LOWER_BOUND, len,
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val, le32_to_cpu(*image));
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return -EIO;
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}
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}
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IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
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return 0;
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}
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/**
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* iwl3945_load_bsm - Load bootstrap instructions
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*
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* BSM operation:
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*
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* The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
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* in special SRAM that does not power down during RFKILL. When powering back
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* up after power-saving sleeps (or during initial uCode load), the BSM loads
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* the bootstrap program into the on-board processor, and starts it.
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*
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* The bootstrap program loads (via DMA) instructions and data for a new
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* program from host DRAM locations indicated by the host driver in the
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* BSM_DRAM_* registers. Once the new program is loaded, it starts
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* automatically.
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*
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* When initializing the NIC, the host driver points the BSM to the
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* "initialize" uCode image. This uCode sets up some internal data, then
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* notifies host via "initialize alive" that it is complete.
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*
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* The host then replaces the BSM_DRAM_* pointer values to point to the
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* normal runtime uCode instructions and a backup uCode data cache buffer
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* (filled initially with starting data values for the on-board processor),
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* then triggers the "initialize" uCode to load and launch the runtime uCode,
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* which begins normal operation.
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*
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* When doing a power-save shutdown, runtime uCode saves data SRAM into
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* the backup data cache in DRAM before SRAM is powered down.
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*
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* When powering back up, the BSM loads the bootstrap program. This reloads
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* the runtime uCode instructions and the backup data cache into SRAM,
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* and re-launches the runtime uCode from where it left off.
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*/
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static int iwl3945_load_bsm(struct iwl_priv *priv)
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{
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__le32 *image = priv->ucode_boot.v_addr;
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u32 len = priv->ucode_boot.len;
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dma_addr_t pinst;
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dma_addr_t pdata;
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u32 inst_len;
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u32 data_len;
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int rc;
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int i;
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u32 done;
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u32 reg_offset;
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IWL_DEBUG_INFO("Begin load bsm\n");
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/* make sure bootstrap program is no larger than BSM's SRAM size */
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if (len > IWL39_MAX_BSM_SIZE)
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return -EINVAL;
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/* Tell bootstrap uCode where to find the "Initialize" uCode
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* in host DRAM ... host DRAM physical address bits 31:0 for 3945.
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* NOTE: iwl3945_initialize_alive_start() will replace these values,
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* after the "initialize" uCode has run, to point to
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* runtime/protocol instructions and backup data cache. */
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pinst = priv->ucode_init.p_addr;
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pdata = priv->ucode_init_data.p_addr;
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inst_len = priv->ucode_init.len;
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data_len = priv->ucode_init_data.len;
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rc = iwl_grab_nic_access(priv);
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if (rc)
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return rc;
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iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
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iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
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iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
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iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
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/* Fill BSM memory with bootstrap instructions */
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for (reg_offset = BSM_SRAM_LOWER_BOUND;
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reg_offset < BSM_SRAM_LOWER_BOUND + len;
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reg_offset += sizeof(u32), image++)
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_iwl_write_prph(priv, reg_offset,
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le32_to_cpu(*image));
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rc = iwl3945_verify_bsm(priv);
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if (rc) {
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iwl_release_nic_access(priv);
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return rc;
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}
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/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
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iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
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iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
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IWL39_RTC_INST_LOWER_BOUND);
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iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
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/* Load bootstrap code into instruction SRAM now,
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* to prepare to load "initialize" uCode */
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iwl_write_prph(priv, BSM_WR_CTRL_REG,
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BSM_WR_CTRL_REG_BIT_START);
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/* Wait for load of bootstrap uCode to finish */
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for (i = 0; i < 100; i++) {
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done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
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if (!(done & BSM_WR_CTRL_REG_BIT_START))
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break;
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udelay(10);
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}
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if (i < 100)
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IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
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else {
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IWL_ERR(priv, "BSM write did not complete!\n");
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return -EIO;
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}
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/* Enable future boot loads whenever power management unit triggers it
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* (e.g. when powering back up after power-save shutdown) */
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iwl_write_prph(priv, BSM_WR_CTRL_REG,
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BSM_WR_CTRL_REG_BIT_START_EN);
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iwl_release_nic_access(priv);
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return 0;
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}
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static void iwl3945_nic_start(struct iwl_priv *priv)
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{
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/* Remove all resets to allow NIC to operate */
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@ -5714,7 +5564,7 @@ static int __iwl3945_up(struct iwl_priv *priv)
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/* load bootstrap state machine,
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* load bootstrap program into processor's memory,
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* prepare to load the "initialize" uCode */
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rc = iwl3945_load_bsm(priv);
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priv->cfg->ops->lib->load_ucode(priv);
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if (rc) {
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IWL_ERR(priv,
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