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arm/tegra: generalize L2 cache initialization

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Generalize L2 cache initialization and discover L2 cache associativity at
runtime.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Peter De Schrijver 2011-12-14 17:03:20 +02:00 committed by Olof Johansson
parent 9bfc3f0d48
commit 01548673fa
1 changed files with 10 additions and 5 deletions
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15
arch/arm/mach-tegra/common.c
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@ -75,15 +75,20 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
};
#endif
static void __init tegra_init_cache(void)
static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
{
#ifdef CONFIG_CACHE_L2X0
void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
u32 aux_ctrl, cache_type;
writel_relaxed(0x331, p + L2X0_TAG_LATENCY_CTRL);
writel_relaxed(0x441, p + L2X0_DATA_LATENCY_CTRL);
writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
l2x0_init(p, 0x6C080001, 0x8200c3fe);
cache_type = readl(p + L2X0_CACHE_TYPE);
aux_ctrl = (cache_type & 0x700) << (17-8);
aux_ctrl |= 0x6C000001;
l2x0_init(p, aux_ctrl, 0x8200c3fe);
#endif
}
@ -94,6 +99,6 @@ void __init tegra20_init_early(void)
tegra_init_fuse();
tegra2_init_clocks();
tegra_clk_init_from_table(tegra20_clk_init_table);
tegra_init_cache();
tegra_init_cache(0x331, 0x441);
}
#endif