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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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staging: rtl8192u: fix newlines in r819xU_phy.c
This patch fixes the newlines by: - adding a newline after variables declarations. - removing the newlines following the return statement. - removing the newlines between function header comments and function definitions. - adding one newline between function definitions. - adding a newline at the end of RT_TRACE messages. This was done to improve code's and logmessages' readability. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Xenia Ragiadakou
Greg Kroah-Hartman
parent
fbd8833666
commit
0081fcc646
@ -47,9 +47,11 @@ static u32 RF_CHANNEL_TABLE_ZEBRA[] = {
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u32 rtl8192_CalculateBitShift(u32 bitmask)
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{
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u32 i;
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i = ffs(bitmask) - 1;
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return i;
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}
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/******************************************************************************
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* function: This function checks different RF type to execute legal judgement.
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* If RF Path is illegal, we will return false.
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@ -62,6 +64,7 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 eRFPath)
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{
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u8 ret = 1;
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struct r8192_priv *priv = ieee80211_priv(dev);
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if (priv->rf_type == RF_2T4R) {
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ret = 0;
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} else if (priv->rf_type == RF_1T2R) {
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@ -72,6 +75,7 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 eRFPath)
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}
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return ret;
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}
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/******************************************************************************
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* function: This function sets specific bits to BB register
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* input: net_device *dev
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@ -99,6 +103,7 @@ void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, u32 bitmask,
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}
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return;
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}
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/******************************************************************************
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* function: This function reads specific bits from BB register
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* input: net_device *dev
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@ -117,6 +122,7 @@ u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask)
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return (reg & bitmask) >> bitshift;
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}
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static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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u32 offset);
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@ -145,6 +151,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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u32 ret = 0;
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u32 new_offset = 0;
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BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
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rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0);
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/* Make sure RF register offset is correct */
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offset &= 0x3f;
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@ -200,7 +207,6 @@ u32 rtl8192_phy_RFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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}
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return ret;
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}
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/******************************************************************************
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@ -359,6 +365,7 @@ u32 rtl8192_phy_QueryRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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return reg;
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}
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}
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/******************************************************************************
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* function: We support firmware to execute RF-R/W.
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* input: net_device *dev
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@ -375,6 +382,7 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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u32 data = 0;
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u8 time = 0;
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u32 tmp;
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/* Firmware RF Write control.
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* We can not execute the scheme in the initial step.
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* Otherwise, RF-R/W will waste much time.
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@ -416,7 +424,6 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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read_nic_dword(dev, RF_DATA, ®);
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return reg;
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}
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/******************************************************************************
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@ -468,10 +475,8 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
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/* According to test, we must delay 20us to wait firmware
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to finish RF write operation. */
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/* We support delay in firmware side now. */
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}
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/******************************************************************************
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* function: This function reads BB parameters from header file we generate,
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* and do register read/write
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@ -509,7 +514,6 @@ void rtl8192_phy_configmac(struct net_device *dev)
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pdwArray[i+2]);
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}
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return;
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}
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/******************************************************************************
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@ -521,13 +525,13 @@ void rtl8192_phy_configmac(struct net_device *dev)
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* notice: BB parameters may change all the time, so please make
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* sure it has been synced with the newest.
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*****************************************************************************/
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void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType)
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{
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u32 i;
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#ifdef TO_DO_LIST
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u32 *rtl8192PhyRegArrayTable = NULL, *rtl8192AgcTabArrayTable = NULL;
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if (Adapter->bInHctTest) {
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PHY_REGArrayLen = PHY_REGArrayLengthDTM;
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AGCTAB_ArrayLen = AGCTAB_ArrayLengthDTM;
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@ -556,9 +560,8 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType)
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}
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}
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return;
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}
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/******************************************************************************
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* function: This function initializes Register definition offset for
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* Radio Path A/B/C/D
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@ -571,6 +574,7 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType)
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void rtl8192_InitBBRFRegDef(struct net_device *dev)
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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/* RF Interface Software Control */
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/* 16 LSBs if read 32-bit from 0x870 */
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priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW;
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@ -692,8 +696,8 @@ void rtl8192_InitBBRFRegDef(struct net_device *dev)
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priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
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priv->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
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priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
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}
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/******************************************************************************
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* function: This function is to write register and then readback to make
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* sure whether BB and RF is OK
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@ -712,6 +716,7 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock,
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u32 i, CheckTimes = 4, reg = 0;
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u32 WriteAddr[4];
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u32 WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
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/* Initialize register address offset to be checked */
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WriteAddr[HW90_BLOCK_MAC] = 0x100;
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WriteAddr[HW90_BLOCK_PHY0] = 0x900;
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@ -724,7 +729,7 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock,
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switch (CheckBlock) {
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case HW90_BLOCK_MAC:
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RT_TRACE(COMP_ERR,
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"PHY_CheckBBRFOK(): Never Write 0x100 here!");
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"PHY_CheckBBRFOK(): Never Write 0x100 here!\n");
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break;
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case HW90_BLOCK_PHY0:
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@ -767,7 +772,6 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock,
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return ret;
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}
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/******************************************************************************
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* function: This function initializes BB&RF
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* input: net_device *dev
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@ -781,6 +785,7 @@ void rtl8192_BB_Config_ParaFile(struct net_device *dev)
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struct r8192_priv *priv = ieee80211_priv(dev);
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u8 reg_u8 = 0, eCheckItem = 0, status = 0;
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u32 reg_u32 = 0;
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/**************************************
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* <1> Initialize BaseBand
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*************************************/
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@ -843,6 +848,7 @@ void rtl8192_BB_Config_ParaFile(struct net_device *dev)
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0x200);
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return;
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}
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/******************************************************************************
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* function: This function initializes BB&RF
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* input: net_device *dev
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@ -861,6 +867,7 @@ void rtl8192_BBConfig(struct net_device *dev)
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return;
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}
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/******************************************************************************
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* function: This function obtains the initialization value of Tx power Level
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* offset
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@ -872,6 +879,7 @@ void rtl8192_phy_getTxPower(struct net_device *dev)
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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u8 tmp;
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read_nic_dword(dev, rTxAGC_Rate18_06,
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&priv->MCSTxPowerLevelOriginalOffset[0]);
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read_nic_dword(dev, rTxAGC_Rate54_24,
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@ -1053,6 +1061,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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return ret;
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}
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/******************************************************************************
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* function: This function sets Tx Power of the channel
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* input: net_device *dev
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@ -1254,6 +1263,7 @@ u8 rtl8192_phy_SetSwChnlCmdArray(SwChnlCmd *CmdTable, u32 CmdTableIdx,
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return true;
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}
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/******************************************************************************
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* function: This function sets channel step by step
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* input: net_device *dev
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@ -1434,6 +1444,7 @@ void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel)
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break;
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}
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}
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/******************************************************************************
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* function: Callback routine of the work item for switch channel.
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* input: net_device *dev
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@ -1478,20 +1489,20 @@ u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel)
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case WIRELESS_MODE_A:
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case WIRELESS_MODE_N_5G:
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if (channel <= 14) {
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_A but channel<=14");
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_A but channel<=14\n");
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return false;
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}
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break;
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case WIRELESS_MODE_B:
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if (channel > 14) {
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_B but channel>14");
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_B but channel>14\n");
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return false;
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}
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break;
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case WIRELESS_MODE_G:
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case WIRELESS_MODE_N_24G:
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if (channel > 14) {
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_G but channel>14");
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RT_TRACE(COMP_ERR, "WIRELESS_MODE_G but channel>14\n");
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return false;
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}
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break;
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@ -1513,7 +1524,6 @@ u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel)
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return true;
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}
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/******************************************************************************
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* function: Callback routine of the work item for set bandwidth mode.
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* input: net_device *dev
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@ -1657,7 +1667,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
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}
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priv->SetBWModeInProgress = false;
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RT_TRACE(COMP_SWBW, "<==SetBWMode819xUsb(), %d",
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RT_TRACE(COMP_SWBW, "<==SetBWMode819xUsb(), %d\n",
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atomic_read(&priv->ieee80211->atm_swbw));
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}
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