mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 02:36:42 +07:00
Merge branch 'fbdev-next' of github.com:timur-tabi/linux-2.6 into for-linus
* 'fbdev-next' of github.com:timur-tabi/linux-2.6: drivers/video: fsl-diu-fb: store EDID data in the global object drivers/video: fsl-diu-fb: don't touch registers for unused features drivers/video: fsl-diu-fb: clean up reset of primary display drivers/video: fsl-diu-fb: remove unused 'cursor_reset' variable drivers/video: fsl-diu-fb: improve message displays drivers/video: fsl-diu-fb: streamline enabling of interrupts drivers/video: fsl-diu-fb: add support for set_gamma ioctls drivers/video: fsl-diu-fb: simplify platforms that have only one port MAINTAINERS: Make Timur Tabi the maintainer for the Freescale DIU driver
This commit is contained in:
Tomi Valkeinen
commit
0074120228
@ -3108,6 +3108,12 @@ F: drivers/video/
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F: include/video/
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F: include/linux/fb.h
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FREESCALE DIU FRAMEBUFFER DRIVER
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M: Timur Tabi <timur@freescale.com>
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L: linux-fbdev@vger.kernel.org
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S: Supported
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F: drivers/video/fsl-diu-fb.*
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FREESCALE DMA DRIVER
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M: Li Yang <leoli@freescale.com>
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M: Zhang Wei <zw@zh-kernel.org>
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@ -337,13 +337,11 @@ struct mfb_info {
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int registered;
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unsigned long pseudo_palette[16];
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struct diu_ad *ad;
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int cursor_reset;
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unsigned char g_alpha;
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unsigned int count;
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int x_aoi_d; /* aoi display x offset to physical screen */
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int y_aoi_d; /* aoi display y offset to physical screen */
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struct fsl_diu_data *parent;
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u8 *edid_data;
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};
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/**
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@ -378,6 +376,8 @@ struct fsl_diu_data {
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struct diu_ad ad[NUM_AOIS] __aligned(8);
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u8 gamma[256 * 3] __aligned(32);
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u8 cursor[MAX_CURS * MAX_CURS * 2] __aligned(32);
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uint8_t edid_data[EDID_LENGTH];
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bool has_edid;
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} __aligned(32);
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/* Determine the DMA address of a member of the fsl_diu_data structure */
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@ -430,6 +430,22 @@ static struct mfb_info mfb_template[] = {
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},
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};
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#ifdef DEBUG
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static void __attribute__ ((unused)) fsl_diu_dump(struct diu __iomem *hw)
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{
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mb();
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pr_debug("DIU: desc=%08x,%08x,%08x, gamma=%08x pallete=%08x "
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"cursor=%08x curs_pos=%08x diu_mode=%08x bgnd=%08x "
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"disp_size=%08x hsyn_para=%08x vsyn_para=%08x syn_pol=%08x "
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"thresholds=%08x int_mask=%08x plut=%08x\n",
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hw->desc[0], hw->desc[1], hw->desc[2], hw->gamma,
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hw->pallete, hw->cursor, hw->curs_pos, hw->diu_mode,
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hw->bgnd, hw->disp_size, hw->hsyn_para, hw->vsyn_para,
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hw->syn_pol, hw->thresholds, hw->int_mask, hw->plut);
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rmb();
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}
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#endif
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/**
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* fsl_diu_name_to_port - convert a port name to a monitor port enum
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*
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@ -481,8 +497,7 @@ static void fsl_diu_enable_panel(struct fb_info *info)
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switch (mfbi->index) {
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case PLANE0:
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if (hw->desc[0] != ad->paddr)
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wr_reg_wa(&hw->desc[0], ad->paddr);
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wr_reg_wa(&hw->desc[0], ad->paddr);
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break;
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case PLANE1_AOI0:
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cmfbi = &data->mfb[2];
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@ -534,8 +549,7 @@ static void fsl_diu_disable_panel(struct fb_info *info)
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switch (mfbi->index) {
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case PLANE0:
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if (hw->desc[0] != data->dummy_ad.paddr)
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wr_reg_wa(&hw->desc[0], data->dummy_ad.paddr);
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wr_reg_wa(&hw->desc[0], 0);
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break;
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case PLANE1_AOI0:
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cmfbi = &data->mfb[2];
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@ -792,7 +806,8 @@ static void update_lcdc(struct fb_info *info)
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hw = data->diu_reg;
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diu_ops.set_monitor_port(data->monitor_port);
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if (diu_ops.set_monitor_port)
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diu_ops.set_monitor_port(data->monitor_port);
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gamma_table_base = data->gamma;
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/* Prep for DIU init - gamma table, cursor table */
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@ -811,12 +826,8 @@ static void update_lcdc(struct fb_info *info)
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out_be32(&hw->gamma, DMA_ADDR(data, gamma));
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out_be32(&hw->cursor, DMA_ADDR(data, cursor));
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out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
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out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
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out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
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/* DISP SIZE */
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out_be32(&hw->wb_size, 0); /* WB SIZE */
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out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
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out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */
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out_be32(&hw->disp_size, (var->yres << 16) | var->xres);
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/* Horizontal and vertical configuration register */
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temp = var->left_margin << 22 | /* BP_H */
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@ -833,9 +844,20 @@ static void update_lcdc(struct fb_info *info)
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diu_ops.set_pixel_clock(var->pixclock);
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out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
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out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
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#ifndef CONFIG_PPC_MPC512x
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/*
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* The PLUT register is defined differently on the MPC5121 than it
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* is on other SOCs. Unfortunately, there's no documentation that
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* explains how it's supposed to be programmed, so for now, we leave
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* it at the default value on the MPC5121.
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*
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* For other SOCs, program it for the highest priority, which will
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* reduce the chance of underrun. Technically, we should scale the
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* priority to match the screen resolution, but doing that properly
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* requires delicate fine-tuning for each use-case.
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*/
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out_be32(&hw->plut, 0x01F5F666);
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#endif
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/* Enable the DIU */
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enable_lcdc(info);
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@ -965,7 +987,6 @@ static int fsl_diu_set_par(struct fb_info *info)
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hw = data->diu_reg;
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set_fix(info);
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mfbi->cursor_reset = 1;
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len = info->var.yres_virtual * info->fix.line_length;
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/* Alloc & dealloc each time resolution/bpp change */
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@ -1107,6 +1128,12 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
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if (!arg)
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return -EINVAL;
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dev_dbg(info->dev, "ioctl %08x (dir=%s%s type=%u nr=%u size=%u)\n", cmd,
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_IOC_DIR(cmd) & _IOC_READ ? "R" : "",
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_IOC_DIR(cmd) & _IOC_WRITE ? "W" : "",
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_IOC_TYPE(cmd), _IOC_NR(cmd), _IOC_SIZE(cmd));
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switch (cmd) {
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case MFB_SET_PIXFMT_OLD:
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dev_warn(info->dev,
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@ -1180,6 +1207,23 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
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ad->ckmin_b = ck.blue_min;
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}
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break;
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#ifdef CONFIG_PPC_MPC512x
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case MFB_SET_GAMMA: {
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struct fsl_diu_data *data = mfbi->parent;
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if (copy_from_user(data->gamma, buf, sizeof(data->gamma)))
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return -EFAULT;
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setbits32(&data->diu_reg->gamma, 0); /* Force table reload */
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break;
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}
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case MFB_GET_GAMMA: {
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struct fsl_diu_data *data = mfbi->parent;
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if (copy_to_user(buf, data->gamma, sizeof(data->gamma)))
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return -EFAULT;
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break;
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}
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#endif
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default:
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dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
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return -ENOIOCTLCMD;
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@ -1206,8 +1250,22 @@ static int fsl_diu_open(struct fb_info *info, int user)
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res = fsl_diu_set_par(info);
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if (res < 0)
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mfbi->count--;
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else
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else {
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struct fsl_diu_data *data = mfbi->parent;
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#ifdef CONFIG_NOT_COHERENT_CACHE
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/*
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* Enable underrun detection and vertical sync
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* interrupts.
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*/
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clrbits32(&data->diu_reg->int_mask,
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INT_UNDRUN | INT_VSYNC);
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#else
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/* Enable underrun detection */
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clrbits32(&data->diu_reg->int_mask, INT_UNDRUN);
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#endif
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fsl_diu_enable_panel(info);
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}
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}
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spin_unlock(&diu_lock);
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@ -1223,8 +1281,13 @@ static int fsl_diu_release(struct fb_info *info, int user)
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spin_lock(&diu_lock);
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mfbi->count--;
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if (mfbi->count == 0)
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if (mfbi->count == 0) {
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struct fsl_diu_data *data = mfbi->parent;
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/* Disable interrupts */
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out_be32(&data->diu_reg->int_mask, 0xffffffff);
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fsl_diu_disable_panel(info);
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}
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spin_unlock(&diu_lock);
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return res;
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@ -1248,6 +1311,7 @@ static int __devinit install_fb(struct fb_info *info)
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{
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int rc;
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struct mfb_info *mfbi = info->par;
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struct fsl_diu_data *data = mfbi->parent;
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const char *aoi_mode, *init_aoi_mode = "320x240";
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struct fb_videomode *db = fsl_diu_mode_db;
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unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
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@ -1264,9 +1328,9 @@ static int __devinit install_fb(struct fb_info *info)
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return rc;
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if (mfbi->index == PLANE0) {
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if (mfbi->edid_data) {
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if (data->has_edid) {
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/* Now build modedb from EDID */
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fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
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fb_edid_to_monspecs(data->edid_data, &info->monspecs);
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fb_videomode_to_modelist(info->monspecs.modedb,
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info->monspecs.modedb_len,
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&info->modelist);
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@ -1284,7 +1348,7 @@ static int __devinit install_fb(struct fb_info *info)
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* For plane 0 we continue and look into
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* driver's internal modedb.
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*/
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if ((mfbi->index == PLANE0) && mfbi->edid_data)
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if ((mfbi->index == PLANE0) && data->has_edid)
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has_default_mode = 0;
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else
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return -EINVAL;
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@ -1348,9 +1412,6 @@ static void uninstall_fb(struct fb_info *info)
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if (!mfbi->registered)
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return;
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if (mfbi->index == PLANE0)
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kfree(mfbi->edid_data);
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unregister_framebuffer(info);
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unmap_video_memory(info);
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if (&info->cmap)
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@ -1362,7 +1423,7 @@ static void uninstall_fb(struct fb_info *info)
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static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
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{
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struct diu __iomem *hw = dev_id;
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unsigned int status = in_be32(&hw->int_status);
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uint32_t status = in_be32(&hw->int_status);
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if (status) {
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/* This is the workaround for underrun */
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@ -1387,40 +1448,6 @@ static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
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return IRQ_NONE;
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}
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static int request_irq_local(struct fsl_diu_data *data)
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{
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struct diu __iomem *hw = data->diu_reg;
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u32 ints;
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int ret;
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/* Read to clear the status */
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in_be32(&hw->int_status);
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ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb", hw);
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if (!ret) {
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ints = INT_PARERR | INT_LS_BF_VS;
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#if !defined(CONFIG_NOT_COHERENT_CACHE)
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ints |= INT_VSYNC;
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#endif
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/* Read to clear the status */
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in_be32(&hw->int_status);
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out_be32(&hw->int_mask, ints);
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}
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return ret;
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}
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static void free_irq_local(struct fsl_diu_data *data)
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{
|
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struct diu __iomem *hw = data->diu_reg;
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|
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/* Disable all LCDC interrupt */
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out_be32(&hw->int_mask, 0x1f);
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free_irq(data->irq, NULL);
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}
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|
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#ifdef CONFIG_PM
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/*
|
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* Power management hooks. Note that we won't be called from IRQ context,
|
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@ -1496,8 +1523,8 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
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struct device_node *np = pdev->dev.of_node;
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struct mfb_info *mfbi;
|
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struct fsl_diu_data *data;
|
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int diu_mode;
|
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dma_addr_t dma_addr; /* DMA addr of fsl_diu_data struct */
|
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const void *prop;
|
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unsigned int i;
|
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int ret;
|
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|
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@ -1541,17 +1568,13 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
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memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
|
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mfbi->parent = data;
|
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mfbi->ad = &data->ad[i];
|
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}
|
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|
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if (mfbi->index == PLANE0) {
|
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const u8 *prop;
|
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int len;
|
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|
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/* Get EDID */
|
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prop = of_get_property(np, "edid", &len);
|
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if (prop && len == EDID_LENGTH)
|
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mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
|
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GFP_KERNEL);
|
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}
|
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/* Get the EDID data from the device tree, if present */
|
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prop = of_get_property(np, "edid", &ret);
|
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if (prop && ret == EDID_LENGTH) {
|
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memcpy(data->edid_data, prop, EDID_LENGTH);
|
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data->has_edid = true;
|
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}
|
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|
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data->diu_reg = of_iomap(np, 0);
|
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@ -1561,10 +1584,6 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
|
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goto error;
|
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}
|
||||
|
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diu_mode = in_be32(&data->diu_reg->diu_mode);
|
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if (diu_mode == MFB_MODE0)
|
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out_be32(&data->diu_reg->diu_mode, 0); /* disable DIU */
|
||||
|
||||
/* Get the IRQ of the DIU */
|
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data->irq = irq_of_parse_and_map(np, 0);
|
||||
|
||||
@ -1586,11 +1605,11 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
|
||||
data->dummy_ad.paddr = DMA_ADDR(data, dummy_ad);
|
||||
|
||||
/*
|
||||
* Let DIU display splash screen if it was pre-initialized
|
||||
* by the bootloader, set dummy area descriptor otherwise.
|
||||
* Let DIU continue to display splash screen if it was pre-initialized
|
||||
* by the bootloader; otherwise, clear the display.
|
||||
*/
|
||||
if (diu_mode == MFB_MODE0)
|
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out_be32(&data->diu_reg->desc[0], data->dummy_ad.paddr);
|
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if (in_be32(&data->diu_reg->diu_mode) == MFB_MODE0)
|
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out_be32(&data->diu_reg->desc[0], 0);
|
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|
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out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr);
|
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out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr);
|
||||
@ -1603,7 +1622,16 @@ static int __devinit fsl_diu_probe(struct platform_device *pdev)
|
||||
}
|
||||
}
|
||||
|
||||
if (request_irq_local(data)) {
|
||||
/*
|
||||
* Older versions of U-Boot leave interrupts enabled, so disable
|
||||
* all of them and clear the status register.
|
||||
*/
|
||||
out_be32(&data->diu_reg->int_mask, 0xffffffff);
|
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in_be32(&data->diu_reg->int_status);
|
||||
|
||||
ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb",
|
||||
&data->diu_reg);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "could not claim irq\n");
|
||||
goto error;
|
||||
}
|
||||
@ -1638,7 +1666,8 @@ static int fsl_diu_remove(struct platform_device *pdev)
|
||||
|
||||
data = dev_get_drvdata(&pdev->dev);
|
||||
disable_lcdc(&data->fsl_diu_info[0]);
|
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free_irq_local(data);
|
||||
|
||||
free_irq(data->irq, &data->diu_reg);
|
||||
|
||||
for (i = 0; i < NUM_AOIS; i++)
|
||||
uninstall_fb(&data->fsl_diu_info[i]);
|
||||
@ -1741,6 +1770,9 @@ static int __init fsl_diu_init(void)
|
||||
coherence_data_size = be32_to_cpup(prop) * 13;
|
||||
coherence_data_size /= 8;
|
||||
|
||||
pr_debug("fsl-diu-fb: coherence data size is %zu bytes\n",
|
||||
coherence_data_size);
|
||||
|
||||
prop = of_get_property(np, "d-cache-line-size", NULL);
|
||||
if (prop == NULL) {
|
||||
pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
|
||||
@ -1750,10 +1782,17 @@ static int __init fsl_diu_init(void)
|
||||
}
|
||||
d_cache_line_size = be32_to_cpup(prop);
|
||||
|
||||
pr_debug("fsl-diu-fb: cache lines size is %u bytes\n",
|
||||
d_cache_line_size);
|
||||
|
||||
of_node_put(np);
|
||||
coherence_data = vmalloc(coherence_data_size);
|
||||
if (!coherence_data)
|
||||
if (!coherence_data) {
|
||||
pr_err("fsl-diu-fb: could not allocate coherence data "
|
||||
"(size=%zu)\n", coherence_data_size);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
ret = platform_driver_register(&fsl_diu_driver);
|
||||
|
||||
@ -46,6 +46,15 @@ struct aoi_display_offset {
|
||||
#define MFB_SET_PIXFMT _IOW('M', 8, __u32)
|
||||
#define MFB_GET_PIXFMT _IOR('M', 8, __u32)
|
||||
|
||||
/*
|
||||
* The MPC5121 BSP comes with a gamma_set utility that initializes the
|
||||
* gamma table. Unfortunately, it uses bad values for the IOCTL commands,
|
||||
* but there's nothing we can do about it now. These ioctls are only
|
||||
* supported on the MPC5121.
|
||||
*/
|
||||
#define MFB_SET_GAMMA _IOW('M', 1, __u8)
|
||||
#define MFB_GET_GAMMA _IOR('M', 1, __u8)
|
||||
|
||||
/*
|
||||
* The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the
|
||||
* wrong value for 'size' field of the ioctl. The current macros above use the
|
||||
|
||||
Loading…
Reference in New Issue
Block a user