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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: dts: rockchip: add veyron-fievel board
Also known as AOpen Chromebox Mini. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Matthias Kaehlcke
Heiko Stuebner
parent
c6855f7bb6
commit
0067692b66
@ -919,6 +919,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-tinker.dtb \
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rk3288-tinker-s.dtb \
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rk3288-veyron-brain.dtb \
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rk3288-veyron-fievel.dtb \
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rk3288-veyron-jaq.dtb \
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rk3288-veyron-jerry.dtb \
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rk3288-veyron-mickey.dtb \
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298
arch/arm/boot/dts/rk3288-veyron-fievel.dts
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298
arch/arm/boot/dts/rk3288-veyron-fievel.dts
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@ -0,0 +1,298 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Veyron Fievel Rev 0+ board device tree source
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*
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* Copyright 2016 Google, Inc
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*/
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/dts-v1/;
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#include "rk3288-veyron.dtsi"
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#include "rk3288-veyron-analog-audio.dtsi"
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/ {
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model = "Google Fievel";
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compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
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"google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
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"google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
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"google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
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"google,veyron-fievel-rev0", "google,veyron-fievel",
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"google,veyron", "rockchip,rk3288";
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/delete-node/ bt-activity;
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ext_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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};
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/*
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* vcc33_pmuio and vcc33_io is sourced directly from vcc33_sys,
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* enabled by vcc_18
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*/
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vcc33_io: vcc33-io {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc33_io";
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};
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vcc5_host1: vcc5-host1-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio5 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hub_usb1_pwr_en>;
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regulator-name = "vcc5_host1";
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regulator-always-on;
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regulator-boot-on;
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};
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vcc5_host2: vcc5-host2-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio5 RK_PC2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hub_usb2_pwr_en>;
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regulator-name = "vcc5_host2";
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regulator-always-on;
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regulator-boot-on;
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};
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vcc5v_otg: vcc5v-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_otg_pwr_en>;
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regulator-name = "vcc5_otg";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&gmac {
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status = "okay";
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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clock_in_out = "input";
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phy-handle = <ðphy>;
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phy-mode = "rgmii";
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phy-supply = <&vcc33_lan>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
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resets = <&cru SRST_MAC>;
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reset-names = "stmmaceth";
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rx_delay = <0x10>;
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tx_delay = <0x30>;
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/* Reset for the RTL8211 PHY which requires a 10-ms reset pulse (low)
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* with a 30ms settling time. */
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snps,reset-gpio = <&gpio4 RK_PB0 0>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 30000>;
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wakeup-source;
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mdio0 {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&rk808 {
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dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
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<&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
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vcc6-supply = <&vcc33_sys>;
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vcc10-supply = <&vcc33_sys>;
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vcc11-supply = <&vcc_5v>;
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vcc12-supply = <&vcc33_sys>;
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regulators {
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/delete-node/ LDO_REG1;
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/* According to the schematic, vcc18_lcdt is for
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* HDMI_AVDD_1V8
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*/
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vcc18_lcdt: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vdd18_lcdt";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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/* This is not a pwren anymore, but the real power supply,
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* vdd10_lcd for HDMI_AVDD_1V0
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*/
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vdd10_lcd: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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/* for usb camera */
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vcc33_ccd: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_ccd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc33_lan: SWITCH_REG2 {
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regulator-name = "vcc33_lan";
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};
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};
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};
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&sdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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btmrvl: btmrvl@2 {
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compatible = "marvell,sd8897-bt";
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reg = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <RK_PD7 IRQ_TYPE_LEVEL_LOW>;
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marvell,wakeup-pin = /bits/ 16 <13>;
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pinctrl-names = "default";
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pinctrl-0 = <&bt_host_wake>;
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};
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc50_hdmi_en>;
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};
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&vcc_5v {
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enable-active-high;
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gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&drv_5v>;
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};
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&pinctrl {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <
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/* Common for sleep and wake, but no owners */
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&ddr0_retention
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&ddrio_pwroff
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&global_pwroff
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/* Wake only */
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&bt_dev_wake_awake
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&pwr_led1_on
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/* For usb bc1.2 */
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&usb_otg_ilim_sel
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&usb_usb_ilim_sel
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>;
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pinctrl-1 = <
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/* Common for sleep and wake, but no owners */
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&ddr0_retention
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&ddrio_pwroff
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&global_pwroff
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/* Sleep only */
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&bt_dev_wake_sleep
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&pwr_led1_blink
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>;
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buck-5v {
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drv_5v: drv-5v {
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rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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gmac {
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phy_rst: phy-rst {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
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};
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phy_pmeb: phy-pmeb {
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rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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phy_int: phy-int {
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rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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hdmi {
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vcc50_hdmi_en: vcc50-hdmi-en {
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rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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leds {
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pwr_led1_on: pwr-led1-on {
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rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_output_low>;
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};
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pwr_led1_blink: pwr-led1-blink {
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rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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usb-bc12 {
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usb_otg_ilim_sel: usb-otg-ilim-sel {
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rockchip,pins = <6 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
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};
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usb_usb_ilim_sel: usb-usb-ilim-sel {
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rockchip,pins = <5 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
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};
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};
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usb-host {
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hub_usb1_pwr_en: hub_usb1_pwr_en {
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rockchip,pins = <5 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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hub_usb2_pwr_en: hub_usb2_pwr_en {
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rockchip,pins = <5 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usb_otg_pwr_en: usb_otg_pwr_en {
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rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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