2015-04-21 03:55:21 +07:00
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/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "atom.h"
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#include <linux/slab.h>
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#include <linux/acpi.h>
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/*
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* BIOS.
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*/
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2015-10-29 14:33:06 +07:00
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#define AMD_VBIOS_SIGNATURE " 761295520"
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#define AMD_VBIOS_SIGNATURE_OFFSET 0x30
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#define AMD_VBIOS_SIGNATURE_SIZE sizeof(AMD_VBIOS_SIGNATURE)
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#define AMD_VBIOS_SIGNATURE_END (AMD_VBIOS_SIGNATURE_OFFSET + AMD_VBIOS_SIGNATURE_SIZE)
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#define AMD_IS_VALID_VBIOS(p) ((p)[0] == 0x55 && (p)[1] == 0xAA)
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#define AMD_VBIOS_LENGTH(p) ((p)[2] << 9)
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2015-04-21 03:55:21 +07:00
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/* If you boot an IGP board with a discrete card as the primary,
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* the IGP rom is not accessible via the rom bar as the IGP rom is
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* part of the system bios. On boot, the system bios puts a
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* copy of the igp rom at the start of vram if a discrete card is
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* present.
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*/
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static bool igp_read_bios_from_vram(struct amdgpu_device *adev)
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{
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uint8_t __iomem *bios;
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resource_size_t vram_base;
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resource_size_t size = 256 * 1024; /* ??? */
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2015-07-22 10:29:01 +07:00
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if (!(adev->flags & AMD_IS_APU))
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2015-04-21 03:55:21 +07:00
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if (!amdgpu_card_posted(adev))
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return false;
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adev->bios = NULL;
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vram_base = pci_resource_start(adev->pdev, 0);
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bios = ioremap(vram_base, size);
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if (!bios) {
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return false;
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}
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2015-10-29 14:33:06 +07:00
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if (size == 0 || !AMD_IS_VALID_VBIOS(bios)) {
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2015-04-21 03:55:21 +07:00
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iounmap(bios);
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return false;
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}
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adev->bios = kmalloc(size, GFP_KERNEL);
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2016-11-08 12:49:42 +07:00
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if (!adev->bios) {
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2015-04-21 03:55:21 +07:00
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iounmap(bios);
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return false;
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}
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memcpy_fromio(adev->bios, bios, size);
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iounmap(bios);
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return true;
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}
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bool amdgpu_read_bios(struct amdgpu_device *adev)
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{
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2015-10-29 14:33:06 +07:00
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uint8_t __iomem *bios, val[2];
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2015-04-21 03:55:21 +07:00
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size_t size;
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adev->bios = NULL;
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/* XXX: some cards may return 0 for rom size? ddx has a workaround */
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bios = pci_map_rom(adev->pdev, &size);
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if (!bios) {
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return false;
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}
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2015-10-29 14:33:06 +07:00
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val[0] = readb(&bios[0]);
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val[1] = readb(&bios[1]);
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2015-04-17 21:50:02 +07:00
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2015-10-29 14:33:06 +07:00
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if (size == 0 || !AMD_IS_VALID_VBIOS(val)) {
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2015-04-21 03:55:21 +07:00
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pci_unmap_rom(adev->pdev, bios);
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return false;
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}
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2015-04-17 21:50:02 +07:00
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adev->bios = kzalloc(size, GFP_KERNEL);
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2015-04-21 03:55:21 +07:00
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if (adev->bios == NULL) {
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pci_unmap_rom(adev->pdev, bios);
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return false;
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}
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2015-04-17 21:50:02 +07:00
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memcpy_fromio(adev->bios, bios, size);
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2015-04-21 03:55:21 +07:00
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pci_unmap_rom(adev->pdev, bios);
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return true;
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}
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2015-10-29 14:33:06 +07:00
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static bool amdgpu_read_bios_from_rom(struct amdgpu_device *adev)
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{
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u8 header[AMD_VBIOS_SIGNATURE_END+1] = {0};
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int len;
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if (!adev->asic_funcs->read_bios_from_rom)
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return false;
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/* validate VBIOS signature */
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if (amdgpu_asic_read_bios_from_rom(adev, &header[0], sizeof(header)) == false)
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return false;
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header[AMD_VBIOS_SIGNATURE_END] = 0;
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if ((!AMD_IS_VALID_VBIOS(header)) ||
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0 != memcmp((char *)&header[AMD_VBIOS_SIGNATURE_OFFSET],
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AMD_VBIOS_SIGNATURE,
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strlen(AMD_VBIOS_SIGNATURE)))
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return false;
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/* valid vbios, go on */
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len = AMD_VBIOS_LENGTH(header);
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len = ALIGN(len, 4);
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adev->bios = kmalloc(len, GFP_KERNEL);
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if (!adev->bios) {
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DRM_ERROR("no memory to allocate for BIOS\n");
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return false;
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}
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/* read complete BIOS */
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return amdgpu_asic_read_bios_from_rom(adev, adev->bios, len);
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}
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2015-04-21 03:55:21 +07:00
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static bool amdgpu_read_platform_bios(struct amdgpu_device *adev)
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{
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uint8_t __iomem *bios;
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size_t size;
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adev->bios = NULL;
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bios = pci_platform_rom(adev->pdev, &size);
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if (!bios) {
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return false;
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}
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2015-10-29 14:33:06 +07:00
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if (size == 0 || !AMD_IS_VALID_VBIOS(bios)) {
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2015-04-21 03:55:21 +07:00
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return false;
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}
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adev->bios = kmemdup(bios, size, GFP_KERNEL);
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if (adev->bios == NULL) {
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return false;
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}
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return true;
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}
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#ifdef CONFIG_ACPI
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/* ATRM is used to get the BIOS on the discrete cards in
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* dual-gpu systems.
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*/
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/* retrieve the ROM in 4k blocks */
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#define ATRM_BIOS_PAGE 4096
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/**
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* amdgpu_atrm_call - fetch a chunk of the vbios
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*
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* @atrm_handle: acpi ATRM handle
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* @bios: vbios image pointer
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* @offset: offset of vbios image data to fetch
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* @len: length of vbios image data to fetch
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*
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* Executes ATRM to fetch a chunk of the discrete
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* vbios image on PX systems (all asics).
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* Returns the length of the buffer fetched.
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*/
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static int amdgpu_atrm_call(acpi_handle atrm_handle, uint8_t *bios,
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int offset, int len)
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{
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acpi_status status;
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union acpi_object atrm_arg_elements[2], *obj;
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struct acpi_object_list atrm_arg;
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struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL};
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atrm_arg.count = 2;
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atrm_arg.pointer = &atrm_arg_elements[0];
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atrm_arg_elements[0].type = ACPI_TYPE_INTEGER;
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atrm_arg_elements[0].integer.value = offset;
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atrm_arg_elements[1].type = ACPI_TYPE_INTEGER;
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atrm_arg_elements[1].integer.value = len;
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status = acpi_evaluate_object(atrm_handle, NULL, &atrm_arg, &buffer);
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if (ACPI_FAILURE(status)) {
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printk("failed to evaluate ATRM got %s\n", acpi_format_exception(status));
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return -ENODEV;
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}
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obj = (union acpi_object *)buffer.pointer;
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memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length);
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len = obj->buffer.length;
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kfree(buffer.pointer);
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return len;
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}
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static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
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{
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int ret;
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int size = 256 * 1024;
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int i;
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struct pci_dev *pdev = NULL;
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acpi_handle dhandle, atrm_handle;
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acpi_status status;
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bool found = false;
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/* ATRM is for the discrete card only */
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2015-07-22 10:29:01 +07:00
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if (adev->flags & AMD_IS_APU)
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2015-04-21 03:55:21 +07:00
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return false;
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
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if (!ACPI_FAILURE(status)) {
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found = true;
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break;
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}
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}
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if (!found) {
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
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if (!ACPI_FAILURE(status)) {
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found = true;
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break;
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}
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}
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}
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if (!found)
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return false;
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adev->bios = kmalloc(size, GFP_KERNEL);
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if (!adev->bios) {
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DRM_ERROR("Unable to allocate bios\n");
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return false;
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}
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for (i = 0; i < size / ATRM_BIOS_PAGE; i++) {
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ret = amdgpu_atrm_call(atrm_handle,
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adev->bios,
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(i * ATRM_BIOS_PAGE),
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ATRM_BIOS_PAGE);
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if (ret < ATRM_BIOS_PAGE)
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break;
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}
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2015-10-29 14:33:06 +07:00
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if (i == 0 || !AMD_IS_VALID_VBIOS(adev->bios)) {
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2015-04-21 03:55:21 +07:00
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kfree(adev->bios);
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return false;
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}
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return true;
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}
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#else
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static inline bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
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{
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return false;
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}
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#endif
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static bool amdgpu_read_disabled_bios(struct amdgpu_device *adev)
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{
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2015-07-22 10:29:01 +07:00
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if (adev->flags & AMD_IS_APU)
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2015-04-21 03:55:21 +07:00
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return igp_read_bios_from_vram(adev);
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else
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return amdgpu_asic_read_disabled_bios(adev);
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}
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#ifdef CONFIG_ACPI
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static bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev)
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{
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bool ret = false;
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struct acpi_table_header *hdr;
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acpi_size tbl_size;
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UEFI_ACPI_VFCT *vfct;
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GOP_VBIOS_CONTENT *vbios;
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VFCT_IMAGE_HEADER *vhdr;
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if (!ACPI_SUCCESS(acpi_get_table_with_size("VFCT", 1, &hdr, &tbl_size)))
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return false;
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if (tbl_size < sizeof(UEFI_ACPI_VFCT)) {
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DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n");
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goto out_unmap;
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}
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vfct = (UEFI_ACPI_VFCT *)hdr;
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if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) > tbl_size) {
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DRM_ERROR("ACPI VFCT table present but broken (too short #2)\n");
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goto out_unmap;
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}
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vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + vfct->VBIOSImageOffset);
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vhdr = &vbios->VbiosHeader;
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DRM_INFO("ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d\n",
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vhdr->PCIBus, vhdr->PCIDevice, vhdr->PCIFunction,
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vhdr->VendorID, vhdr->DeviceID, vhdr->ImageLength);
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if (vhdr->PCIBus != adev->pdev->bus->number ||
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vhdr->PCIDevice != PCI_SLOT(adev->pdev->devfn) ||
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vhdr->PCIFunction != PCI_FUNC(adev->pdev->devfn) ||
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vhdr->VendorID != adev->pdev->vendor ||
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vhdr->DeviceID != adev->pdev->device) {
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DRM_INFO("ACPI VFCT table is not for this card\n");
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goto out_unmap;
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}
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if (vfct->VBIOSImageOffset + sizeof(VFCT_IMAGE_HEADER) + vhdr->ImageLength > tbl_size) {
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DRM_ERROR("ACPI VFCT image truncated\n");
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goto out_unmap;
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}
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adev->bios = kmemdup(&vbios->VbiosContent, vhdr->ImageLength, GFP_KERNEL);
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ret = !!adev->bios;
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out_unmap:
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return ret;
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}
|
|
|
|
#else
|
|
|
|
static inline bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev)
|
|
|
|
{
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
bool amdgpu_get_bios(struct amdgpu_device *adev)
|
|
|
|
{
|
|
|
|
bool r;
|
2016-03-19 22:12:13 +07:00
|
|
|
uint16_t tmp, bios_header_start;
|
2015-04-21 03:55:21 +07:00
|
|
|
|
|
|
|
r = amdgpu_atrm_get_bios(adev);
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r)
|
2015-04-21 03:55:21 +07:00
|
|
|
r = amdgpu_acpi_vfct_bios(adev);
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r)
|
2015-04-21 03:55:21 +07:00
|
|
|
r = igp_read_bios_from_vram(adev);
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r)
|
2015-04-21 03:55:21 +07:00
|
|
|
r = amdgpu_read_bios(adev);
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r) {
|
2015-10-29 14:33:06 +07:00
|
|
|
r = amdgpu_read_bios_from_rom(adev);
|
|
|
|
}
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r) {
|
2015-04-21 03:55:21 +07:00
|
|
|
r = amdgpu_read_disabled_bios(adev);
|
|
|
|
}
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r) {
|
2015-04-21 03:55:21 +07:00
|
|
|
r = amdgpu_read_platform_bios(adev);
|
|
|
|
}
|
2016-07-12 07:17:53 +07:00
|
|
|
if (!r || adev->bios == NULL) {
|
2015-04-21 03:55:21 +07:00
|
|
|
DRM_ERROR("Unable to locate a BIOS ROM\n");
|
|
|
|
adev->bios = NULL;
|
|
|
|
return false;
|
|
|
|
}
|
2015-10-29 14:33:06 +07:00
|
|
|
if (!AMD_IS_VALID_VBIOS(adev->bios)) {
|
2015-04-21 03:55:21 +07:00
|
|
|
printk("BIOS signature incorrect %x %x\n", adev->bios[0], adev->bios[1]);
|
|
|
|
goto free_bios;
|
|
|
|
}
|
|
|
|
|
|
|
|
tmp = RBIOS16(0x18);
|
|
|
|
if (RBIOS8(tmp + 0x14) != 0x0) {
|
|
|
|
DRM_INFO("Not an x86 BIOS ROM, not using.\n");
|
|
|
|
goto free_bios;
|
|
|
|
}
|
|
|
|
|
2016-03-19 22:12:13 +07:00
|
|
|
bios_header_start = RBIOS16(0x48);
|
|
|
|
if (!bios_header_start) {
|
2015-04-21 03:55:21 +07:00
|
|
|
goto free_bios;
|
|
|
|
}
|
2016-03-19 22:12:13 +07:00
|
|
|
tmp = bios_header_start + 4;
|
2015-04-21 03:55:21 +07:00
|
|
|
if (!memcmp(adev->bios + tmp, "ATOM", 4) ||
|
|
|
|
!memcmp(adev->bios + tmp, "MOTA", 4)) {
|
|
|
|
adev->is_atom_bios = true;
|
|
|
|
} else {
|
|
|
|
adev->is_atom_bios = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
DRM_DEBUG("%sBIOS detected\n", adev->is_atom_bios ? "ATOM" : "COM");
|
|
|
|
return true;
|
|
|
|
free_bios:
|
|
|
|
kfree(adev->bios);
|
|
|
|
adev->bios = NULL;
|
|
|
|
return false;
|
|
|
|
}
|