2009-12-12 07:16:33 +07:00
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/*
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* linux/arch/arm/mach-omap1/lcd_dma.c
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*
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* Extracted from arch/arm/plat-omap/dma.c
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* Copyright (C) 2003 - 2008 Nokia Corporation
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* Author: Juha Yrjölä <juha.yrjola@nokia.com>
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* DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
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* Graphics DMA and LCD DMA graphics tranformations
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* by Imre Deak <imre.deak@nokia.com>
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* OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
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* Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
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* Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
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*
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* Copyright (C) 2009 Texas Instruments
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* Support functions for the OMAP internal DMA channels.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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2012-02-25 01:34:34 +07:00
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#include <plat/dma.h>
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2009-12-12 07:16:33 +07:00
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#include <mach/hardware.h>
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2009-12-12 07:16:36 +07:00
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#include <mach/lcdc.h>
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2009-12-12 07:16:33 +07:00
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int omap_lcd_dma_running(void)
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{
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/*
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* On OMAP1510, internal LCD controller will start the transfer
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* when it gets enabled, so assume DMA running if LCD enabled.
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*/
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx())
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2009-12-12 07:16:36 +07:00
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if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
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2009-12-12 07:16:33 +07:00
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return 1;
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/* Check if LCD DMA is running */
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if (cpu_is_omap16xx())
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if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
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return 1;
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return 0;
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}
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static struct lcd_dma_info {
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spinlock_t lock;
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int reserved;
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void (*callback)(u16 status, void *data);
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void *cb_data;
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int active;
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unsigned long addr, size;
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int rotate, data_type, xres, yres;
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int vxres;
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int mirror;
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int xscale, yscale;
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int ext_ctrl;
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int src_port;
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int single_transfer;
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} lcd_dma;
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void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
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int data_type)
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{
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lcd_dma.addr = addr;
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lcd_dma.data_type = data_type;
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lcd_dma.xres = fb_xres;
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lcd_dma.yres = fb_yres;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_b1);
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void omap_set_lcd_dma_src_port(int port)
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{
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lcd_dma.src_port = port;
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}
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void omap_set_lcd_dma_ext_controller(int external)
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{
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lcd_dma.ext_ctrl = external;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
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void omap_set_lcd_dma_single_transfer(int single)
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{
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lcd_dma.single_transfer = single;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
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void omap_set_lcd_dma_b1_rotation(int rotate)
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{
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx()) {
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2009-12-12 07:16:33 +07:00
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printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
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BUG();
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return;
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}
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lcd_dma.rotate = rotate;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
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void omap_set_lcd_dma_b1_mirror(int mirror)
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{
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx()) {
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2009-12-12 07:16:33 +07:00
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printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
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BUG();
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}
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lcd_dma.mirror = mirror;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
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void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
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{
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx()) {
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2012-02-06 21:16:44 +07:00
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printk(KERN_ERR "DMA virtual resolution is not supported "
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2009-12-12 07:16:33 +07:00
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"in 1510 mode\n");
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BUG();
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}
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lcd_dma.vxres = vxres;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
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void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
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{
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx()) {
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2009-12-12 07:16:33 +07:00
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printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
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BUG();
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}
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lcd_dma.xscale = xscale;
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lcd_dma.yscale = yscale;
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}
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EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
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static void set_b1_regs(void)
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{
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unsigned long top, bottom;
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int es;
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u16 w;
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unsigned long en, fn;
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long ei, fi;
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unsigned long vxres;
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unsigned int xscale, yscale;
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switch (lcd_dma.data_type) {
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case OMAP_DMA_DATA_TYPE_S8:
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es = 1;
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break;
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case OMAP_DMA_DATA_TYPE_S16:
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es = 2;
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break;
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case OMAP_DMA_DATA_TYPE_S32:
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es = 4;
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break;
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default:
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BUG();
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return;
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}
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vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
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xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
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yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
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BUG_ON(vxres < lcd_dma.xres);
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#define PIXADDR(x, y) (lcd_dma.addr + \
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((y) * vxres * yscale + (x) * xscale) * es)
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#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
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switch (lcd_dma.rotate) {
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case 0:
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if (!lcd_dma.mirror) {
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top = PIXADDR(0, 0);
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bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
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/* 1510 DMA requires the bottom address to be 2 more
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* than the actual last memory access location. */
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx() &&
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2009-12-12 07:16:33 +07:00
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lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
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bottom += 2;
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ei = PIXSTEP(0, 0, 1, 0);
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fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
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} else {
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top = PIXADDR(lcd_dma.xres - 1, 0);
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bottom = PIXADDR(0, lcd_dma.yres - 1);
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ei = PIXSTEP(1, 0, 0, 0);
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fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
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}
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en = lcd_dma.xres;
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fn = lcd_dma.yres;
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break;
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case 90:
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if (!lcd_dma.mirror) {
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top = PIXADDR(0, lcd_dma.yres - 1);
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bottom = PIXADDR(lcd_dma.xres - 1, 0);
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ei = PIXSTEP(0, 1, 0, 0);
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fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
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} else {
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top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
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bottom = PIXADDR(0, 0);
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ei = PIXSTEP(0, 1, 0, 0);
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fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
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}
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en = lcd_dma.yres;
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fn = lcd_dma.xres;
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break;
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case 180:
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if (!lcd_dma.mirror) {
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top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
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bottom = PIXADDR(0, 0);
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ei = PIXSTEP(1, 0, 0, 0);
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fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
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} else {
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top = PIXADDR(0, lcd_dma.yres - 1);
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bottom = PIXADDR(lcd_dma.xres - 1, 0);
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ei = PIXSTEP(0, 0, 1, 0);
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fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
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}
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en = lcd_dma.xres;
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fn = lcd_dma.yres;
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break;
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case 270:
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if (!lcd_dma.mirror) {
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top = PIXADDR(lcd_dma.xres - 1, 0);
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bottom = PIXADDR(0, lcd_dma.yres - 1);
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ei = PIXSTEP(0, 0, 0, 1);
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fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
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} else {
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top = PIXADDR(0, 0);
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bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
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ei = PIXSTEP(0, 0, 0, 1);
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fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
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}
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en = lcd_dma.yres;
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fn = lcd_dma.xres;
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break;
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default:
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BUG();
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return; /* Suppress warning about uninitialized vars */
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}
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2011-02-03 03:13:50 +07:00
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if (cpu_is_omap15xx()) {
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2009-12-12 07:16:33 +07:00
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omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
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omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
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omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
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omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
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return;
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}
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/* 1610 regs */
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omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
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omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
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omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
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omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
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omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
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omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
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w = omap_readw(OMAP1610_DMA_LCD_CSDP);
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w &= ~0x03;
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w |= lcd_dma.data_type;
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omap_writew(w, OMAP1610_DMA_LCD_CSDP);
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w = omap_readw(OMAP1610_DMA_LCD_CTRL);
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/* Always set the source port as SDRAM for now*/
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w &= ~(0x03 << 6);
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if (lcd_dma.callback != NULL)
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w |= 1 << 1; /* Block interrupt enable */
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else
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w &= ~(1 << 1);
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omap_writew(w, OMAP1610_DMA_LCD_CTRL);
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if (!(lcd_dma.rotate || lcd_dma.mirror ||
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lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
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return;
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w = omap_readw(OMAP1610_DMA_LCD_CCR);
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/* Set the double-indexed addressing mode */
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w |= (0x03 << 12);
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omap_writew(w, OMAP1610_DMA_LCD_CCR);
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omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
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omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
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omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
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}
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static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
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{
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u16 w;
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w = omap_readw(OMAP1610_DMA_LCD_CTRL);
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if (unlikely(!(w & (1 << 3)))) {
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printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
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return IRQ_NONE;
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}
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/* Ack the IRQ */
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w |= (1 << 3);
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omap_writew(w, OMAP1610_DMA_LCD_CTRL);
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lcd_dma.active = 0;
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if (lcd_dma.callback != NULL)
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lcd_dma.callback(w, lcd_dma.cb_data);
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return IRQ_HANDLED;
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}
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int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
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void *data)
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{
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spin_lock_irq(&lcd_dma.lock);
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if (lcd_dma.reserved) {
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spin_unlock_irq(&lcd_dma.lock);
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printk(KERN_ERR "LCD DMA channel already reserved\n");
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BUG();
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return -EBUSY;
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}
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lcd_dma.reserved = 1;
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spin_unlock_irq(&lcd_dma.lock);
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lcd_dma.callback = callback;
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lcd_dma.cb_data = data;
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lcd_dma.active = 0;
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lcd_dma.single_transfer = 0;
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lcd_dma.rotate = 0;
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lcd_dma.vxres = 0;
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lcd_dma.mirror = 0;
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lcd_dma.xscale = 0;
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lcd_dma.yscale = 0;
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|
|
|
lcd_dma.ext_ctrl = 0;
|
|
|
|
lcd_dma.src_port = 0;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_request_lcd_dma);
|
|
|
|
|
|
|
|
void omap_free_lcd_dma(void)
|
|
|
|
{
|
|
|
|
spin_lock(&lcd_dma.lock);
|
|
|
|
if (!lcd_dma.reserved) {
|
|
|
|
spin_unlock(&lcd_dma.lock);
|
|
|
|
printk(KERN_ERR "LCD DMA is not reserved\n");
|
|
|
|
BUG();
|
|
|
|
return;
|
|
|
|
}
|
2011-02-03 03:13:50 +07:00
|
|
|
if (!cpu_is_omap15xx())
|
2009-12-12 07:16:33 +07:00
|
|
|
omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
|
|
|
|
OMAP1610_DMA_LCD_CCR);
|
|
|
|
lcd_dma.reserved = 0;
|
|
|
|
spin_unlock(&lcd_dma.lock);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_free_lcd_dma);
|
|
|
|
|
|
|
|
void omap_enable_lcd_dma(void)
|
|
|
|
{
|
|
|
|
u16 w;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the Enable bit only if an external controller is
|
|
|
|
* connected. Otherwise the OMAP internal controller will
|
|
|
|
* start the transfer when it gets enabled.
|
|
|
|
*/
|
2011-02-03 03:13:50 +07:00
|
|
|
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
|
2009-12-12 07:16:33 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
|
|
|
|
w |= 1 << 8;
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CTRL);
|
|
|
|
|
|
|
|
lcd_dma.active = 1;
|
|
|
|
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CCR);
|
|
|
|
w |= 1 << 7;
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CCR);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_enable_lcd_dma);
|
|
|
|
|
|
|
|
void omap_setup_lcd_dma(void)
|
|
|
|
{
|
|
|
|
BUG_ON(lcd_dma.active);
|
2011-02-03 03:13:50 +07:00
|
|
|
if (!cpu_is_omap15xx()) {
|
2009-12-12 07:16:33 +07:00
|
|
|
/* Set some reasonable defaults */
|
|
|
|
omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
|
|
|
|
omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
|
|
|
|
omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
|
|
|
|
}
|
|
|
|
set_b1_regs();
|
2011-02-03 03:13:50 +07:00
|
|
|
if (!cpu_is_omap15xx()) {
|
2009-12-12 07:16:33 +07:00
|
|
|
u16 w;
|
|
|
|
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CCR);
|
|
|
|
/*
|
|
|
|
* If DMA was already active set the end_prog bit to have
|
|
|
|
* the programmed register set loaded into the active
|
|
|
|
* register set.
|
|
|
|
*/
|
|
|
|
w |= 1 << 11; /* End_prog */
|
|
|
|
if (!lcd_dma.single_transfer)
|
|
|
|
w |= (3 << 8); /* Auto_init, repeat */
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CCR);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_setup_lcd_dma);
|
|
|
|
|
|
|
|
void omap_stop_lcd_dma(void)
|
|
|
|
{
|
|
|
|
u16 w;
|
|
|
|
|
|
|
|
lcd_dma.active = 0;
|
2011-02-03 03:13:50 +07:00
|
|
|
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
|
2009-12-12 07:16:33 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CCR);
|
|
|
|
w &= ~(1 << 7);
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CCR);
|
|
|
|
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
|
|
|
|
w &= ~(1 << 8);
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CTRL);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_stop_lcd_dma);
|
|
|
|
|
|
|
|
static int __init omap_init_lcd_dma(void)
|
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
2010-12-11 00:46:24 +07:00
|
|
|
if (!cpu_class_is_omap1())
|
|
|
|
return -ENODEV;
|
|
|
|
|
2009-12-12 07:16:33 +07:00
|
|
|
if (cpu_is_omap16xx()) {
|
|
|
|
u16 w;
|
|
|
|
|
|
|
|
/* this would prevent OMAP sleep */
|
|
|
|
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
|
|
|
|
w &= ~(1 << 8);
|
|
|
|
omap_writew(w, OMAP1610_DMA_LCD_CTRL);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_init(&lcd_dma.lock);
|
|
|
|
|
|
|
|
r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
|
|
|
|
"LCD DMA", NULL);
|
|
|
|
if (r != 0)
|
|
|
|
printk(KERN_ERR "unable to request IRQ for LCD DMA "
|
|
|
|
"(error %d)\n", r);
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
arch_initcall(omap_init_lcd_dma);
|
|
|
|
|