2016-06-30 23:45:34 +07:00
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/*
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* Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Zhi Wang <zhi.a.wang@intel.com>
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*
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* Contributors:
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* Changbin Du <changbin.du@intel.com>
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*
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*/
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#include <linux/firmware.h>
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#include <linux/crc32.h>
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#include "i915_drv.h"
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2016-10-20 16:15:03 +07:00
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#include "gvt.h"
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#include "i915_pvinfo.h"
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2016-06-30 23:45:34 +07:00
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#define FIRMWARE_VERSION (0x0)
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struct gvt_firmware_header {
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u64 magic;
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u32 crc32; /* protect the data after this field */
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u32 version;
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u64 cfg_space_size;
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u64 cfg_space_offset; /* offset in the file */
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u64 mmio_size;
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u64 mmio_offset; /* offset in the file */
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unsigned char data[1];
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};
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#define dev_to_drm_minor(d) dev_get_drvdata((d))
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static ssize_t
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gvt_firmware_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf,
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loff_t offset, size_t count)
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{
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memcpy(buf, attr->private + offset, count);
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return count;
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}
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static struct bin_attribute firmware_attr = {
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.attr = {.name = "gvt_firmware", .mode = (S_IRUSR)},
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.read = gvt_firmware_read,
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.write = NULL,
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.mmap = NULL,
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};
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2017-10-23 10:46:43 +07:00
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static int mmio_snapshot_handler(struct intel_gvt *gvt, u32 offset, void *data)
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2016-06-30 23:45:34 +07:00
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{
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2016-12-27 13:49:14 +07:00
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struct drm_i915_private *dev_priv = gvt->dev_priv;
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2017-10-23 10:46:43 +07:00
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*(u32 *)(data + offset) = I915_READ_NOTRACE(_MMIO(offset));
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return 0;
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}
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static int expose_firmware_sysfs(struct intel_gvt *gvt)
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{
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2016-06-30 23:45:34 +07:00
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struct intel_gvt_device_info *info = &gvt->device_info;
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struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
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struct gvt_firmware_header *h;
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void *firmware;
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void *p;
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2017-03-31 23:00:53 +07:00
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unsigned long size, crc32_start;
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2017-10-23 10:46:43 +07:00
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int i, ret;
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2016-06-30 23:45:34 +07:00
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2017-03-31 23:00:53 +07:00
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size = sizeof(*h) + info->mmio_size + info->cfg_space_size;
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2017-02-21 13:00:37 +07:00
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firmware = vzalloc(size);
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2016-06-30 23:45:34 +07:00
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if (!firmware)
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return -ENOMEM;
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h = firmware;
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h->magic = VGT_MAGIC;
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h->version = FIRMWARE_VERSION;
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h->cfg_space_size = info->cfg_space_size;
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h->cfg_space_offset = offsetof(struct gvt_firmware_header, data);
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h->mmio_size = info->mmio_size;
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h->mmio_offset = h->cfg_space_offset + h->cfg_space_size;
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p = firmware + h->cfg_space_offset;
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for (i = 0; i < h->cfg_space_size; i += 4)
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pci_read_config_dword(pdev, i, p + i);
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memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size);
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p = firmware + h->mmio_offset;
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2017-10-23 10:46:43 +07:00
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/* Take a snapshot of hw mmio registers. */
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intel_gvt_for_each_tracked_mmio(gvt, mmio_snapshot_handler, p);
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2017-08-04 16:39:41 +07:00
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2016-06-30 23:45:34 +07:00
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memcpy(gvt->firmware.mmio, p, info->mmio_size);
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2017-03-31 23:00:53 +07:00
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crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
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h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start);
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2016-06-30 23:45:34 +07:00
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firmware_attr.size = size;
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firmware_attr.private = firmware;
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ret = device_create_bin_file(&pdev->dev, &firmware_attr);
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if (ret) {
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vfree(firmware);
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return ret;
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}
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return 0;
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}
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static void clean_firmware_sysfs(struct intel_gvt *gvt)
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{
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struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
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device_remove_bin_file(&pdev->dev, &firmware_attr);
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vfree(firmware_attr.private);
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}
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/**
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* intel_gvt_free_firmware - free GVT firmware
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* @gvt: intel gvt device
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*
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*/
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void intel_gvt_free_firmware(struct intel_gvt *gvt)
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{
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if (!gvt->firmware.firmware_loaded)
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clean_firmware_sysfs(gvt);
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kfree(gvt->firmware.cfg_space);
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kfree(gvt->firmware.mmio);
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}
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static int verify_firmware(struct intel_gvt *gvt,
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const struct firmware *fw)
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{
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struct intel_gvt_device_info *info = &gvt->device_info;
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struct drm_i915_private *dev_priv = gvt->dev_priv;
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struct pci_dev *pdev = dev_priv->drm.pdev;
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struct gvt_firmware_header *h;
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unsigned long id, crc32_start;
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const void *mem;
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const char *item;
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u64 file, request;
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h = (struct gvt_firmware_header *)fw->data;
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crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
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mem = fw->data + crc32_start;
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#define VERIFY(s, a, b) do { \
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item = (s); file = (u64)(a); request = (u64)(b); \
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if ((a) != (b)) \
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goto invalid_firmware; \
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} while (0)
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VERIFY("magic number", h->magic, VGT_MAGIC);
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VERIFY("version", h->version, FIRMWARE_VERSION);
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VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start));
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VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size);
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VERIFY("mmio size", h->mmio_size, info->mmio_size);
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mem = (fw->data + h->cfg_space_offset);
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id = *(u16 *)(mem + PCI_VENDOR_ID);
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VERIFY("vender id", id, pdev->vendor);
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id = *(u16 *)(mem + PCI_DEVICE_ID);
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VERIFY("device id", id, pdev->device);
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id = *(u8 *)(mem + PCI_REVISION_ID);
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VERIFY("revision id", id, pdev->revision);
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#undef VERIFY
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return 0;
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invalid_firmware:
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gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
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item, file, request);
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return -EINVAL;
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}
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#define GVT_FIRMWARE_PATH "i915/gvt"
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/**
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* intel_gvt_load_firmware - load GVT firmware
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* @gvt: intel gvt device
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*
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*/
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int intel_gvt_load_firmware(struct intel_gvt *gvt)
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{
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struct intel_gvt_device_info *info = &gvt->device_info;
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struct drm_i915_private *dev_priv = gvt->dev_priv;
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struct pci_dev *pdev = dev_priv->drm.pdev;
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struct intel_gvt_firmware *firmware = &gvt->firmware;
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struct gvt_firmware_header *h;
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const struct firmware *fw;
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char *path;
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2016-10-20 13:08:46 +07:00
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void *mem;
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2016-06-30 23:45:34 +07:00
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int ret;
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path = kmalloc(PATH_MAX, GFP_KERNEL);
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if (!path)
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return -ENOMEM;
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mem = kmalloc(info->cfg_space_size, GFP_KERNEL);
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if (!mem) {
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kfree(path);
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return -ENOMEM;
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}
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firmware->cfg_space = mem;
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mem = kmalloc(info->mmio_size, GFP_KERNEL);
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if (!mem) {
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kfree(path);
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kfree(firmware->cfg_space);
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return -ENOMEM;
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}
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firmware->mmio = mem;
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2017-03-31 23:00:53 +07:00
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sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state",
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2016-06-30 23:45:34 +07:00
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GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
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pdev->revision);
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gvt_dbg_core("request hw state firmware %s...\n", path);
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ret = request_firmware(&fw, path, &dev_priv->drm.pdev->dev);
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kfree(path);
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if (ret)
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goto expose_firmware;
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gvt_dbg_core("success.\n");
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ret = verify_firmware(gvt, fw);
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if (ret)
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goto out_free_fw;
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gvt_dbg_core("verified.\n");
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h = (struct gvt_firmware_header *)fw->data;
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memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset,
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h->cfg_space_size);
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memcpy(firmware->mmio, fw->data + h->mmio_offset,
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h->mmio_size);
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release_firmware(fw);
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firmware->firmware_loaded = true;
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return 0;
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out_free_fw:
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release_firmware(fw);
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expose_firmware:
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2016-12-27 13:49:14 +07:00
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expose_firmware_sysfs(gvt);
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2016-06-30 23:45:34 +07:00
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return 0;
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}
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