2005-04-17 05:20:36 +07:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_PCI_H
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#define _ASM_PCI_H
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#include <linux/mm.h>
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#ifdef __KERNEL__
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/*
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* This file essentially defines the interface between board
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2013-01-22 18:59:30 +07:00
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* specific PCI code and MIPS common PCI code. Should potentially put
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2005-04-17 05:20:36 +07:00
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* into include/asm/pci.h file.
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*/
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#include <linux/ioport.h>
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2016-10-06 00:18:07 +07:00
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#include <linux/list.h>
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2012-05-04 15:50:13 +07:00
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#include <linux/of.h>
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2005-04-17 05:20:36 +07:00
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/*
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2013-01-22 18:59:30 +07:00
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* Each pci channel is a top-level PCI bus seem by CPU. A machine with
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2005-04-17 05:20:36 +07:00
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* multiple PCI channels may have multiple PCI host controllers or a
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* single controller supporting multiple channels.
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*/
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struct pci_controller {
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2016-10-06 00:18:07 +07:00
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struct list_head list;
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2005-04-17 05:20:36 +07:00
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struct pci_bus *bus;
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2012-05-04 15:50:13 +07:00
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struct device_node *of_node;
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2005-04-17 05:20:36 +07:00
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struct pci_ops *pci_ops;
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struct resource *mem_resource;
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unsigned long mem_offset;
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struct resource *io_resource;
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unsigned long io_offset;
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2006-12-07 21:35:43 +07:00
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unsigned long io_map_base;
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2015-01-19 16:19:20 +07:00
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struct resource *busn_resource;
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unsigned long busn_offset;
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2005-04-17 05:20:36 +07:00
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2016-10-06 00:18:08 +07:00
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#ifndef CONFIG_PCI_DOMAINS_GENERIC
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2005-04-17 05:20:36 +07:00
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unsigned int index;
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/* For compatibility with current (as of July 2003) pciutils
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and XFree86. Eventually will be removed. */
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unsigned int need_domain_info;
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2016-10-06 00:18:08 +07:00
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#endif
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2005-04-17 05:20:36 +07:00
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2005-10-20 13:59:11 +07:00
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/* Optional access methods for reading/writing the bus number
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of the PCI controller */
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int (*get_busno)(void);
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void (*set_busno)(int busno);
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2005-04-17 05:20:36 +07:00
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};
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/*
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* Used by boards to register their PCI busses before the actual scanning.
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*/
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extern void register_pci_controller(struct pci_controller *hose);
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/*
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* board supplied pci irq fixup routine
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*/
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2007-07-10 23:33:00 +07:00
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extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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2005-04-17 05:20:36 +07:00
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/* Can be used to override the logic in pci_scan_bus for skipping
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already-configured bus numbers - to be used for buggy BIOSes
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or architectures with incomplete PCI setup by the loader */
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2016-10-06 00:18:10 +07:00
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static inline unsigned int pcibios_assign_all_busses(void)
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{
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return 1;
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}
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2005-04-17 05:20:36 +07:00
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extern unsigned long PCIBIOS_MIN_IO;
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extern unsigned long PCIBIOS_MIN_MEM;
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#define PCIBIOS_MIN_CARDBUS_IO 0x4000
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extern void pcibios_set_master(struct pci_dev *dev);
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2008-12-10 00:58:46 +07:00
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#define HAVE_PCI_MMAP
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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2010-12-14 03:48:10 +07:00
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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2005-04-17 05:20:36 +07:00
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/*
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* Dynamic DMA mapping stuff.
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* MIPS has everything mapped statically.
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*/
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#include <linux/types.h>
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#include <linux/slab.h>
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2015-05-01 17:46:15 +07:00
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#include <linux/scatterlist.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/string.h>
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#include <asm/io.h>
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struct pci_dev;
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/*
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2014-08-30 09:06:28 +07:00
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* The PCI address space does equal the physical memory address space.
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* The networking and block device layers use this boolean for bounce
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* buffer decisions.
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2005-04-17 05:20:36 +07:00
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*/
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2014-08-30 09:06:28 +07:00
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#define PCI_DMA_BUS_IS_PHYS (1)
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2005-04-17 05:20:36 +07:00
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2016-10-06 00:18:08 +07:00
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#ifdef CONFIG_PCI_DOMAINS_GENERIC
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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return pci_domain_nr(bus);
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}
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static inline void set_pci_need_domain_info(struct pci_controller *hose,
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int need_domain_info)
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{
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/* nothing to do */
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}
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#elif defined(CONFIG_PCI_DOMAINS)
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2005-04-17 05:20:36 +07:00
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#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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struct pci_controller *hose = bus->sysdata;
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return hose->need_domain_info;
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}
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2016-10-06 00:18:08 +07:00
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static inline void set_pci_need_domain_info(struct pci_controller *hose,
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int need_domain_info)
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{
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hose->need_domain_info = need_domain_info;
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}
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2014-12-12 19:45:39 +07:00
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#endif /* CONFIG_PCI_DOMAINS */
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2005-04-17 05:20:36 +07:00
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#endif /* __KERNEL__ */
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/* Do platform specific device initialization at pci_enable_device() time */
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extern int pcibios_plat_dev_init(struct pci_dev *dev);
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2006-12-09 23:12:18 +07:00
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/* Chances are this interrupt is wired PC-style ... */
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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return channel ? 15 : 14;
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}
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2008-07-23 22:25:14 +07:00
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extern char * (*pcibios_plat_setup)(char *str);
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2013-02-02 20:36:48 +07:00
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#ifdef CONFIG_OF
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2012-05-04 15:50:13 +07:00
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/* this function parses memory ranges from a device node */
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2012-12-22 05:04:39 +07:00
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extern void pci_load_of_ranges(struct pci_controller *hose,
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struct device_node *node);
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2013-02-02 20:36:48 +07:00
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#else
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static inline void pci_load_of_ranges(struct pci_controller *hose,
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struct device_node *node) {}
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#endif
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2012-05-04 15:50:13 +07:00
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2005-04-17 05:20:36 +07:00
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#endif /* _ASM_PCI_H */
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