2009-11-17 06:49:41 +07:00
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config BF51x
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def_bool y
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depends on (BF512 || BF514 || BF516 || BF518)
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2008-11-18 16:48:21 +07:00
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if (BF51x)
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source "arch/blackfin/mach-bf518/boards/Kconfig"
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menu "BF518 Specific Configuration"
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comment "Alternative Multiplexing Scheme"
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choice
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2011-06-30 03:29:41 +07:00
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prompt "PWM Channel Pins"
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default BF518_PWM_ALL_PORTF
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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Select pins used for the PWM channels:
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PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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See the Hardware Reference Manual for more details.
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config BF518_PWM_ALL_PORTF
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bool "PF1 - PF6"
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL}
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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config BF518_PWM_PORTF_PORTG
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bool "PF11 - PF14 / PG1 - PG2"
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL}
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PG{1,2} <-> PWM_{CH,CL}
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2008-11-18 16:48:21 +07:00
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endchoice
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choice
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2011-06-30 03:29:41 +07:00
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prompt "PWM Sync Pin"
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default BF518_PWM_SYNC_PF7
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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Select the pin used for PWM_SYNC.
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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See the Hardware Reference Manual for more details.
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config BF518_PWM_SYNC_PF7
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bool "PF7"
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config BF518_PWM_SYNC_PF15
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bool "PF15"
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endchoice
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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choice
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prompt "PWM Trip B Pin"
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default BF518_PWM_TRIPB_PG10
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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Select the pin used for PWM_TRIPB.
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See the Hardware Reference Manual for more details.
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config BF518_PWM_TRIPB_PG10
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bool "PG10"
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config BF518_PWM_TRIPB_PG14
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bool "PG14"
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2008-11-18 16:48:21 +07:00
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endchoice
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choice
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2011-06-30 03:29:41 +07:00
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prompt "PPI / Timer Pins"
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default BF518_PPI_TMR_PG5
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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Select pins used for PPI/Timer:
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PPICLK PPIFS1 PPIFS2
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TMRCLK TMR0 TMR1
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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See the Hardware Reference Manual for more details.
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config BF518_PPI_TMR_PG5
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bool "PG5 - PG7"
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
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2008-11-18 16:48:21 +07:00
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2011-06-30 03:29:41 +07:00
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config BF518_PPI_TMR_PG12
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bool "PG12 - PG14"
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2008-11-18 16:48:21 +07:00
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help
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2011-06-30 03:29:41 +07:00
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PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
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2008-11-18 16:48:21 +07:00
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endchoice
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2010-07-05 20:39:16 +07:00
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comment "Hysteresis/Schmitt Trigger Control"
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config BFIN_HYSTERESIS_CONTROL
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bool "Enable Hysteresis Control"
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help
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The ADSP-BF51x allows to control input hysteresis for Port F,
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Port G and Port H and other processor signal inputs.
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The Schmitt trigger enables can be set only for pin groups.
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Saying Y will overwrite the default reset or boot loader
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initialization.
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menu "PORT F"
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depends on BFIN_HYSTERESIS_CONTROL
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config GPIO_HYST_PORTF_0_7
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bool "Enable Hysteresis on PORTF {0...7}"
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config GPIO_HYST_PORTF_8_9
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bool "Enable Hysteresis on PORTF {8, 9}"
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config GPIO_HYST_PORTF_10
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bool "Enable Hysteresis on PORTF 10"
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config GPIO_HYST_PORTF_11
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bool "Enable Hysteresis on PORTF 11"
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config GPIO_HYST_PORTF_12_13
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bool "Enable Hysteresis on PORTF {12, 13}"
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config GPIO_HYST_PORTF_14_15
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bool "Enable Hysteresis on PORTF {14, 15}"
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endmenu
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menu "PORT G"
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depends on BFIN_HYSTERESIS_CONTROL
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config GPIO_HYST_PORTG_0
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bool "Enable Hysteresis on PORTG 0"
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config GPIO_HYST_PORTG_1_4
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bool "Enable Hysteresis on PORTG {1...4}"
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config GPIO_HYST_PORTG_5_6
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bool "Enable Hysteresis on PORTG {5, 6}"
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config GPIO_HYST_PORTG_7_8
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bool "Enable Hysteresis on PORTG {7, 8}"
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config GPIO_HYST_PORTG_9
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bool "Enable Hysteresis on PORTG 9"
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config GPIO_HYST_PORTG_10
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bool "Enable Hysteresis on PORTG 10"
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config GPIO_HYST_PORTG_11_13
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bool "Enable Hysteresis on PORTG {11...13}"
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config GPIO_HYST_PORTG_14_15
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bool "Enable Hysteresis on PORTG {14, 15}"
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endmenu
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menu "PORT H"
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depends on BFIN_HYSTERESIS_CONTROL
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config GPIO_HYST_PORTH_0_7
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bool "Enable Hysteresis on PORTH {0...7}"
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endmenu
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menu "None-GPIO"
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depends on BFIN_HYSTERESIS_CONTROL
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config NONEGPIO_HYST_NMI_RST_BMODE
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bool "Enable Hysteresis on {NMI, RESET, BMODE}"
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config NONEGPIO_HYST_JTAG
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bool "Enable Hysteresis on JTAG"
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endmenu
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2008-11-18 16:48:21 +07:00
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comment "Interrupt Priority Assignment"
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menu "Priority"
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config IRQ_PLL_WAKEUP
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int "IRQ_PLL_WAKEUP"
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default 7
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config IRQ_DMA0_ERROR
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int "IRQ_DMA0_ERROR"
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default 7
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config IRQ_DMAR0_BLK
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int "IRQ_DMAR0_BLK"
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default 7
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config IRQ_DMAR1_BLK
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int "IRQ_DMAR1_BLK"
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default 7
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config IRQ_DMAR0_OVR
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int "IRQ_DMAR0_OVR"
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default 7
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config IRQ_DMAR1_OVR
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int "IRQ_DMAR1_OVR"
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default 7
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config IRQ_PPI_ERROR
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int "IRQ_PPI_ERROR"
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default 7
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config IRQ_MAC_ERROR
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int "IRQ_MAC_ERROR"
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default 7
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config IRQ_SPORT0_ERROR
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int "IRQ_SPORT0_ERROR"
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default 7
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config IRQ_SPORT1_ERROR
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int "IRQ_SPORT1_ERROR"
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default 7
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config IRQ_PTP_ERROR
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int "IRQ_PTP_ERROR"
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default 7
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config IRQ_UART0_ERROR
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int "IRQ_UART0_ERROR"
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default 7
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config IRQ_UART1_ERROR
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int "IRQ_UART1_ERROR"
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default 7
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config IRQ_RTC
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int "IRQ_RTC"
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default 8
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config IRQ_PPI
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int "IRQ_PPI"
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default 8
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config IRQ_SPORT0_RX
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int "IRQ_SPORT0_RX"
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default 9
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config IRQ_SPORT0_TX
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int "IRQ_SPORT0_TX"
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default 9
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config IRQ_SPORT1_RX
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int "IRQ_SPORT1_RX"
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default 9
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config IRQ_SPORT1_TX
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int "IRQ_SPORT1_TX"
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default 9
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config IRQ_TWI
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int "IRQ_TWI"
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default 10
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config IRQ_SPI0
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int "IRQ_SPI"
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default 10
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config IRQ_UART0_RX
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int "IRQ_UART0_RX"
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default 10
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config IRQ_UART0_TX
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int "IRQ_UART0_TX"
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default 10
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config IRQ_UART1_RX
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int "IRQ_UART1_RX"
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default 10
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config IRQ_UART1_TX
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int "IRQ_UART1_TX"
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default 10
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config IRQ_OPTSEC
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int "IRQ_OPTSEC"
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default 11
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config IRQ_CNT
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int "IRQ_CNT"
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default 11
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config IRQ_MAC_RX
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int "IRQ_MAC_RX"
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default 11
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config IRQ_PORTH_INTA
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int "IRQ_PORTH_INTA"
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default 11
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config IRQ_MAC_TX
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int "IRQ_MAC_TX/NFC"
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default 11
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config IRQ_PORTH_INTB
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int "IRQ_PORTH_INTB"
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default 11
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER0
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int "IRQ_TIMER0"
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2009-05-15 18:01:59 +07:00
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default 7 if TICKSOURCE_GPTMR0
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2009-01-07 22:14:39 +07:00
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default 8
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config IRQ_TIMER1
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int "IRQ_TIMER1"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER2
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int "IRQ_TIMER2"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER3
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int "IRQ_TIMER3"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER4
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int "IRQ_TIMER4"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER5
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int "IRQ_TIMER5"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER6
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int "IRQ_TIMER6"
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2008-11-18 16:48:21 +07:00
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default 12
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2009-01-07 22:14:39 +07:00
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config IRQ_TIMER7
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int "IRQ_TIMER7"
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2008-11-18 16:48:21 +07:00
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default 12
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config IRQ_PORTG_INTA
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int "IRQ_PORTG_INTA"
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default 12
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config IRQ_PORTG_INTB
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int "IRQ_PORTG_INTB"
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default 12
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config IRQ_MEM_DMA0
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int "IRQ_MEM_DMA0"
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default 13
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config IRQ_MEM_DMA1
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int "IRQ_MEM_DMA1"
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default 13
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config IRQ_WATCH
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int "IRQ_WATCH"
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default 13
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config IRQ_PORTF_INTA
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int "IRQ_PORTF_INTA"
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default 13
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config IRQ_PORTF_INTB
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int "IRQ_PORTF_INTB"
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default 13
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config IRQ_SPI0_ERROR
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int "IRQ_SPI0_ERROR"
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default 7
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config IRQ_SPI1_ERROR
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int "IRQ_SPI1_ERROR"
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default 7
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config IRQ_RSI_INT0
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int "IRQ_RSI_INT0"
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default 7
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config IRQ_RSI_INT1
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int "IRQ_RSI_INT1"
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default 7
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config IRQ_PWM_TRIP
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int "IRQ_PWM_TRIP"
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default 10
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config IRQ_PWM_SYNC
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int "IRQ_PWM_SYNC"
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default 10
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config IRQ_PTP_STAT
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int "IRQ_PTP_STAT"
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default 10
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help
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Enter the priority numbers between 7-13 ONLY. Others are Reserved.
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This applies to all the above. It is not recommended to assign the
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highest priority number 7 to UART or any other device.
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
endif
|
