2019-05-19 19:07:45 +07:00
|
|
|
# SPDX-License-Identifier: GPL-2.0-only
|
2011-11-28 00:08:33 +07:00
|
|
|
menu "Distributed Switch Architecture drivers"
|
2012-11-26 16:16:10 +07:00
|
|
|
depends on HAVE_NET_DSA
|
2011-11-28 00:08:33 +07:00
|
|
|
|
2017-05-17 03:40:08 +07:00
|
|
|
source "drivers/net/dsa/b53/Kconfig"
|
2011-11-28 00:08:33 +07:00
|
|
|
|
2014-08-28 07:04:56 +07:00
|
|
|
config NET_DSA_BCM_SF2
|
|
|
|
tristate "Broadcom Starfighter 2 Ethernet switch support"
|
2018-07-17 22:42:06 +07:00
|
|
|
depends on HAS_IOMEM && NET_DSA
|
2014-08-28 07:04:56 +07:00
|
|
|
select NET_DSA_TAG_BRCM
|
2014-12-16 00:57:15 +07:00
|
|
|
select FIXED_PHY
|
2014-08-28 07:04:56 +07:00
|
|
|
select BCM7XXX_PHY
|
|
|
|
select MDIO_BCM_UNIMAC
|
2016-08-27 02:18:33 +07:00
|
|
|
select B53
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2014-08-28 07:04:56 +07:00
|
|
|
This enables support for the Broadcom Starfighter 2 Ethernet
|
|
|
|
switch chips.
|
|
|
|
|
2017-03-31 08:43:21 +07:00
|
|
|
config NET_DSA_LOOP
|
|
|
|
tristate "DSA mock-up Ethernet switch chip support"
|
|
|
|
depends on NET_DSA
|
|
|
|
select FIXED_PHY
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-03-31 08:43:21 +07:00
|
|
|
This enables support for a fake mock-up switch chip which
|
|
|
|
exercises the DSA APIs.
|
|
|
|
|
2018-09-10 03:20:39 +07:00
|
|
|
config NET_DSA_LANTIQ_GSWIP
|
|
|
|
tristate "Lantiq / Intel GSWIP"
|
2018-09-26 02:55:33 +07:00
|
|
|
depends on HAS_IOMEM && NET_DSA
|
2018-09-10 03:20:39 +07:00
|
|
|
select NET_DSA_TAG_GSWIP
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2018-09-10 03:20:39 +07:00
|
|
|
This enables support for the Lantiq / Intel GSWIP 2.1 found in
|
|
|
|
the xrx200 / VR9 SoC.
|
|
|
|
|
2017-04-07 15:45:09 +07:00
|
|
|
config NET_DSA_MT7530
|
|
|
|
tristate "Mediatek MT7530 Ethernet switch support"
|
|
|
|
depends on NET_DSA
|
|
|
|
select NET_DSA_TAG_MTK
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-04-07 15:45:09 +07:00
|
|
|
This enables support for the Mediatek MT7530 Ethernet switch
|
|
|
|
chip.
|
|
|
|
|
2017-05-17 03:40:08 +07:00
|
|
|
config NET_DSA_MV88E6060
|
|
|
|
tristate "Marvell 88E6060 ethernet switch chip support"
|
2019-04-28 07:56:22 +07:00
|
|
|
depends on NET_DSA
|
2017-05-17 03:40:08 +07:00
|
|
|
select NET_DSA_TAG_TRAILER
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-05-17 03:40:08 +07:00
|
|
|
This enables support for the Marvell 88E6060 ethernet switch
|
|
|
|
chip.
|
|
|
|
|
2017-06-01 03:19:19 +07:00
|
|
|
source "drivers/net/dsa/microchip/Kconfig"
|
|
|
|
|
2017-05-17 03:40:08 +07:00
|
|
|
source "drivers/net/dsa/mv88e6xxx/Kconfig"
|
|
|
|
|
net: dsa: ocelot: add driver for Felix switch family
This supports an Ethernet switching core from Vitesse / Microsemi /
Microchip (VSC9959) which is part of the Ocelot family (a brand name),
and whose code name is Felix. The switch can be (and is) integrated on
different SoCs as a PCIe endpoint device.
The functionality is provided by the core of the Ocelot switch driver
(drivers/net/ethernet/mscc). In this regard, the current driver is an
instance of Microsemi's Ocelot core driver, with a DSA front-end. It
inherits its name from VSC9959's code name, to distinguish itself from
the switchdev ocelot driver.
The patch adds the logic for probing a PCI device and defines the
register map for the VSC9959 switch core, since it has some differences
in register addresses and bitfield mappings compared to the other Ocelot
switches (VSC7511, VSC7512, VSC7513, VSC7514).
The Felix driver declares the register map as part of the "instance
table". Currently the VSC9959 inside NXP LS1028A is the only instance,
but presumably it can support other switches in the Ocelot family, when
used in DSA mode (Linux running on the external CPU, and not on the
embedded MIPS).
In a few cases, some h/w operations have to be done differently on
VSC9959 due to missing bitfields. This is the case for the switch core
reset and init. Because for this operation Ocelot uses some bits that
are not present on Felix, the latter has to use a register from the
global registers block (GCB) instead.
Although it is a PCI driver, it relies on DT bindings for compatibility
with DSA (CPU port link, PHY library). It does not have any custom
device tree bindings, since we would like to minimize its dependency on
device tree though.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14 22:03:30 +07:00
|
|
|
source "drivers/net/dsa/ocelot/Kconfig"
|
|
|
|
|
2019-12-18 15:02:15 +07:00
|
|
|
source "drivers/net/dsa/qca/Kconfig"
|
|
|
|
|
2019-05-03 03:23:30 +07:00
|
|
|
source "drivers/net/dsa/sja1105/Kconfig"
|
|
|
|
|
2017-05-17 03:40:08 +07:00
|
|
|
config NET_DSA_QCA8K
|
|
|
|
tristate "Qualcomm Atheros QCA8K Ethernet switch family support"
|
|
|
|
depends on NET_DSA
|
|
|
|
select NET_DSA_TAG_QCA
|
|
|
|
select REGMAP
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-05-17 03:40:08 +07:00
|
|
|
This enables support for the Qualcomm Atheros QCA8K Ethernet
|
|
|
|
switch chips.
|
|
|
|
|
2018-07-14 16:45:55 +07:00
|
|
|
config NET_DSA_REALTEK_SMI
|
|
|
|
tristate "Realtek SMI Ethernet switch family support"
|
|
|
|
depends on NET_DSA
|
|
|
|
select FIXED_PHY
|
|
|
|
select IRQ_DOMAIN
|
|
|
|
select REALTEK_PHY
|
|
|
|
select REGMAP
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2018-07-14 16:45:55 +07:00
|
|
|
This enables support for the Realtek SMI-based switch
|
|
|
|
chips, currently only RTL8366RB.
|
|
|
|
|
2017-04-18 15:48:26 +07:00
|
|
|
config NET_DSA_SMSC_LAN9303
|
|
|
|
tristate
|
|
|
|
select NET_DSA_TAG_LAN9303
|
2019-10-26 09:21:39 +07:00
|
|
|
select REGMAP
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-04-18 15:48:26 +07:00
|
|
|
This enables support for the SMSC/Microchip LAN9303 3 port ethernet
|
|
|
|
switch chips.
|
|
|
|
|
|
|
|
config NET_DSA_SMSC_LAN9303_I2C
|
|
|
|
tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
|
2017-04-21 23:22:40 +07:00
|
|
|
depends on NET_DSA && I2C
|
2017-04-18 15:48:26 +07:00
|
|
|
select NET_DSA_SMSC_LAN9303
|
|
|
|
select REGMAP_I2C
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-04-18 15:48:26 +07:00
|
|
|
Enable access functions if the SMSC/Microchip LAN9303 is configured
|
|
|
|
for I2C managed mode.
|
|
|
|
|
2017-04-18 15:48:27 +07:00
|
|
|
config NET_DSA_SMSC_LAN9303_MDIO
|
|
|
|
tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in MDIO managed mode"
|
|
|
|
depends on NET_DSA
|
|
|
|
select NET_DSA_SMSC_LAN9303
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2017-04-18 15:48:27 +07:00
|
|
|
Enable access functions if the SMSC/Microchip LAN9303 is configured
|
|
|
|
for MDIO managed mode.
|
|
|
|
|
2018-06-30 18:17:31 +07:00
|
|
|
config NET_DSA_VITESSE_VSC73XX
|
2019-07-05 05:29:05 +07:00
|
|
|
tristate
|
2018-06-30 18:17:31 +07:00
|
|
|
depends on NET_DSA
|
|
|
|
select FIXED_PHY
|
|
|
|
select VITESSE_PHY
|
|
|
|
select GPIOLIB
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2018-06-30 18:17:31 +07:00
|
|
|
This enables support for the Vitesse VSC7385, VSC7388,
|
|
|
|
VSC7395 and VSC7398 SparX integrated ethernet switches.
|
|
|
|
|
2019-07-05 05:29:05 +07:00
|
|
|
config NET_DSA_VITESSE_VSC73XX_SPI
|
|
|
|
tristate "Vitesse VSC7385/7388/7395/7398 SPI mode support"
|
2019-07-10 01:55:55 +07:00
|
|
|
depends on NET_DSA
|
2019-07-05 05:29:05 +07:00
|
|
|
depends on SPI
|
|
|
|
select NET_DSA_VITESSE_VSC73XX
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2019-07-05 05:29:05 +07:00
|
|
|
This enables support for the Vitesse VSC7385, VSC7388, VSC7395
|
|
|
|
and VSC7398 SparX integrated ethernet switches in SPI managed mode.
|
2019-07-05 05:29:06 +07:00
|
|
|
|
|
|
|
config NET_DSA_VITESSE_VSC73XX_PLATFORM
|
|
|
|
tristate "Vitesse VSC7385/7388/7395/7398 Platform mode support"
|
2019-07-10 01:55:55 +07:00
|
|
|
depends on NET_DSA
|
2019-07-05 05:29:06 +07:00
|
|
|
depends on HAS_IOMEM
|
|
|
|
select NET_DSA_VITESSE_VSC73XX
|
2020-06-13 23:50:22 +07:00
|
|
|
help
|
2019-07-05 05:29:06 +07:00
|
|
|
This enables support for the Vitesse VSC7385, VSC7388, VSC7395
|
|
|
|
and VSC7398 SparX integrated ethernet switches, connected over
|
|
|
|
a CPU-attached address bus and work in memory-mapped I/O mode.
|
2011-11-28 00:08:33 +07:00
|
|
|
endmenu
|