2015-12-15 13:57:41 +07:00
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/*
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* rt5616.c -- RT5616 ALSA SoC audio codec driver
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*
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* Copyright 2015 Realtek Semiconductor Corp.
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* Author: Bard Liao <bardliao@realtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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2016-01-28 15:43:37 +07:00
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#include <linux/clk.h>
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2015-12-15 13:57:41 +07:00
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "rl6231.h"
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#include "rt5616.h"
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#define RT5616_PR_RANGE_BASE (0xff + 1)
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#define RT5616_PR_SPACING 0x100
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#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
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static const struct regmap_range_cfg rt5616_ranges[] = {
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{
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.name = "PR",
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.range_min = RT5616_PR_BASE,
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.range_max = RT5616_PR_BASE + 0xf8,
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.selector_reg = RT5616_PRIV_INDEX,
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.selector_mask = 0xff,
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.selector_shift = 0x0,
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.window_start = RT5616_PRIV_DATA,
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.window_len = 0x1,
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},
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};
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static const struct reg_sequence init_list[] = {
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{RT5616_PR_BASE + 0x3d, 0x3e00},
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{RT5616_PR_BASE + 0x25, 0x6110},
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{RT5616_PR_BASE + 0x20, 0x611f},
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{RT5616_PR_BASE + 0x21, 0x4040},
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{RT5616_PR_BASE + 0x23, 0x0004},
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};
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2016-01-28 15:43:36 +07:00
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2015-12-15 13:57:41 +07:00
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#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
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static const struct reg_default rt5616_reg[] = {
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{ 0x00, 0x0021 },
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{ 0x02, 0xc8c8 },
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{ 0x03, 0xc8c8 },
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{ 0x05, 0x0000 },
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{ 0x0d, 0x0000 },
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{ 0x0f, 0x0808 },
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{ 0x19, 0xafaf },
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{ 0x1c, 0x2f2f },
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{ 0x1e, 0x0000 },
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{ 0x27, 0x7860 },
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{ 0x29, 0x8080 },
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{ 0x2a, 0x5252 },
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{ 0x3b, 0x0000 },
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{ 0x3c, 0x006f },
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{ 0x3d, 0x0000 },
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{ 0x3e, 0x006f },
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{ 0x45, 0x6000 },
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{ 0x4d, 0x0000 },
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{ 0x4e, 0x0000 },
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{ 0x4f, 0x0279 },
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{ 0x50, 0x0000 },
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{ 0x51, 0x0000 },
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{ 0x52, 0x0279 },
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{ 0x53, 0xf000 },
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{ 0x61, 0x0000 },
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{ 0x62, 0x0000 },
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{ 0x63, 0x00c0 },
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{ 0x64, 0x0000 },
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{ 0x65, 0x0000 },
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{ 0x66, 0x0000 },
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{ 0x70, 0x8000 },
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{ 0x73, 0x1104 },
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{ 0x74, 0x0c00 },
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{ 0x80, 0x0000 },
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{ 0x81, 0x0000 },
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{ 0x82, 0x0000 },
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{ 0x8b, 0x0600 },
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{ 0x8e, 0x0004 },
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{ 0x8f, 0x1100 },
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{ 0x90, 0x0000 },
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2017-10-20 14:46:55 +07:00
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{ 0x91, 0x0c00 },
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2015-12-15 13:57:41 +07:00
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{ 0x92, 0x0000 },
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{ 0x93, 0x2000 },
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{ 0x94, 0x0200 },
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{ 0x95, 0x0000 },
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{ 0xb0, 0x2080 },
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{ 0xb1, 0x0000 },
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{ 0xb2, 0x0000 },
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{ 0xb4, 0x2206 },
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{ 0xb5, 0x1f00 },
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{ 0xb6, 0x0000 },
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{ 0xb7, 0x0000 },
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{ 0xbb, 0x0000 },
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{ 0xbc, 0x0000 },
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{ 0xbd, 0x0000 },
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{ 0xbe, 0x0000 },
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{ 0xbf, 0x0000 },
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{ 0xc0, 0x0100 },
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{ 0xc1, 0x0000 },
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{ 0xc2, 0x0000 },
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{ 0xc8, 0x0000 },
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{ 0xc9, 0x0000 },
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{ 0xca, 0x0000 },
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{ 0xcb, 0x0000 },
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{ 0xcc, 0x0000 },
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{ 0xcd, 0x0000 },
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{ 0xce, 0x0000 },
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{ 0xcf, 0x0013 },
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{ 0xd0, 0x0680 },
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{ 0xd1, 0x1c17 },
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{ 0xd3, 0xb320 },
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{ 0xd4, 0x0000 },
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{ 0xd6, 0x0000 },
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{ 0xd7, 0x0000 },
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{ 0xd9, 0x0809 },
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{ 0xda, 0x0000 },
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{ 0xfa, 0x0010 },
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{ 0xfb, 0x0000 },
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{ 0xfc, 0x0000 },
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{ 0xfe, 0x10ec },
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{ 0xff, 0x6281 },
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};
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struct rt5616_priv {
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2018-01-29 10:42:18 +07:00
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struct snd_soc_component *component;
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2015-12-15 13:57:41 +07:00
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struct delayed_work patch_work;
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struct regmap *regmap;
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2016-01-28 15:43:37 +07:00
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struct clk *mclk;
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2015-12-15 13:57:41 +07:00
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int sysclk;
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int sysclk_src;
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int lrck[RT5616_AIFS];
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int bclk[RT5616_AIFS];
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int master[RT5616_AIFS];
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int pll_src;
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int pll_in;
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int pll_out;
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};
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static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
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if (reg >= rt5616_ranges[i].range_min &&
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2016-01-28 15:43:36 +07:00
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reg <= rt5616_ranges[i].range_max)
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2015-12-15 13:57:41 +07:00
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return true;
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}
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switch (reg) {
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case RT5616_RESET:
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case RT5616_PRIV_DATA:
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case RT5616_EQ_CTRL1:
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case RT5616_DRC_AGC_1:
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case RT5616_IRQ_CTRL2:
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case RT5616_INT_IRQ_ST:
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case RT5616_PGM_REG_ARR1:
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case RT5616_PGM_REG_ARR3:
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case RT5616_VENDOR_ID:
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case RT5616_DEVICE_ID:
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return true;
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default:
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return false;
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}
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}
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static bool rt5616_readable_register(struct device *dev, unsigned int reg)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
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if (reg >= rt5616_ranges[i].range_min &&
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2016-01-28 15:43:36 +07:00
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reg <= rt5616_ranges[i].range_max)
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2015-12-15 13:57:41 +07:00
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return true;
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}
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switch (reg) {
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case RT5616_RESET:
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case RT5616_VERSION_ID:
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case RT5616_VENDOR_ID:
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case RT5616_DEVICE_ID:
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case RT5616_HP_VOL:
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case RT5616_LOUT_CTRL1:
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case RT5616_LOUT_CTRL2:
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case RT5616_IN1_IN2:
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case RT5616_INL1_INR1_VOL:
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case RT5616_DAC1_DIG_VOL:
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case RT5616_ADC_DIG_VOL:
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case RT5616_ADC_BST_VOL:
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case RT5616_STO1_ADC_MIXER:
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case RT5616_AD_DA_MIXER:
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case RT5616_STO_DAC_MIXER:
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case RT5616_REC_L1_MIXER:
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case RT5616_REC_L2_MIXER:
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case RT5616_REC_R1_MIXER:
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case RT5616_REC_R2_MIXER:
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case RT5616_HPO_MIXER:
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case RT5616_OUT_L1_MIXER:
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case RT5616_OUT_L2_MIXER:
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case RT5616_OUT_L3_MIXER:
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case RT5616_OUT_R1_MIXER:
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case RT5616_OUT_R2_MIXER:
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case RT5616_OUT_R3_MIXER:
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case RT5616_LOUT_MIXER:
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case RT5616_PWR_DIG1:
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case RT5616_PWR_DIG2:
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case RT5616_PWR_ANLG1:
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case RT5616_PWR_ANLG2:
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case RT5616_PWR_MIXER:
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case RT5616_PWR_VOL:
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case RT5616_PRIV_INDEX:
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case RT5616_PRIV_DATA:
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case RT5616_I2S1_SDP:
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case RT5616_ADDA_CLK1:
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case RT5616_ADDA_CLK2:
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case RT5616_GLB_CLK:
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case RT5616_PLL_CTRL1:
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case RT5616_PLL_CTRL2:
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case RT5616_HP_OVCD:
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case RT5616_DEPOP_M1:
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case RT5616_DEPOP_M2:
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case RT5616_DEPOP_M3:
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case RT5616_CHARGE_PUMP:
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case RT5616_PV_DET_SPK_G:
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case RT5616_MICBIAS:
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case RT5616_A_JD_CTL1:
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case RT5616_A_JD_CTL2:
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case RT5616_EQ_CTRL1:
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case RT5616_EQ_CTRL2:
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case RT5616_WIND_FILTER:
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case RT5616_DRC_AGC_1:
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case RT5616_DRC_AGC_2:
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case RT5616_DRC_AGC_3:
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case RT5616_SVOL_ZC:
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case RT5616_JD_CTRL1:
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case RT5616_JD_CTRL2:
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case RT5616_IRQ_CTRL1:
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case RT5616_IRQ_CTRL2:
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case RT5616_INT_IRQ_ST:
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case RT5616_GPIO_CTRL1:
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case RT5616_GPIO_CTRL2:
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case RT5616_GPIO_CTRL3:
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case RT5616_PGM_REG_ARR1:
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case RT5616_PGM_REG_ARR2:
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case RT5616_PGM_REG_ARR3:
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case RT5616_PGM_REG_ARR4:
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case RT5616_PGM_REG_ARR5:
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case RT5616_SCB_FUNC:
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case RT5616_SCB_CTRL:
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case RT5616_BASE_BACK:
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case RT5616_MP3_PLUS1:
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case RT5616_MP3_PLUS2:
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case RT5616_ADJ_HPF_CTRL1:
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case RT5616_ADJ_HPF_CTRL2:
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case RT5616_HP_CALIB_AMP_DET:
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case RT5616_HP_CALIB2:
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case RT5616_SV_ZCD1:
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case RT5616_SV_ZCD2:
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case RT5616_D_MISC:
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case RT5616_DUMMY2:
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case RT5616_DUMMY3:
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return true;
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default:
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return false;
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}
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}
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static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
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static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
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static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
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static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
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static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
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/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
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2016-09-28 07:29:20 +07:00
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static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(bst_tlv,
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2015-12-15 13:57:41 +07:00
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0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
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1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
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2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
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3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
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6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
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7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
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8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
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2016-09-28 07:29:20 +07:00
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);
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2015-12-15 13:57:41 +07:00
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static const struct snd_kcontrol_new rt5616_snd_controls[] = {
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/* Headphone Output Volume */
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SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
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2016-01-28 15:43:36 +07:00
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RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
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2016-03-07 11:12:11 +07:00
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SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL,
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RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
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2015-12-15 13:57:41 +07:00
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SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
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2016-01-28 15:43:36 +07:00
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RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
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2015-12-15 13:57:41 +07:00
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/* OUTPUT Control */
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SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
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2016-01-28 15:43:36 +07:00
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RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
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2015-12-15 13:57:41 +07:00
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SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
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2016-01-28 15:43:36 +07:00
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RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
|
2015-12-15 13:57:41 +07:00
|
|
|
SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* DAC Digital Volume */
|
|
|
|
SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
|
|
|
|
175, 0, dac_vol_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* IN1/IN2 Control */
|
2015-12-21 09:09:53 +07:00
|
|
|
SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_BST_SFT1, 8, 0, bst_tlv),
|
2015-12-21 09:09:53 +07:00
|
|
|
SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_BST_SFT2, 8, 0, bst_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* INL/INR Volume Control */
|
|
|
|
SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
|
|
|
|
31, 1, in_vol_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* ADC Digital Volume Control */
|
|
|
|
SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
|
2015-12-15 13:57:41 +07:00
|
|
|
SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
|
|
|
|
127, 0, adc_vol_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* ADC Boost Volume Control */
|
2015-12-21 09:09:53 +07:00
|
|
|
SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
|
|
|
|
3, 0, adc_bst_tlv),
|
2015-12-15 13:57:41 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_soc_dapm_widget *sink)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
|
|
|
unsigned int val;
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
val = snd_soc_component_read32(snd_soc_dapm_to_component(source->dapm), RT5616_GLB_CLK);
|
2015-12-15 13:57:41 +07:00
|
|
|
val &= RT5616_SCLK_SRC_MASK;
|
|
|
|
if (val == RT5616_SCLK_SRC_PLL1)
|
|
|
|
return 1;
|
|
|
|
else
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Digital Mixer */
|
|
|
|
static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
|
|
|
|
RT5616_M_STO1_ADC_L1_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
|
|
|
|
RT5616_M_STO1_ADC_R1_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
|
|
|
|
RT5616_M_ADCMIX_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
|
|
|
|
RT5616_M_IF1_DAC_L_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
|
|
|
|
RT5616_M_ADCMIX_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
|
|
|
|
RT5616_M_IF1_DAC_R_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
|
|
|
|
RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
|
|
|
|
RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
|
|
|
|
RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
|
|
|
|
RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Analog Input Mixer */
|
|
|
|
static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
|
|
|
|
RT5616_M_IN1_L_RM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
|
|
|
|
RT5616_M_BST2_RM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
|
|
|
|
RT5616_M_BST1_RM_L_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
|
|
|
|
RT5616_M_IN1_R_RM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
|
|
|
|
RT5616_M_BST2_RM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
|
|
|
|
RT5616_M_BST1_RM_R_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Analog Output Mixer */
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
|
|
|
|
RT5616_M_BST1_OM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
|
|
|
|
RT5616_M_BST2_OM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
|
|
|
|
RT5616_M_IN1_L_OM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
|
|
|
|
RT5616_M_RM_L_OM_L_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
|
|
|
|
RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
|
|
|
|
RT5616_M_BST2_OM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
|
|
|
|
RT5616_M_BST1_OM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
|
|
|
|
RT5616_M_IN1_R_OM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
|
|
|
|
RT5616_M_RM_R_OM_R_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
|
|
|
|
RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
|
|
|
|
RT5616_M_DAC1_HM_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
|
|
|
|
RT5616_M_HPVOL_HM_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rt5616_lout_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
|
|
|
|
RT5616_M_DAC_L1_LM_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
|
|
|
|
RT5616_M_DAC_R1_LM_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
|
|
|
|
RT5616_M_OV_L_LM_SFT, 1, 1),
|
|
|
|
SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
|
|
|
|
RT5616_M_OV_R_LM_SFT, 1, 1),
|
|
|
|
};
|
|
|
|
|
|
|
|
static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_POST_PMD:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE,
|
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
|
|
|
/* depop parameters */
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
|
|
|
|
RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
|
|
|
|
RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_write(component, RT5616_PR_BASE +
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_DCC_INT1, 0x9f00);
|
2015-12-15 13:57:41 +07:00
|
|
|
/* headphone amp power on */
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_HV_L | RT5616_PWR_HV_R,
|
|
|
|
RT5616_PWR_HV_L | RT5616_PWR_HV_R);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_HP_L | RT5616_PWR_HP_R |
|
|
|
|
RT5616_PWR_HA, RT5616_PWR_HP_L |
|
|
|
|
RT5616_PWR_HP_R | RT5616_PWR_HA);
|
2015-12-15 13:57:41 +07:00
|
|
|
msleep(50);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_FV1 | RT5616_PWR_FV2,
|
|
|
|
RT5616_PWR_FV1 | RT5616_PWR_FV2);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PR_BASE +
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
|
|
|
|
RT5616_HP_CO_EN | RT5616_HP_SG_EN);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PR_BASE +
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
|
|
|
|
RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
|
|
|
|
RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
|
2015-12-15 13:57:41 +07:00
|
|
|
/* headphone amp power down */
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_SMT_TRIG_MASK |
|
|
|
|
RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
|
|
|
|
RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
|
|
|
|
RT5616_HP_CB_MASK,
|
|
|
|
RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
|
|
|
|
RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
|
|
|
|
RT5616_HP_SG_EN | RT5616_HP_CB_PD);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_HP_L | RT5616_PWR_HP_R |
|
|
|
|
RT5616_PWR_HA, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
|
|
|
/* headphone unmute sequence */
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
|
|
|
|
RT5616_CP_FQ3_MASK,
|
|
|
|
RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
|
|
|
|
RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
|
|
|
|
RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_write(component, RT5616_PR_BASE +
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_MAMP_INT_REG2, 0xfc00);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_RSTN_MASK, RT5616_RSTN_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
|
|
|
|
RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
|
|
|
|
RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_HP_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
msleep(100);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
|
|
|
|
RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
|
|
|
|
RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
|
2015-12-15 13:57:41 +07:00
|
|
|
msleep(20);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
|
|
|
/* headphone mute sequence */
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
|
|
|
|
RT5616_CP_FQ3_MASK,
|
|
|
|
RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
|
|
|
|
RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
|
|
|
|
RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_write(component, RT5616_PR_BASE +
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_MAMP_INT_REG2, 0xfc00);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_RSTP_MASK, RT5616_RSTP_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
|
|
|
|
RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
|
|
|
|
RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
|
2015-12-15 13:57:41 +07:00
|
|
|
msleep(90);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_HP_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE,
|
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE);
|
2015-12-15 13:57:41 +07:00
|
|
|
msleep(30);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_LM, RT5616_PWR_LM);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE,
|
|
|
|
RT5616_L_MUTE | RT5616_R_MUTE);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_LM, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST1_OP2, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST2_OP2, 0);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
|
|
|
|
SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_PLL_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* Input Side */
|
|
|
|
/* micbias */
|
|
|
|
SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_LDO_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_MB1_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* Input Lines */
|
|
|
|
SND_SOC_DAPM_INPUT("MIC1"),
|
|
|
|
SND_SOC_DAPM_INPUT("MIC2"),
|
|
|
|
|
|
|
|
SND_SOC_DAPM_INPUT("IN1P"),
|
|
|
|
SND_SOC_DAPM_INPUT("IN2P"),
|
|
|
|
SND_SOC_DAPM_INPUT("IN2N"),
|
|
|
|
|
|
|
|
/* Boost */
|
|
|
|
SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
|
|
|
|
SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
|
|
|
|
SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* Input Volume */
|
|
|
|
SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* REC Mixer */
|
|
|
|
SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* ADCs */
|
|
|
|
SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
|
|
|
|
SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
|
|
|
|
SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* ADC Mixer */
|
|
|
|
SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_sto1_adc_l_mix,
|
|
|
|
ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_sto1_adc_r_mix,
|
|
|
|
ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* Digital Interface */
|
|
|
|
SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_I2S1_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
|
|
|
|
SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
|
|
|
|
SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
|
|
|
|
SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
|
|
|
|
|
|
|
|
/* Digital Interface Select */
|
|
|
|
|
|
|
|
/* Audio Interface */
|
|
|
|
SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
|
|
|
|
SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
|
|
|
|
|
|
|
|
/* Audio DSP */
|
|
|
|
SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
|
|
|
|
|
|
|
|
/* Output Side */
|
|
|
|
/* DAC mixer before sound effect */
|
|
|
|
SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* DAC Mixer */
|
|
|
|
SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_sto_dac_l_mix,
|
|
|
|
ARRAY_SIZE(rt5616_sto_dac_l_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_sto_dac_r_mix,
|
|
|
|
ARRAY_SIZE(rt5616_sto_dac_r_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* DACs */
|
|
|
|
SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_DAC_L1_BIT, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_DAC_R1_BIT, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* OUT Mixer */
|
|
|
|
SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
|
2016-01-28 15:43:36 +07:00
|
|
|
0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
|
2016-01-28 15:43:36 +07:00
|
|
|
0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* Output Volume */
|
|
|
|
SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_OV_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_OV_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_HV_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_HV_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
|
2016-01-28 15:43:36 +07:00
|
|
|
0, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
|
2016-01-28 15:43:36 +07:00
|
|
|
0, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
|
2016-01-28 15:43:36 +07:00
|
|
|
0, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
|
2015-12-15 13:57:41 +07:00
|
|
|
/* HPO/LOUT/Mono Mixer */
|
|
|
|
SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
|
|
|
|
SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
|
|
|
|
SND_SOC_DAPM_POST_PMU),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
|
2016-01-28 15:43:36 +07:00
|
|
|
rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
|
|
|
|
SND_SOC_DAPM_PRE_PMD),
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
/* Output Lines */
|
|
|
|
SND_SOC_DAPM_OUTPUT("HPOL"),
|
|
|
|
SND_SOC_DAPM_OUTPUT("HPOR"),
|
|
|
|
SND_SOC_DAPM_OUTPUT("LOUTL"),
|
|
|
|
SND_SOC_DAPM_OUTPUT("LOUTR"),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
|
|
|
|
{"IN1P", NULL, "LDO"},
|
|
|
|
{"IN2P", NULL, "LDO"},
|
|
|
|
|
|
|
|
{"IN1P", NULL, "MIC1"},
|
|
|
|
{"IN2P", NULL, "MIC2"},
|
|
|
|
{"IN2N", NULL, "MIC2"},
|
|
|
|
|
|
|
|
{"BST1", NULL, "IN1P"},
|
|
|
|
{"BST2", NULL, "IN2P"},
|
|
|
|
{"BST2", NULL, "IN2N"},
|
|
|
|
{"BST1", NULL, "micbias1"},
|
|
|
|
{"BST2", NULL, "micbias1"},
|
|
|
|
|
|
|
|
{"INL1 VOL", NULL, "IN2P"},
|
|
|
|
{"INR1 VOL", NULL, "IN2N"},
|
|
|
|
|
|
|
|
{"RECMIXL", "INL1 Switch", "INL1 VOL"},
|
|
|
|
{"RECMIXL", "BST2 Switch", "BST2"},
|
|
|
|
{"RECMIXL", "BST1 Switch", "BST1"},
|
|
|
|
|
|
|
|
{"RECMIXR", "INR1 Switch", "INR1 VOL"},
|
|
|
|
{"RECMIXR", "BST2 Switch", "BST2"},
|
|
|
|
{"RECMIXR", "BST1 Switch", "BST1"},
|
|
|
|
|
|
|
|
{"ADC L", NULL, "RECMIXL"},
|
|
|
|
{"ADC R", NULL, "RECMIXR"},
|
|
|
|
|
|
|
|
{"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
|
|
|
|
{"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
|
|
|
|
{"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
|
|
|
|
|
|
|
|
{"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
|
|
|
|
{"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
|
|
|
|
{"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
|
|
|
|
|
|
|
|
{"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
|
|
|
|
{"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
|
|
|
|
{"IF1 ADC1", NULL, "I2S1"},
|
|
|
|
|
|
|
|
{"AIF1TX", NULL, "IF1 ADC1"},
|
|
|
|
|
|
|
|
{"IF1 DAC", NULL, "AIF1RX"},
|
|
|
|
{"IF1 DAC", NULL, "I2S1"},
|
|
|
|
|
|
|
|
{"IF1 DAC1 L", NULL, "IF1 DAC"},
|
|
|
|
{"IF1 DAC1 R", NULL, "IF1 DAC"},
|
|
|
|
|
|
|
|
{"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
|
|
|
|
{"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
|
|
|
|
{"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
|
|
|
|
{"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
|
|
|
|
|
|
|
|
{"Audio DSP", NULL, "DAC MIXL"},
|
|
|
|
{"Audio DSP", NULL, "DAC MIXR"},
|
|
|
|
|
|
|
|
{"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
|
|
|
|
{"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
|
|
|
|
{"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
|
|
|
|
{"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
|
|
|
|
{"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
|
|
|
|
{"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
|
|
|
|
|
|
|
|
{"DAC L1", NULL, "Stereo DAC MIXL"},
|
|
|
|
{"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
|
|
|
|
{"DAC R1", NULL, "Stereo DAC MIXR"},
|
|
|
|
{"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
|
|
|
|
|
|
|
|
{"OUT MIXL", "BST1 Switch", "BST1"},
|
|
|
|
{"OUT MIXL", "BST2 Switch", "BST2"},
|
|
|
|
{"OUT MIXL", "INL1 Switch", "INL1 VOL"},
|
|
|
|
{"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
|
|
|
|
{"OUT MIXL", "DAC L1 Switch", "DAC L1"},
|
|
|
|
|
|
|
|
{"OUT MIXR", "BST2 Switch", "BST2"},
|
|
|
|
{"OUT MIXR", "BST1 Switch", "BST1"},
|
|
|
|
{"OUT MIXR", "INR1 Switch", "INR1 VOL"},
|
|
|
|
{"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
|
|
|
|
{"OUT MIXR", "DAC R1 Switch", "DAC R1"},
|
|
|
|
|
|
|
|
{"HPOVOL L", NULL, "OUT MIXL"},
|
|
|
|
{"HPOVOL R", NULL, "OUT MIXR"},
|
|
|
|
{"OUTVOL L", NULL, "OUT MIXL"},
|
|
|
|
{"OUTVOL R", NULL, "OUT MIXR"},
|
|
|
|
|
|
|
|
{"DAC 1", NULL, "DAC L1"},
|
|
|
|
{"DAC 1", NULL, "DAC R1"},
|
|
|
|
{"HPOVOL", NULL, "HPOVOL L"},
|
|
|
|
{"HPOVOL", NULL, "HPOVOL R"},
|
|
|
|
{"HPO MIX", "DAC1 Switch", "DAC 1"},
|
|
|
|
{"HPO MIX", "HPVOL Switch", "HPOVOL"},
|
|
|
|
|
|
|
|
{"LOUT MIX", "DAC L1 Switch", "DAC L1"},
|
|
|
|
{"LOUT MIX", "DAC R1 Switch", "DAC R1"},
|
|
|
|
{"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
|
|
|
|
{"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
|
|
|
|
|
|
|
|
{"HP amp", NULL, "HPO MIX"},
|
|
|
|
{"HP amp", NULL, "Charge Pump"},
|
|
|
|
{"HPOL", NULL, "HP amp"},
|
|
|
|
{"HPOR", NULL, "HP amp"},
|
|
|
|
|
|
|
|
{"LOUT amp", NULL, "LOUT MIX"},
|
|
|
|
{"LOUT amp", NULL, "Charge Pump"},
|
|
|
|
{"LOUTL", NULL, "LOUT amp"},
|
|
|
|
{"LOUTR", NULL, "LOUT amp"},
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
static int rt5616_hw_params(struct snd_pcm_substream *substream,
|
2016-01-28 15:43:36 +07:00
|
|
|
struct snd_pcm_hw_params *params,
|
|
|
|
struct snd_soc_dai *dai)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = dai->component;
|
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
unsigned int val_len = 0, val_clk, mask_clk;
|
|
|
|
int pre_div, bclk_ms, frame_size;
|
|
|
|
|
|
|
|
rt5616->lrck[dai->id] = params_rate(params);
|
|
|
|
|
|
|
|
pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
|
|
|
|
|
|
|
|
if (pre_div < 0) {
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_err(component->dev, "Unsupported clock setting\n");
|
2015-12-15 13:57:41 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
frame_size = snd_soc_params_to_frame_size(params);
|
|
|
|
if (frame_size < 0) {
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
|
2015-12-15 13:57:41 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
bclk_ms = frame_size > 32 ? 1 : 0;
|
|
|
|
rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
|
|
|
|
|
|
|
|
dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
|
|
|
|
rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
|
|
|
|
dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
|
2016-01-28 15:43:36 +07:00
|
|
|
bclk_ms, pre_div, dai->id);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
switch (params_format(params)) {
|
|
|
|
case SNDRV_PCM_FORMAT_S16_LE:
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_FORMAT_S20_3LE:
|
|
|
|
val_len |= RT5616_I2S_DL_20;
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_FORMAT_S24_LE:
|
|
|
|
val_len |= RT5616_I2S_DL_24;
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_FORMAT_S8:
|
|
|
|
val_len |= RT5616_I2S_DL_8;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mask_clk = RT5616_I2S_PD1_MASK;
|
|
|
|
val_clk = pre_div << RT5616_I2S_PD1_SFT;
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_I2S_DL_MASK, val_len);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = dai->component;
|
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
unsigned int reg_val = 0;
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
|
|
case SND_SOC_DAIFMT_CBM_CFM:
|
|
|
|
rt5616->master[dai->id] = 1;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_CBS_CFS:
|
|
|
|
reg_val |= RT5616_I2S_MS_S;
|
|
|
|
rt5616->master[dai->id] = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
|
|
reg_val |= RT5616_I2S_BP_INV;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
|
|
case SND_SOC_DAIFMT_I2S:
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
|
|
reg_val |= RT5616_I2S_DF_LEFT;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_DSP_A:
|
|
|
|
reg_val |= RT5616_I2S_DF_PCM_A;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_DSP_B:
|
|
|
|
reg_val |= RT5616_I2S_DF_PCM_B;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
|
|
|
|
RT5616_I2S_DF_MASK, reg_val);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
|
2016-01-28 15:43:36 +07:00
|
|
|
int clk_id, unsigned int freq, int dir)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = dai->component;
|
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
unsigned int reg_val = 0;
|
|
|
|
|
|
|
|
if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
switch (clk_id) {
|
|
|
|
case RT5616_SCLK_S_MCLK:
|
|
|
|
reg_val |= RT5616_SCLK_SRC_MCLK;
|
|
|
|
break;
|
|
|
|
case RT5616_SCLK_S_PLL1:
|
|
|
|
reg_val |= RT5616_SCLK_SRC_PLL1;
|
|
|
|
break;
|
|
|
|
default:
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
|
2015-12-15 13:57:41 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2016-01-28 15:43:36 +07:00
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_GLB_CLK,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_SCLK_SRC_MASK, reg_val);
|
2015-12-15 13:57:41 +07:00
|
|
|
rt5616->sysclk = freq;
|
|
|
|
rt5616->sysclk_src = clk_id;
|
|
|
|
|
|
|
|
dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
|
2016-01-28 15:43:36 +07:00
|
|
|
unsigned int freq_in, unsigned int freq_out)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct snd_soc_component *component = dai->component;
|
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
struct rl6231_pll_code pll_code;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
|
|
|
|
freq_out == rt5616->pll_out)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (!freq_in || !freq_out) {
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_dbg(component->dev, "PLL disabled\n");
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
rt5616->pll_in = 0;
|
|
|
|
rt5616->pll_out = 0;
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_GLB_CLK,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_SCLK_SRC_MASK,
|
|
|
|
RT5616_SCLK_SRC_MCLK);
|
2015-12-15 13:57:41 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (source) {
|
|
|
|
case RT5616_PLL1_S_MCLK:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_GLB_CLK,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PLL1_SRC_MASK,
|
|
|
|
RT5616_PLL1_SRC_MCLK);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
case RT5616_PLL1_S_BCLK1:
|
|
|
|
case RT5616_PLL1_S_BCLK2:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_GLB_CLK,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PLL1_SRC_MASK,
|
|
|
|
RT5616_PLL1_SRC_BCLK1);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
default:
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_err(component->dev, "Unknown PLL source %d\n", source);
|
2015-12-15 13:57:41 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
|
|
|
|
if (ret < 0) {
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
|
2015-12-15 13:57:41 +07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
|
2015-12-15 13:57:41 +07:00
|
|
|
pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
|
|
|
|
pll_code.n_code, pll_code.k_code);
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_write(component, RT5616_PLL_CTRL1,
|
2016-01-28 15:43:36 +07:00
|
|
|
pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_write(component, RT5616_PLL_CTRL2,
|
2016-01-28 15:43:36 +07:00
|
|
|
(pll_code.m_bp ? 0 : pll_code.m_code) <<
|
|
|
|
RT5616_PLL_M_SFT |
|
|
|
|
pll_code.m_bp << RT5616_PLL_M_BP_SFT);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
rt5616->pll_in = freq_in;
|
|
|
|
rt5616->pll_out = freq_out;
|
|
|
|
rt5616->pll_src = source;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
static int rt5616_set_bias_level(struct snd_soc_component *component,
|
2016-01-28 15:43:36 +07:00
|
|
|
enum snd_soc_bias_level level)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2016-01-28 15:43:37 +07:00
|
|
|
int ret;
|
|
|
|
|
2015-12-15 13:57:41 +07:00
|
|
|
switch (level) {
|
2016-01-28 15:43:37 +07:00
|
|
|
|
|
|
|
case SND_SOC_BIAS_ON:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_BIAS_PREPARE:
|
|
|
|
/*
|
|
|
|
* SND_SOC_BIAS_PREPARE is called while preparing for a
|
|
|
|
* transition to ON or away from ON. If current bias_level
|
|
|
|
* is SND_SOC_BIAS_ON, then it is preparing for a transition
|
|
|
|
* away from ON. Disable the clock in that case, otherwise
|
|
|
|
* enable it.
|
|
|
|
*/
|
|
|
|
if (IS_ERR(rt5616->mclk))
|
|
|
|
break;
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
|
2016-01-28 15:43:37 +07:00
|
|
|
clk_disable_unprepare(rt5616->mclk);
|
|
|
|
} else {
|
|
|
|
ret = clk_prepare_enable(rt5616->mclk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-12-15 13:57:41 +07:00
|
|
|
case SND_SOC_BIAS_STANDBY:
|
2018-01-29 10:42:18 +07:00
|
|
|
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_VREF1 | RT5616_PWR_MB |
|
|
|
|
RT5616_PWR_BG | RT5616_PWR_VREF2,
|
|
|
|
RT5616_PWR_VREF1 | RT5616_PWR_MB |
|
|
|
|
RT5616_PWR_BG | RT5616_PWR_VREF2);
|
2015-12-15 13:57:41 +07:00
|
|
|
mdelay(10);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_PWR_FV1 | RT5616_PWR_FV2,
|
|
|
|
RT5616_PWR_FV1 | RT5616_PWR_FV2);
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_D_MISC,
|
2016-01-28 15:43:36 +07:00
|
|
|
RT5616_D_GATE_EN,
|
|
|
|
RT5616_D_GATE_EN);
|
2015-12-15 13:57:41 +07:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_BIAS_OFF:
|
2018-01-29 10:42:18 +07:00
|
|
|
snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000);
|
|
|
|
snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000);
|
2015-12-15 13:57:41 +07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
static int rt5616_probe(struct snd_soc_component *component)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
2016-01-28 15:43:37 +07:00
|
|
|
/* Check if MCLK provided */
|
2018-01-29 10:42:18 +07:00
|
|
|
rt5616->mclk = devm_clk_get(component->dev, "mclk");
|
2016-01-28 15:43:37 +07:00
|
|
|
if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
rt5616->component = component;
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
2018-01-29 10:42:18 +07:00
|
|
|
static int rt5616_suspend(struct snd_soc_component *component)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
regcache_cache_only(rt5616->regmap, true);
|
|
|
|
regcache_mark_dirty(rt5616->regmap);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
static int rt5616_resume(struct snd_soc_component *component)
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
2018-01-29 10:42:18 +07:00
|
|
|
struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
|
2015-12-15 13:57:41 +07:00
|
|
|
|
|
|
|
regcache_cache_only(rt5616->regmap, false);
|
|
|
|
regcache_sync(rt5616->regmap);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define rt5616_suspend NULL
|
|
|
|
#define rt5616_resume NULL
|
|
|
|
#endif
|
|
|
|
|
2016-01-29 08:47:12 +07:00
|
|
|
#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
|
2015-12-15 13:57:41 +07:00
|
|
|
#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
|
|
|
|
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
|
|
|
|
|
2017-08-18 19:05:59 +07:00
|
|
|
static const struct snd_soc_dai_ops rt5616_aif_dai_ops = {
|
2015-12-15 13:57:41 +07:00
|
|
|
.hw_params = rt5616_hw_params,
|
|
|
|
.set_fmt = rt5616_set_dai_fmt,
|
|
|
|
.set_sysclk = rt5616_set_dai_sysclk,
|
|
|
|
.set_pll = rt5616_set_dai_pll,
|
|
|
|
};
|
|
|
|
|
2016-09-27 05:45:10 +07:00
|
|
|
static struct snd_soc_dai_driver rt5616_dai[] = {
|
2015-12-15 13:57:41 +07:00
|
|
|
{
|
|
|
|
.name = "rt5616-aif1",
|
|
|
|
.id = RT5616_AIF1,
|
|
|
|
.playback = {
|
|
|
|
.stream_name = "AIF1 Playback",
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = RT5616_STEREO_RATES,
|
|
|
|
.formats = RT5616_FORMATS,
|
|
|
|
},
|
|
|
|
.capture = {
|
|
|
|
.stream_name = "AIF1 Capture",
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = RT5616_STEREO_RATES,
|
|
|
|
.formats = RT5616_FORMATS,
|
|
|
|
},
|
|
|
|
.ops = &rt5616_aif_dai_ops,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-01-29 10:42:18 +07:00
|
|
|
static const struct snd_soc_component_driver soc_component_dev_rt5616 = {
|
|
|
|
.probe = rt5616_probe,
|
|
|
|
.suspend = rt5616_suspend,
|
|
|
|
.resume = rt5616_resume,
|
|
|
|
.set_bias_level = rt5616_set_bias_level,
|
|
|
|
.controls = rt5616_snd_controls,
|
|
|
|
.num_controls = ARRAY_SIZE(rt5616_snd_controls),
|
|
|
|
.dapm_widgets = rt5616_dapm_widgets,
|
|
|
|
.num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
|
|
|
|
.dapm_routes = rt5616_dapm_routes,
|
|
|
|
.num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
|
|
|
|
.use_pmdown_time = 1,
|
|
|
|
.endianness = 1,
|
|
|
|
.non_legacy_dai_naming = 1,
|
2015-12-15 13:57:41 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_config rt5616_regmap = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 16,
|
2018-09-01 23:50:41 +07:00
|
|
|
.use_single_read = true,
|
|
|
|
.use_single_write = true,
|
2015-12-15 13:57:41 +07:00
|
|
|
.max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
|
|
|
|
RT5616_PR_SPACING),
|
|
|
|
.volatile_reg = rt5616_volatile_register,
|
|
|
|
.readable_reg = rt5616_readable_register,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
.reg_defaults = rt5616_reg,
|
|
|
|
.num_reg_defaults = ARRAY_SIZE(rt5616_reg),
|
|
|
|
.ranges = rt5616_ranges,
|
|
|
|
.num_ranges = ARRAY_SIZE(rt5616_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct i2c_device_id rt5616_i2c_id[] = {
|
|
|
|
{ "rt5616", 0 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
|
|
|
|
|
2015-12-22 12:45:02 +07:00
|
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#if defined(CONFIG_OF)
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static const struct of_device_id rt5616_of_match[] = {
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{ .compatible = "realtek,rt5616", },
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{},
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};
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MODULE_DEVICE_TABLE(of, rt5616_of_match);
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#endif
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2015-12-15 13:57:41 +07:00
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static int rt5616_i2c_probe(struct i2c_client *i2c,
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2016-01-28 15:43:36 +07:00
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const struct i2c_device_id *id)
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2015-12-15 13:57:41 +07:00
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{
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struct rt5616_priv *rt5616;
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unsigned int val;
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int ret;
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rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
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2016-01-28 15:43:36 +07:00
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GFP_KERNEL);
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if (!rt5616)
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2015-12-15 13:57:41 +07:00
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return -ENOMEM;
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i2c_set_clientdata(i2c, rt5616);
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rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
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if (IS_ERR(rt5616->regmap)) {
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ret = PTR_ERR(rt5616->regmap);
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dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
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ret);
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return ret;
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}
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regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
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if (val != 0x6281) {
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dev_err(&i2c->dev,
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"Device with ID register %#x is not rt5616\n",
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val);
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2015-12-22 09:16:35 +07:00
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return -ENODEV;
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2015-12-15 13:57:41 +07:00
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}
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regmap_write(rt5616->regmap, RT5616_RESET, 0);
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regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
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2016-01-28 15:43:36 +07:00
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RT5616_PWR_VREF1 | RT5616_PWR_MB |
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RT5616_PWR_BG | RT5616_PWR_VREF2,
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RT5616_PWR_VREF1 | RT5616_PWR_MB |
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RT5616_PWR_BG | RT5616_PWR_VREF2);
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2015-12-15 13:57:41 +07:00
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mdelay(10);
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regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
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2016-01-28 15:43:36 +07:00
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RT5616_PWR_FV1 | RT5616_PWR_FV2,
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RT5616_PWR_FV1 | RT5616_PWR_FV2);
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2015-12-15 13:57:41 +07:00
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ret = regmap_register_patch(rt5616->regmap, init_list,
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ARRAY_SIZE(init_list));
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if (ret != 0)
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dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
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regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
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2016-01-28 15:43:36 +07:00
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RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
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2015-12-15 13:57:41 +07:00
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2018-01-29 10:42:18 +07:00
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return devm_snd_soc_register_component(&i2c->dev,
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&soc_component_dev_rt5616,
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2016-01-28 15:43:36 +07:00
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rt5616_dai, ARRAY_SIZE(rt5616_dai));
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2015-12-15 13:57:41 +07:00
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}
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static int rt5616_i2c_remove(struct i2c_client *i2c)
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{
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return 0;
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}
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static void rt5616_i2c_shutdown(struct i2c_client *client)
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{
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struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
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regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
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regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
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}
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static struct i2c_driver rt5616_i2c_driver = {
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.driver = {
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.name = "rt5616",
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2015-12-22 12:45:02 +07:00
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.of_match_table = of_match_ptr(rt5616_of_match),
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2015-12-15 13:57:41 +07:00
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},
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.probe = rt5616_i2c_probe,
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.remove = rt5616_i2c_remove,
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.shutdown = rt5616_i2c_shutdown,
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.id_table = rt5616_i2c_id,
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};
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module_i2c_driver(rt5616_i2c_driver);
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MODULE_DESCRIPTION("ASoC RT5616 driver");
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MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
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MODULE_LICENSE("GPL");
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