2015-07-21 12:45:14 +07:00
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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*/
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#include <linux/kthread.h>
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#include <linux/wait.h>
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#include <linux/sched.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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2015-11-11 13:56:00 +07:00
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#include "amdgpu_trace.h"
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2015-07-21 12:45:14 +07:00
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2016-03-03 18:00:50 +07:00
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static void amdgpu_job_free_handler(struct work_struct *ws)
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{
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struct amdgpu_job *job = container_of(ws, struct amdgpu_job, base.work_free_job);
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2016-03-10 11:14:44 +07:00
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amd_sched_job_put(&job->base);
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2016-03-03 18:00:50 +07:00
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}
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2016-03-04 17:51:02 +07:00
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void amdgpu_job_timeout_func(struct work_struct *work)
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{
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struct amdgpu_job *job = container_of(work, struct amdgpu_job, base.work_tdr.work);
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DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
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job->base.sched->name,
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(uint32_t)atomic_read(&job->ring->fence_drv.last_seq),
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job->ring->fence_drv.sync_seq);
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2016-03-10 11:14:44 +07:00
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amd_sched_job_put(&job->base);
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2016-03-04 17:51:02 +07:00
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}
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2016-02-03 19:44:52 +07:00
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int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
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struct amdgpu_job **job)
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{
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size_t size = sizeof(struct amdgpu_job);
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if (num_ibs == 0)
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return -EINVAL;
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size += sizeof(struct amdgpu_ib) * num_ibs;
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*job = kzalloc(size, GFP_KERNEL);
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if (!*job)
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return -ENOMEM;
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(*job)->adev = adev;
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(*job)->ibs = (void *)&(*job)[1];
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(*job)->num_ibs = num_ibs;
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2016-03-03 18:00:50 +07:00
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INIT_WORK(&(*job)->base.work_free_job, amdgpu_job_free_handler);
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2016-02-03 19:44:52 +07:00
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2016-02-08 18:13:05 +07:00
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amdgpu_sync_create(&(*job)->sync);
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2016-02-03 19:44:52 +07:00
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return 0;
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}
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2016-02-01 18:20:25 +07:00
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int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
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struct amdgpu_job **job)
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{
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int r;
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r = amdgpu_job_alloc(adev, 1, job);
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if (r)
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return r;
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r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
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if (r)
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kfree(*job);
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return r;
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}
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2016-02-03 19:44:52 +07:00
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void amdgpu_job_free(struct amdgpu_job *job)
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{
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unsigned i;
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2016-03-17 12:57:09 +07:00
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struct fence *f;
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/* use sched fence if available */
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f = (job->base.s_fence)? &job->base.s_fence->base : job->fence;
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2016-02-03 19:44:52 +07:00
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for (i = 0; i < job->num_ibs; ++i)
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2016-03-17 12:57:09 +07:00
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amdgpu_sa_bo_free(job->adev, &job->ibs[i].sa_bo, f);
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2016-03-17 12:48:13 +07:00
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fence_put(job->fence);
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2016-02-03 19:44:52 +07:00
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amdgpu_bo_unref(&job->uf.bo);
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2016-02-08 18:13:05 +07:00
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amdgpu_sync_free(&job->sync);
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2016-03-03 18:00:50 +07:00
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if (!job->base.use_sched)
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kfree(job);
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2016-02-01 18:20:25 +07:00
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}
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2016-03-10 11:14:44 +07:00
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void amdgpu_job_free_func(struct kref *refcount)
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{
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struct amdgpu_job *job = container_of(refcount, struct amdgpu_job, base.refcount);
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kfree(job);
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}
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2016-02-01 18:20:25 +07:00
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int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
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2016-02-01 18:53:58 +07:00
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struct amd_sched_entity *entity, void *owner,
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struct fence **f)
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2016-02-01 18:20:25 +07:00
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{
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2016-03-07 11:49:55 +07:00
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struct fence *fence;
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int r;
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2016-02-01 18:20:25 +07:00
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job->ring = ring;
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2016-03-07 11:49:55 +07:00
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if (!f)
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return -EINVAL;
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2016-03-04 17:51:02 +07:00
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r = amd_sched_job_init(&job->base, &ring->sched,
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2016-03-10 11:14:44 +07:00
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entity,
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2016-03-04 17:51:02 +07:00
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amdgpu_job_timeout_func,
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2016-03-10 11:14:44 +07:00
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amdgpu_job_free_func,
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owner, &fence);
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2016-03-07 11:49:55 +07:00
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if (r)
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return r;
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2016-02-01 18:20:25 +07:00
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job->owner = owner;
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2016-03-07 11:49:55 +07:00
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*f = fence_get(fence);
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2016-02-01 18:20:25 +07:00
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amd_sched_entity_push_job(&job->base);
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return 0;
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2016-02-03 19:44:52 +07:00
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}
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2016-02-01 18:31:01 +07:00
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static struct fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
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2015-08-25 16:05:36 +07:00
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{
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2015-09-09 08:21:19 +07:00
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struct amdgpu_job *job = to_amdgpu_job(sched_job);
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2015-11-04 02:58:50 +07:00
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struct amdgpu_vm *vm = job->ibs->vm;
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2016-02-08 18:13:05 +07:00
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struct fence *fence = amdgpu_sync_get_fence(&job->sync);
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2015-11-04 02:58:50 +07:00
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2016-02-26 22:18:26 +07:00
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if (fence == NULL && vm && !job->ibs->vm_id) {
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2016-01-31 18:29:04 +07:00
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struct amdgpu_ring *ring = job->ring;
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2016-02-26 22:18:26 +07:00
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unsigned i, vm_id;
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uint64_t vm_pd_addr;
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2015-11-04 02:58:50 +07:00
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int r;
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2016-02-08 18:13:05 +07:00
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r = amdgpu_vm_grab_id(vm, ring, &job->sync,
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2016-02-26 22:18:26 +07:00
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&job->base.s_fence->base,
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&vm_id, &vm_pd_addr);
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2016-01-18 23:01:42 +07:00
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if (r)
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2015-11-04 02:58:50 +07:00
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DRM_ERROR("Error getting VM ID (%d)\n", r);
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2016-02-26 22:18:26 +07:00
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else {
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for (i = 0; i < job->num_ibs; ++i) {
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job->ibs[i].vm_id = vm_id;
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job->ibs[i].vm_pd_addr = vm_pd_addr;
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}
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}
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2015-11-04 02:58:50 +07:00
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2016-02-08 18:13:05 +07:00
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fence = amdgpu_sync_get_fence(&job->sync);
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2015-11-04 02:58:50 +07:00
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}
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return fence;
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2015-08-25 16:05:36 +07:00
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}
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2016-02-01 18:31:01 +07:00
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static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job)
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2015-07-21 12:45:14 +07:00
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{
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2016-02-01 17:56:35 +07:00
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struct fence *fence = NULL;
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2015-09-09 08:05:55 +07:00
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struct amdgpu_job *job;
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2015-08-24 19:57:26 +07:00
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int r;
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2015-07-21 12:45:14 +07:00
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2015-09-09 08:05:55 +07:00
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if (!sched_job) {
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2015-08-05 18:52:14 +07:00
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DRM_ERROR("job is null\n");
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2015-08-06 02:22:10 +07:00
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return NULL;
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2015-08-05 18:52:14 +07:00
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}
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2015-09-09 08:21:19 +07:00
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job = to_amdgpu_job(sched_job);
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2016-02-08 18:13:05 +07:00
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r = amdgpu_sync_wait(&job->sync);
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if (r) {
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DRM_ERROR("failed to sync wait (%d)\n", r);
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return NULL;
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}
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2015-11-11 13:56:00 +07:00
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trace_amdgpu_sched_run_job(job);
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2016-02-16 16:57:10 +07:00
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r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs,
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2016-02-08 18:13:05 +07:00
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job->sync.last_vm_update, &fence);
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2015-08-31 22:28:28 +07:00
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if (r) {
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DRM_ERROR("Error scheduling IBs (%d)\n", r);
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2015-07-21 12:45:14 +07:00
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goto err;
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2015-08-31 22:28:28 +07:00
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}
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err:
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2016-03-17 12:48:13 +07:00
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job->fence = fence;
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2016-02-01 18:20:25 +07:00
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amdgpu_job_free(job);
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2016-02-01 17:56:35 +07:00
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return fence;
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2015-07-21 12:45:14 +07:00
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}
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struct amd_sched_backend_ops amdgpu_sched_ops = {
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2016-02-01 18:31:01 +07:00
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.dependency = amdgpu_job_dependency,
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.run_job = amdgpu_job_run,
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2016-03-04 17:51:02 +07:00
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.begin_job = amd_sched_job_begin,
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.finish_job = amd_sched_job_finish,
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2015-07-21 12:45:14 +07:00
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};
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