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linux_dsm_epyc7002/arch/arm/mach-imx/mx35.h

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imx: properly protect mach/mx{1,[25][157x]}.h from multiple inclusion Some headers have used (now) wrong names or havn't had protection at all. This is needed before adding static inline functions to the headers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Holger Schurig <hs4233@mail.mn-solutions.de> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Daniel Mack <daniel@caiaq.de>
2010-01-08 22:02:30 +07:00
#ifndef __MACH_MX35_H__
#define __MACH_MX35_H__
ARM: mx35: Add mx35_revision function to query the silicon revision Based on work done earlier by Sascha Hauer Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Eric Bénard <eric@eukrea.com> [ukl: actually squash the two approaches together] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-08 21:00:10 +07:00
[ARM] MX35: Add register definitions for the i.MX35 This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and i.MX35, so always include mx31.h and mx35.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-02-02 20:11:54 +07:00
/*
* IRAM
*/
#define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */
imx: add namespace prefixes for symbols in mx35.h The old names are still defined using the new names. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-13 03:47:57 +07:00
#define MX35_IRAM_SIZE SZ_128K
[ARM] MX35: Add register definitions for the i.MX35 This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and i.MX35, so always include mx31.h and mx35.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-02-02 20:11:54 +07:00
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_L2CC_BASE_ADDR 0x30000000
#define MX35_L2CC_SIZE SZ_1M
#define MX35_AIPS1_BASE_ADDR 0x43f00000
#define MX35_AIPS1_SIZE SZ_1M
#define MX35_MAX_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x04000)
#define MX35_EVTMON_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x08000)
#define MX35_CLKCTL_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x0c000)
#define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000)
#define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000)
#define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000)
ARM: imx: dynamically register imx-i2c devices (imx35) Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-06-17 00:25:34 +07:00
#define MX35_I2C1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000)
#define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000)
#define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000)
#define MX35_I2C2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x98000)
#define MX35_OWIRE_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x9c000)
#define MX35_SSI1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa0000)
#define MX35_CSPI1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa4000)
#define MX35_KPP_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa8000)
#define MX35_IOMUXC_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xac000)
#define MX35_ECT_IP1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xb8000)
#define MX35_ECT_IP2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xbc000)
#define MX35_SPBA0_BASE_ADDR 0x50000000
#define MX35_SPBA0_SIZE SZ_1M
#define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000)
#define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000)
#define MX35_SSI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x14000)
ARM: imx: Add PATA resources for other i.MX processors MX27/31/35/53 also have PATA block. Add PATA resources for them. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-08-24 03:18:06 +07:00
#define MX35_ATA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_MSHC1_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x24000)
imx: add namespace prefixes for symbols in mx35.h The old names are still defined using the new names. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-13 03:47:57 +07:00
#define MX35_FEC_BASE_ADDR 0x50038000
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000)
#define MX35_AIPS2_BASE_ADDR 0x53f00000
#define MX35_AIPS2_SIZE SZ_1M
#define MX35_CCM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x80000)
#define MX35_GPT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x90000)
#define MX35_EPIT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x94000)
#define MX35_EPIT2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x98000)
#define MX35_GPIO3_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xa4000)
#define MX35_SCC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xac000)
#define MX35_RNGA_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb0000)
arm: imx35: add esdhc-device to MX35-platform Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-11 17:55:22 +07:00
#define MX35_ESDHC1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb4000)
#define MX35_ESDHC2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb8000)
#define MX35_ESDHC3_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xbc000)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_IPU_CTRL_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc0000)
#define MX35_AUDMUX_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc4000)
#define MX35_GPIO1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xcc000)
#define MX35_GPIO2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd0000)
#define MX35_SDMA_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd4000)
#define MX35_RTC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd8000)
#define MX35_WDOG_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xdc000)
#define MX35_PWM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe0000)
mx35: add flexcan address Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-22 16:41:56 +07:00
#define MX35_CAN1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe4000)
#define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000)
ARM: mx35: Add mx35_revision function to query the silicon revision Based on work done earlier by Sascha Hauer Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Eric Bénard <eric@eukrea.com> [ukl: actually squash the two approaches together] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-08 21:00:10 +07:00
#define MX35_IIM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf0000)
ARM: mx3: dynamically allocate fsl-usb2-udc devices While adapting the #defines for this I noticed that the offset used for USB HS on i.MX35 differs from the documented offset. I kept the working offset and commented that the documentation differs. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-12 22:40:06 +07:00
#define MX35_USB_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf4000)
#define MX35_USB_OTG_BASE_ADDR (MX35_USB_BASE_ADDR + 0x0000)
/*
* The Reference Manual (IMX35RM, Rev. 2, 3/2009) claims an offset of 0x200 for
* HS. When host support was implemented only a preliminary document was
* available, which told 0x400. This works fine.
*/
#define MX35_USB_HS_BASE_ADDR (MX35_USB_BASE_ADDR + 0x0400)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_ROMP_BASE_ADDR 0x60000000
#define MX35_ROMP_SIZE SZ_1M
#define MX35_AVIC_BASE_ADDR 0x68000000
#define MX35_AVIC_SIZE SZ_1M
/*
* Memory regions and CS
*/
#define MX35_IPU_MEM_BASE_ADDR 0x70000000
#define MX35_CSD0_BASE_ADDR 0x80000000
#define MX35_CSD1_BASE_ADDR 0x90000000
#define MX35_CS0_BASE_ADDR 0xa0000000
#define MX35_CS1_BASE_ADDR 0xa8000000
#define MX35_CS2_BASE_ADDR 0xb0000000
#define MX35_CS3_BASE_ADDR 0xb2000000
#define MX35_CS4_BASE_ADDR 0xb4000000
ARM: imx: change static io mapping to use a function Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-25 20:44:25 +07:00
#define MX35_CS4_BASE_ADDR_VIRT 0xf6000000
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_CS4_SIZE SZ_32M
#define MX35_CS5_BASE_ADDR 0xb6000000
ARM: imx: change static io mapping to use a function Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-25 20:44:25 +07:00
#define MX35_CS5_BASE_ADDR_VIRT 0xf8000000
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_CS5_SIZE SZ_32M
/*
* NAND, SDRAM, WEIM, M3IF, EMI controllers
*/
#define MX35_X_MEMC_BASE_ADDR 0xb8000000
#define MX35_X_MEMC_SIZE SZ_64K
#define MX35_ESDCTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x1000)
#define MX35_WEIM_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x2000)
#define MX35_M3IF_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x3000)
#define MX35_EMI_CTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x4000)
#define MX35_PCMCIA_CTL_BASE_ADDR MX35_EMI_CTL_BASE_ADDR
imx: add namespace prefixes for symbols in mx35.h The old names are still defined using the new names. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-13 03:47:57 +07:00
#define MX35_NFC_BASE_ADDR 0xbb000000
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000
[ARM] MX35: Add register definitions for the i.MX35 This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and i.MX35, so always include mx31.h and mx35.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-02-02 20:11:54 +07:00
ARM: imx: change static io mapping to use a function Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-25 20:44:25 +07:00
#define MX35_IO_P2V(x) IMX_IO_P2V(x)
ARM: imx: refactor the io mapping macro This makes it more assembler friendly and allows it to be used in situation that need an unsigned long and not a pointer. Also the naming is clearer. IOMEM is introduced without IMX_ prefix as it is used this way in more than one ARM subarch and it might become globally available soon. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-25 16:40:30 +07:00
#define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x))
imx35: define and use MX35_IO_ADDRESS Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jürgen Beisert <j.beisert@pengutronix.de> Cc: Rabin Vincent <rabin@rab.in> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
2009-12-17 01:07:20 +07:00
[ARM] MX35: Add register definitions for the i.MX35 This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and i.MX35, so always include mx31.h and mx35.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-02-02 20:11:54 +07:00
/*
* Interrupt numbers
*/
ARM: imx: enable SPARSE_IRQ for imx platform As all irqchips on imx have been changed to allocate their irq_descs, and all unneeded mach/irqs.h inclusions on imx have been cleaned up, now it's time to select SPARSE_IRQ for imx/mxc. The SPARSE_IRQ support forces irqs allocation starting from 16. All those static irq number definition for SoCs need to shift 16 to keep non-DT boot works. With all those static IRQ number and start definitions removed from mach/irqs.h, the header becomes just a container of a couple of mach-imx specific irq/fiq calls. Since mach/irqs.h is not included by asm/irq.h now, the users of mxc_set_irq_fiq needs to explicitly include mach/irqs.h themselves. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-14 10:16:14 +07:00
#include <asm/irq.h>
#define MX35_INT_OWIRE (NR_IRQS_LEGACY + 2)
#define MX35_INT_I2C3 (NR_IRQS_LEGACY + 3)
#define MX35_INT_I2C2 (NR_IRQS_LEGACY + 4)
#define MX35_INT_RTIC (NR_IRQS_LEGACY + 6)
#define MX35_INT_ESDHC1 (NR_IRQS_LEGACY + 7)
#define MX35_INT_ESDHC2 (NR_IRQS_LEGACY + 8)
#define MX35_INT_ESDHC3 (NR_IRQS_LEGACY + 9)
#define MX35_INT_I2C1 (NR_IRQS_LEGACY + 10)
#define MX35_INT_SSI1 (NR_IRQS_LEGACY + 11)
#define MX35_INT_SSI2 (NR_IRQS_LEGACY + 12)
#define MX35_INT_CSPI2 (NR_IRQS_LEGACY + 13)
#define MX35_INT_CSPI1 (NR_IRQS_LEGACY + 14)
#define MX35_INT_ATA (NR_IRQS_LEGACY + 15)
#define MX35_INT_GPU2D (NR_IRQS_LEGACY + 16)
#define MX35_INT_ASRC (NR_IRQS_LEGACY + 17)
#define MX35_INT_UART3 (NR_IRQS_LEGACY + 18)
#define MX35_INT_IIM (NR_IRQS_LEGACY + 19)
#define MX35_INT_RNGA (NR_IRQS_LEGACY + 22)
#define MX35_INT_EVTMON (NR_IRQS_LEGACY + 23)
#define MX35_INT_KPP (NR_IRQS_LEGACY + 24)
#define MX35_INT_RTC (NR_IRQS_LEGACY + 25)
#define MX35_INT_PWM (NR_IRQS_LEGACY + 26)
#define MX35_INT_EPIT2 (NR_IRQS_LEGACY + 27)
#define MX35_INT_EPIT1 (NR_IRQS_LEGACY + 28)
#define MX35_INT_GPT (NR_IRQS_LEGACY + 29)
#define MX35_INT_POWER_FAIL (NR_IRQS_LEGACY + 30)
#define MX35_INT_UART2 (NR_IRQS_LEGACY + 32)
#define MX35_INT_NFC (NR_IRQS_LEGACY + 33)
#define MX35_INT_SDMA (NR_IRQS_LEGACY + 34)
#define MX35_INT_USB_HS (NR_IRQS_LEGACY + 35)
#define MX35_INT_USB_OTG (NR_IRQS_LEGACY + 37)
#define MX35_INT_MSHC1 (NR_IRQS_LEGACY + 39)
#define MX35_INT_ESAI (NR_IRQS_LEGACY + 40)
#define MX35_INT_IPU_ERR (NR_IRQS_LEGACY + 41)
#define MX35_INT_IPU_SYN (NR_IRQS_LEGACY + 42)
#define MX35_INT_CAN1 (NR_IRQS_LEGACY + 43)
#define MX35_INT_CAN2 (NR_IRQS_LEGACY + 44)
#define MX35_INT_UART1 (NR_IRQS_LEGACY + 45)
#define MX35_INT_MLB (NR_IRQS_LEGACY + 46)
#define MX35_INT_SPDIF (NR_IRQS_LEGACY + 47)
#define MX35_INT_ECT (NR_IRQS_LEGACY + 48)
#define MX35_INT_SCC_SCM (NR_IRQS_LEGACY + 49)
#define MX35_INT_SCC_SMN (NR_IRQS_LEGACY + 50)
#define MX35_INT_GPIO2 (NR_IRQS_LEGACY + 51)
#define MX35_INT_GPIO1 (NR_IRQS_LEGACY + 52)
#define MX35_INT_WDOG (NR_IRQS_LEGACY + 55)
#define MX35_INT_GPIO3 (NR_IRQS_LEGACY + 56)
#define MX35_INT_FEC (NR_IRQS_LEGACY + 57)
#define MX35_INT_EXT_POWER (NR_IRQS_LEGACY + 58)
#define MX35_INT_EXT_TEMPER (NR_IRQS_LEGACY + 59)
#define MX35_INT_EXT_SENSOR60 (NR_IRQS_LEGACY + 60)
#define MX35_INT_EXT_SENSOR61 (NR_IRQS_LEGACY + 61)
#define MX35_INT_EXT_WDOG (NR_IRQS_LEGACY + 62)
#define MX35_INT_EXT_TV (NR_IRQS_LEGACY + 63)
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
ARM: imx: dynamically allocate imx-ssi devices Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-08-25 22:37:45 +07:00
#define MX35_DMA_REQ_SSI2_RX1 22
#define MX35_DMA_REQ_SSI2_TX1 23
#define MX35_DMA_REQ_SSI2_RX0 24
#define MX35_DMA_REQ_SSI2_TX0 25
#define MX35_DMA_REQ_SSI1_RX1 26
#define MX35_DMA_REQ_SSI1_TX1 27
#define MX35_DMA_REQ_SSI1_RX0 28
#define MX35_DMA_REQ_SSI1_TX0 29
imx: copy constants from mx3x.h to mx35.h using the appropriate namespace Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14 03:25:01 +07:00
#define MX35_PROD_SIGNATURE 0x1 /* For MX31 */
imx: properly protect mach/mx{1,[25][157x]}.h from multiple inclusion Some headers have used (now) wrong names or havn't had protection at all. This is needed before adding static inline functions to the headers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Holger Schurig <hs4233@mail.mn-solutions.de> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Daniel Mack <daniel@caiaq.de>
2010-01-08 22:02:30 +07:00
#endif /* ifndef __MACH_MX35_H__ */
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