2011-10-04 17:19:01 +07:00
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/exynos
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2015-08-15 22:14:08 +07:00
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exynosdrm-y := exynos_drm_drv.o exynos_drm_crtc.o exynos_drm_fbdev.o \
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2015-08-16 12:38:49 +07:00
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exynos_drm_fb.o exynos_drm_gem.o exynos_drm_core.o \
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exynos_drm_plane.o
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2011-10-04 17:19:01 +07:00
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2012-10-20 21:53:42 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_IOMMU) += exynos_drm_iommu.o
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2012-03-16 16:47:08 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_FIMD) += exynos_drm_fimd.o
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2015-06-12 19:59:00 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS5433_DECON) += exynos5433_drm_decon.o
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2015-02-05 22:54:04 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS7_DECON) += exynos7_drm_decon.o
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2014-03-17 19:03:56 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_DPI) += exynos_drm_dpi.o
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2014-04-03 23:19:56 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_DSI) += exynos_drm_dsi.o
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2014-01-31 04:19:22 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_DP) += exynos_dp_core.o exynos_dp_reg.o
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2015-10-26 19:03:42 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_MIXER) += exynos_mixer.o
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exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI) += exynos_hdmi.o
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2012-03-21 08:55:26 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI) += exynos_drm_vidi.o
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2012-05-17 18:06:32 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_G2D) += exynos_drm_g2d.o
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drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 16:10:31 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_IPP) += exynos_drm_ipp.o
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2012-12-14 15:58:55 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_FIMC) += exynos_drm_fimc.o
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2012-12-14 15:58:56 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_ROTATOR) += exynos_drm_rotator.o
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2012-12-14 15:58:57 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_GSC) += exynos_drm_gsc.o
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2015-06-12 19:59:02 +07:00
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exynosdrm-$(CONFIG_DRM_EXYNOS_MIC) += exynos_drm_mic.o
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2012-03-16 16:47:08 +07:00
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obj-$(CONFIG_DRM_EXYNOS) += exynosdrm.o
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